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siflower: update siflower sdk to d5ed025

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This commit is contained in:
GL.iNet-Xinfa.Deng 2022-06-07 15:23:53 +08:00
parent 189cdb9cb3
commit 866a949325
9 changed files with 67 additions and 693 deletions
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2
config-siflower-18.x.yml
View File

@ -2,7 +2,7 @@ repo: https://github.com/Siflower/1806_SDK.git
branch: release
git_clone_dir: openwrt-18.06/siflower
openwrt_root_dir: openwrt-18.06/siflower/openwrt-18.06
revision: 6a62b16b49008c51092386d058f843b005a62b7f
revision: d5ed0258fc22f60e00ec025b802d175f33da6e41
patch_folders:
- patches-siflower-18.x/

39
patches-siflower-18.x/0102-fix-configure-the-WiFi-configuration-according-to-th.patch
View File

@ -7,9 +7,7 @@ Subject: [PATCH] fix: configure the WiFi configuration according to the
Signed-off-by: GL.iNet-Xinfa.Deng <xinfa.deng@gl-inet.com>
---
.../package/kernel/sf_smac/config/sfwifi-a28.sh | 4 +--
.../772-avoid-radar-channel-when-auto.patch | 29 ++++++++++++++++++++++
2 files changed, 31 insertions(+), 2 deletions(-)
create mode 100755 openwrt-18.06/package/network/services/hostapd/patches/772-avoid-radar-channel-when-auto.patch
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/openwrt-18.06/package/kernel/sf_smac/config/sfwifi-a28.sh b/openwrt-18.06/package/kernel/sf_smac/config/sfwifi-a28.sh
index 780c586..6474cca 100755
@ -26,41 +24,6 @@ index 780c586..6474cca 100755
ps_on=${ps_on-1}
tx_lft=${tx_lft-100}
tdls=${tdls-1}
diff --git a/openwrt-18.06/package/network/services/hostapd/patches/772-avoid-radar-channel-when-auto.patch b/openwrt-18.06/package/network/services/hostapd/patches/772-avoid-radar-channel-when-auto.patch
new file mode 100755
index 0000000..417bc13
--- /dev/null
+++ b/openwrt-18.06/package/network/services/hostapd/patches/772-avoid-radar-channel-when-auto.patch
@@ -0,0 +1,29 @@
+--- a/src/ap/acs.c
++++ b/src/ap/acs.c
+@@ -558,6 +558,16 @@ static int is_common_24ghz_chan(int chan
+ #define ACS_24GHZ_PREFER_1_6_11 0.8
+ #endif /* ACS_24GHZ_PREFER_1_6_11 */
+
++static int acs_radar_chan(const struct hostapd_channel_data *chan)
++{
++ const int allowed[] = { 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144 };
++ unsigned int i;
++ for (i = 0; i < ARRAY_SIZE(allowed); i++)
++ if (chan->chan == allowed[i])
++ return 1;
++ return 0;
++}
++
+ /*
+ * At this point it's assumed chan->interface_factor has been computed.
+ * This function should be reusable regardless of interference computation
+@@ -636,6 +646,9 @@ acs_find_ideal_chan(struct hostapd_iface
+ if (!chan_pri_allowed(chan))
+ continue;
+
++ if (acs_radar_chan(chan))
++ continue;
++
+ if (!is_in_chanlist(iface, chan))
+ continue;
+
--
2.7.4

57
patches-siflower-18.x/0105-fix-i2c-func-select.patch
View File

@ -1,57 +0,0 @@
From 00c8bf9c940bddb69ac88556f808842b02e6e425 Mon Sep 17 00:00:00 2001
From: "GL.iNet-Xinfa.Deng" <xinfa.deng@gl-inet.com>
Date: Sat, 19 Jun 2021 11:39:46 +0800
Subject: [PATCH] fix: i2c func select
Signed-off-by: GL.iNet-Xinfa.Deng <xinfa.deng@gl-inet.com>
---
.../linux-4.14.90/drivers/pinctrl/pinctrl-sfax8.c | 24 ++++++----------------
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/linux-4.14.90-dev/linux-4.14.90/drivers/pinctrl/pinctrl-sfax8.c b/linux-4.14.90-dev/linux-4.14.90/drivers/pinctrl/pinctrl-sfax8.c
index 1a8ca99..ebbcd78 100644
--- a/linux-4.14.90-dev/linux-4.14.90/drivers/pinctrl/pinctrl-sfax8.c
+++ b/linux-4.14.90-dev/linux-4.14.90/drivers/pinctrl/pinctrl-sfax8.c
@@ -265,33 +265,21 @@ static int sfax8_pad_set_func(struct sfax8_pinctrl *info, u32 index, pad_func fu
{
// write 0,0,0 to fmux_sel_reg mode_bit1_reg mode_bit0_reg
case FUNC0:
+ case FUNC1:
+ case FUNC2:
+ case FUNC3:
regmap_read(info->regmap_base, PAD_INDEX_REG1(index), &tmp);
- tmp |=(0x1 << FUNC_SW_SEL_REG);
+ tmp &= ~(0x7 << 0);
+ tmp |= (func << 0) | (0x1 << FUNC_SW_SEL_REG);
regmap_write(info->regmap_base, PAD_INDEX_REG1(index), tmp);
regmap_read(info->regmap_base, PAD_INDEX_REG0(index), &tmp);
- tmp |=(0x1 << SW_IE_REG);
+ tmp &= ~(0x1 << SW_OEN_REG);
regmap_write(info->regmap_base, PAD_INDEX_REG0(index), tmp);
- regmap_read(info->regmap_base, PAD_INDEX_REG1(index), &tmp);
- tmp &= ~(0x7 << 0);
- regmap_write(info->regmap_base, PAD_INDEX_REG1(index), tmp);
- break;
-
- // write 0,0,1 to fmux_sel_reg mode_bit1_reg mode_bit0_reg
- case FUNC1:
- regmap_read(info->regmap_base, PAD_INDEX_REG1(index), &tmp);
- tmp |=(0x1 << FUNC_SW_SEL_REG);
- regmap_write(info->regmap_base, PAD_INDEX_REG1(index), tmp);
-
regmap_read(info->regmap_base, PAD_INDEX_REG0(index), &tmp);
tmp |=(0x1 << SW_IE_REG);
regmap_write(info->regmap_base, PAD_INDEX_REG0(index), tmp);
-
- regmap_read(info->regmap_base, PAD_INDEX_REG1(index), &tmp);
- tmp &= ~(0x3 << 1);
- tmp |=(0x1 << 0);
- regmap_write(info->regmap_base, PAD_INDEX_REG1(index), tmp);
break;
case GPIO_INPUT:
--
2.7.4

399
patches-siflower-18.x/0300-feat-spi-nand-support-gigadevice.patch
View File

@ -1,14 +1,12 @@
From 62897b60de364737a39ac402302e9aa0c256aeaf Mon Sep 17 00:00:00 2001
From 86d89ac691482761b0ddf07d4aafecd0d49df94b Mon Sep 17 00:00:00 2001
From: "GL.iNet-Xinfa.Deng" <xinfa.deng@gl-inet.com>
Date: Fri, 5 Nov 2021 09:49:17 +0800
Date: Wed, 20 Apr 2022 09:48:09 +0800
Subject: [PATCH] feat: spi nand support gigadevice
---
.../linux-4.14.90/drivers/mtd/nand/spi/esmt.c | 4 +-
.../drivers/mtd/nand/spi/gigadevice.c | 381 +++++++++++++++++++++
.../linux-4.14.90/include/linux/mtd/spinand.h | 18 +
3 files changed, 402 insertions(+), 1 deletion(-)
create mode 100644 linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/gigadevice.c
.../linux-4.14.90/drivers/mtd/nand/spi/esmt.c | 4 +++-
.../linux-4.14.90/include/linux/mtd/spinand.h | 18 ++++++++++++++++++
2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/esmt.c b/linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/esmt.c
index e8bf521..9bdd89a 100644
@ -26,393 +24,6 @@ index e8bf521..9bdd89a 100644
return 1;
}
diff --git a/linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/gigadevice.c b/linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/gigadevice.c
new file mode 100644
index 0000000..79b26f5
--- /dev/null
+++ b/linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/gigadevice.c
@@ -0,0 +1,381 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Author:
+ * Chuanhong Guo <gch981213@gmail.com>
+ */
+
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_GIGADEVICE 0xC8
+
+#define GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS (1 << 4)
+#define GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS (3 << 4)
+
+#define GD5FXGQ5XE_STATUS_ECC_1_4_BITFLIPS (1 << 4)
+#define GD5FXGQ5XE_STATUS_ECC_4_BITFLIPS (3 << 4)
+
+#define GD5FXGQXXEXXG_REG_STATUS2 0xf0
+
+#define GD5FXGQ4UXFXXG_STATUS_ECC_MASK (7 << 4)
+#define GD5FXGQ4UXFXXG_STATUS_ECC_NO_BITFLIPS (0 << 4)
+#define GD5FXGQ4UXFXXG_STATUS_ECC_1_3_BITFLIPS (1 << 4)
+#define GD5FXGQ4UXFXXG_STATUS_ECC_UNCOR_ERROR (7 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(read_cache_variants_f,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP_3A(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP_3A(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP_3A(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP_3A(false, 0, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int gd5fxgq4xa_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section > 3)
+ return -ERANGE;
+
+ region->offset = (16 * section) + 8;
+ region->length = 8;
+
+ return 0;
+}
+
+static int gd5fxgq4xa_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section > 3)
+ return -ERANGE;
+
+ if (section) {
+ region->offset = 16 * section;
+ region->length = 8;
+ } else {
+ /* section 0 has one byte reserved for bad block mark */
+ region->offset = 1;
+ region->length = 7;
+ }
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops gd5fxgq4xa_ooblayout = {
+ .ecc = gd5fxgq4xa_ooblayout_ecc,
+ .free = gd5fxgq4xa_ooblayout_free,
+};
+
+static int gd5fxgq4xa_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+{
+ switch (status & STATUS_ECC_MASK) {
+ case STATUS_ECC_NO_BITFLIPS:
+ return 0;
+
+ case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS:
+ /* 1-7 bits are flipped. return the maximum. */
+ return 7;
+
+ case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS:
+ return 8;
+
+ case STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+
+ default:
+ break;
+ }
+
+ return -EINVAL;
+}
+
+static int gd5fxgqx_variant2_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 64;
+ region->length = 64;
+
+ return 0;
+}
+
+static int gd5fxgqx_variant2_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ /* Reserve 1 bytes for the BBM. */
+ region->offset = 1;
+ region->length = 63;
+
+ return 0;
+}
+
+/* Valid for Q4/Q5 and Q6 (untested) devices */
+static const struct mtd_ooblayout_ops gd5fxgqx_variant2_ooblayout = {
+ .ecc = gd5fxgqx_variant2_ooblayout_ecc,
+ .free = gd5fxgqx_variant2_ooblayout_free,
+};
+
+static int gd5fxgq4xc_ooblayout_256_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *oobregion)
+{
+ if (section)
+ return -ERANGE;
+
+ oobregion->offset = 128;
+ oobregion->length = 128;
+
+ return 0;
+}
+
+static int gd5fxgq4xc_ooblayout_256_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *oobregion)
+{
+ if (section)
+ return -ERANGE;
+
+ oobregion->offset = 1;
+ oobregion->length = 127;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops gd5fxgq4xc_oob_256_ops = {
+ .ecc = gd5fxgq4xc_ooblayout_256_ecc,
+ .free = gd5fxgq4xc_ooblayout_256_free,
+};
+
+static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+{
+ u8 status2;
+ struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2,
+ &status2);
+ int ret;
+
+ switch (status & STATUS_ECC_MASK) {
+ case STATUS_ECC_NO_BITFLIPS:
+ return 0;
+
+ case GD5FXGQ4XA_STATUS_ECC_1_7_BITFLIPS:
+ /*
+ * Read status2 register to determine a more fine grained
+ * bit error status
+ */
+ ret = spi_mem_exec_op(spinand->spimem, &op);
+ if (ret)
+ return ret;
+
+ /*
+ * 4 ... 7 bits are flipped (1..4 can't be detected, so
+ * report the maximum of 4 in this case
+ */
+ /* bits sorted this way (3...0): ECCS1,ECCS0,ECCSE1,ECCSE0 */
+ return ((status & STATUS_ECC_MASK) >> 2) |
+ ((status2 & STATUS_ECC_MASK) >> 4);
+
+ case GD5FXGQ4XA_STATUS_ECC_8_BITFLIPS:
+ return 8;
+
+ case STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+
+ default:
+ break;
+ }
+
+ return -EINVAL;
+}
+
+static int gd5fxgq5xexxg_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+{
+ u8 status2;
+ struct spi_mem_op op = SPINAND_GET_FEATURE_OP(GD5FXGQXXEXXG_REG_STATUS2,
+ &status2);
+ int ret;
+
+ switch (status & STATUS_ECC_MASK) {
+ case STATUS_ECC_NO_BITFLIPS:
+ return 0;
+
+ case GD5FXGQ5XE_STATUS_ECC_1_4_BITFLIPS:
+ /*
+ * Read status2 register to determine a more fine grained
+ * bit error status
+ */
+ ret = spi_mem_exec_op(spinand->spimem, &op);
+ if (ret)
+ return ret;
+
+ /*
+ * 1 ... 4 bits are flipped (and corrected)
+ */
+ /* bits sorted this way (1...0): ECCSE1, ECCSE0 */
+ return ((status2 & STATUS_ECC_MASK) >> 4) + 1;
+
+ case STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+
+ default:
+ break;
+ }
+
+ return -EINVAL;
+}
+
+static int gd5fxgq4ufxxg_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+{
+ switch (status & GD5FXGQ4UXFXXG_STATUS_ECC_MASK) {
+ case GD5FXGQ4UXFXXG_STATUS_ECC_NO_BITFLIPS:
+ return 0;
+
+ case GD5FXGQ4UXFXXG_STATUS_ECC_1_3_BITFLIPS:
+ return 3;
+
+ case GD5FXGQ4UXFXXG_STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+
+ default: /* (2 << 4) through (6 << 4) are 4-8 corrected errors */
+ return ((status & GD5FXGQ4UXFXXG_STATUS_ECC_MASK) >> 4) + 2;
+ }
+
+ return -EINVAL;
+}
+
+static const struct spinand_info gigadevice_spinand_table[] = {
+ SPINAND_INFO("GD5F1GQ4xA", 0xF1,
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
+ gd5fxgq4xa_ecc_get_status)),
+ SPINAND_INFO("GD5F2GQ4xA", 0xF2,
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
+ gd5fxgq4xa_ecc_get_status)),
+ SPINAND_INFO("GD5F4GQ4xA", 0xF4,
+ NAND_MEMORG(1, 2048, 64, 64, 4096, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
+ gd5fxgq4xa_ecc_get_status)),
+ SPINAND_INFO("GD5F4GQ4RC", 0xA4,
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&gd5fxgq4xc_oob_256_ops,
+ gd5fxgq4ufxxg_ecc_get_status)),
+ SPINAND_INFO("GD5F4GQ4UC", 0xb4,
+ NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&gd5fxgq4xc_oob_256_ops,
+ gd5fxgq4ufxxg_ecc_get_status)),
+ SPINAND_INFO("GD5F1GQ4UExxG", 0xD1,
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
+ gd5fxgq4uexxg_ecc_get_status)),
+ SPINAND_INFO("GD5F1GQ4UFxxG", 0xB1,
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
+ gd5fxgq4ufxxg_ecc_get_status)),
+ SPINAND_INFO("GD5F1GQ5UExxG", 0x51,
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
+ gd5fxgq5xexxg_ecc_get_status)),
+ SPINAND_INFO("GD5F2GQ5UExxG", 0x52,
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
+ gd5fxgq5xexxg_ecc_get_status)),
+};
+
+static int gigadevice_spinand_detect(struct spinand_device *spinand)
+{
+ u8 *id = spinand->id.data;
+ int ret;
+
+ /*
+ * For GD NANDs, There is an address byte needed to shift in before IDs
+ * are read out, so the first byte in raw_id is dummy.
+ */
+ if (id[1] != SPINAND_MFR_GIGADEVICE)
+ return 0;
+
+ ret = spinand_match_and_init(spinand, gigadevice_spinand_table,
+ ARRAY_SIZE(gigadevice_spinand_table),
+ id[2]);
+ if (ret)
+ return ret;
+
+ return 1;
+}
+
+static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {
+ .detect = gigadevice_spinand_detect,
+};
+
+const struct spinand_manufacturer gigadevice_spinand_manufacturer = {
+ .id = SPINAND_MFR_GIGADEVICE,
+ .name = "GigaDevice",
+ .ops = &gigadevice_spinand_manuf_ops,
+};
+
diff --git a/linux-4.14.90-dev/linux-4.14.90/include/linux/mtd/spinand.h b/linux-4.14.90-dev/linux-4.14.90/include/linux/mtd/spinand.h
index 67438cf..5e15c12 100644
--- a/linux-4.14.90-dev/linux-4.14.90/include/linux/mtd/spinand.h

25
patches-siflower-18.x/0301-fix-avoid-radar-channel-when-auto.patch Normal file
View File

@ -0,0 +1,25 @@
From eacb29b49b7b8c35528dd5f47c4c977829c9fa8e Mon Sep 17 00:00:00 2001
From: "GL.iNet-Xinfa.Deng" <xinfa.deng@gl-inet.com>
Date: Wed, 20 Apr 2022 10:37:16 +0800
Subject: [PATCH] fix: avoid radar channel when auto
---
.../services/hostapd/patches/772-disable-acs-select-radar-chan.patch | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/openwrt-18.06/package/network/services/hostapd/patches/772-disable-acs-select-radar-chan.patch b/openwrt-18.06/package/network/services/hostapd/patches/772-disable-acs-select-radar-chan.patch
index 9621ce5..342e0db 100644
--- a/openwrt-18.06/package/network/services/hostapd/patches/772-disable-acs-select-radar-chan.patch
+++ b/openwrt-18.06/package/network/services/hostapd/patches/772-disable-acs-select-radar-chan.patch
@@ -8,7 +8,7 @@ Index: hostapd-2019-08-08-ca8c2bd2/src/ap/acs.c
+static int acs_radar_chan(const struct hostapd_channel_data *chan)
+{
-+ const int allowed[] = { 52, 56, 60, 64 };
++ const int allowed[] = { 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144 };
+ unsigned int i;
+ for (i = 0; i < ARRAY_SIZE(allowed); i++)
+ if (chan->chan == allowed[i])
--
2.7.4

26
patches-siflower-18.x/0301-fix-spi-nand-macronix-warning-debug.patch
View File

@ -1,26 +0,0 @@
From 83ec1f2a8371f4ec1838a4f133f158e8701e9a34 Mon Sep 17 00:00:00 2001
From: "GL.iNet-Xinfa.Deng" <xinfa.deng@gl-inet.com>
Date: Mon, 19 Jul 2021 15:29:15 +0800
Subject: [PATCH] fix: spi-nand macronix warning debug
Signed-off-by: GL.iNet-Xinfa.Deng <xinfa.deng@gl-inet.com>
---
linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/macronix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/macronix.c b/linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/macronix.c
index b0bd395..e8a7e56 100644
--- a/linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/macronix.c
+++ b/linux-4.14.90-dev/linux-4.14.90/drivers/mtd/nand/spi/macronix.c
@@ -80,7 +80,7 @@ static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr))
return nand->eccreq.strength;
- if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr))
+ if (WARN_ON((eccsr&0xf) > nand->eccreq.strength || !eccsr))
return nand->eccreq.strength;
return eccsr;
--
2.7.4

166
patches-siflower-18.x/0302-fix-iphone-tethering-driver.patch
View File

@ -1,166 +0,0 @@
From 64afb600eb89accb36b1e706d20315fea393c23e Mon Sep 17 00:00:00 2001
From: "GL.iNet-Xinfa.Deng" <xinfa.deng@gl-inet.com>
Date: Fri, 5 Nov 2021 10:18:10 +0800
Subject: [PATCH] fix: iphone tethering driver
---
.../linux-4.14.90/drivers/net/usb/ipheth.c | 55 +++++++++++++++++-----
1 file changed, 44 insertions(+), 11 deletions(-)
diff --git a/linux-4.14.90-dev/linux-4.14.90/drivers/net/usb/ipheth.c b/linux-4.14.90-dev/linux-4.14.90/drivers/net/usb/ipheth.c
index aabbcfb..bf0d9ff 100644
--- a/linux-4.14.90-dev/linux-4.14.90/drivers/net/usb/ipheth.c
+++ b/linux-4.14.90-dev/linux-4.14.90/drivers/net/usb/ipheth.c
@@ -70,7 +70,7 @@
#define IPHETH_USBINTF_SUBCLASS 253
#define IPHETH_USBINTF_PROTO 1
-#define IPHETH_BUF_SIZE 1516
+#define IPHETH_BUF_SIZE 1514
#define IPHETH_IP_ALIGN 2 /* padding at front of URB */
#define IPHETH_TX_TIMEOUT (5 * HZ)
@@ -148,6 +148,8 @@ struct ipheth_device {
u8 bulk_in;
u8 bulk_out;
struct delayed_work carrier_work;
+ bool confirmed_pairing;
+ int tx_in_use;
};
static int ipheth_rx_submit(struct ipheth_device *dev, gfp_t mem_flags);
@@ -259,7 +261,7 @@ static void ipheth_rcvbulk_callback(struct urb *urb)
dev->net->stats.rx_packets++;
dev->net->stats.rx_bytes += len;
-
+ dev->confirmed_pairing = true;
netif_rx(skb);
ipheth_rx_submit(dev, GFP_ATOMIC);
}
@@ -280,14 +282,26 @@ static void ipheth_sndbulk_callback(struct urb *urb)
dev_err(&dev->intf->dev, "%s: urb status: %d\n",
__func__, status);
- netif_wake_queue(dev->net);
+ dev->tx_in_use = false;
+
+ if (status == 0)
+ netif_wake_queue(dev->net);
+ else
+ // on URB error, trigger immediate poll
+ schedule_delayed_work(&dev->carrier_work, 0);
}
static int ipheth_carrier_set(struct ipheth_device *dev)
{
- struct usb_device *udev = dev->udev;
+ struct usb_device *udev;
int retval;
+ if (!dev)
+ return 0;
+ if (!dev->confirmed_pairing)
+ return 0;
+
+ udev = dev->udev;
retval = usb_control_msg(udev,
usb_rcvctrlpipe(udev, IPHETH_CTRL_ENDP),
IPHETH_CMD_CARRIER_CHECK, /* request */
@@ -302,11 +316,14 @@ static int ipheth_carrier_set(struct ipheth_device *dev)
return retval;
}
- if (dev->ctrl_buf[0] == IPHETH_CARRIER_ON)
+ if (dev->ctrl_buf[0] == IPHETH_CARRIER_ON) {
netif_carrier_on(dev->net);
- else
+ if (dev->tx_urb->status != -EINPROGRESS && dev->tx_in_use == false)
+ netif_wake_queue(dev->net);
+ } else {
netif_carrier_off(dev->net);
-
+ netif_stop_queue(dev->net);
+ }
return 0;
}
@@ -375,6 +392,8 @@ static int ipheth_open(struct net_device *net)
struct usb_device *udev = dev->udev;
int retval = 0;
+ dev->tx_in_use = false;
+
usb_set_interface(udev, IPHETH_INTFNUM, IPHETH_ALT_INTFNUM);
retval = ipheth_carrier_set(dev);
@@ -386,7 +405,6 @@ static int ipheth_open(struct net_device *net)
return retval;
schedule_delayed_work(&dev->carrier_work, IPHETH_CARRIER_CHECK_TIMEOUT);
- netif_start_queue(net);
return retval;
}
@@ -413,6 +431,14 @@ static int ipheth_tx(struct sk_buff *skb, struct net_device *net)
return NETDEV_TX_OK;
}
+ if (dev->tx_in_use) {
+ dev->net->stats.tx_dropped++;
+ dev_kfree_skb_any(skb);
+ return NETDEV_TX_OK;
+ }
+
+ dev->tx_in_use = true;
+
memcpy(dev->tx_buf, skb->data, skb->len);
if (skb->len < IPHETH_BUF_SIZE)
memset(dev->tx_buf + skb->len, 0, IPHETH_BUF_SIZE - skb->len);
@@ -424,17 +450,22 @@ static int ipheth_tx(struct sk_buff *skb, struct net_device *net)
dev);
dev->tx_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
+ netif_stop_queue(net);
retval = usb_submit_urb(dev->tx_urb, GFP_ATOMIC);
if (retval) {
dev_err(&dev->intf->dev, "%s: usb_submit_urb: %d\n",
__func__, retval);
dev->net->stats.tx_errors++;
dev_kfree_skb_any(skb);
+ netif_wake_queue(net);
+ if (atomic_read(&dev->tx_urb->use_count) != 0) {
+ atomic_dec(&dev->tx_urb->use_count);
+ }
+ dev->tx_in_use = false;
} else {
dev->net->stats.tx_packets++;
dev->net->stats.tx_bytes += skb->len;
dev_consume_skb_any(skb);
- netif_stop_queue(net);
}
return NETDEV_TX_OK;
@@ -489,7 +520,7 @@ static int ipheth_probe(struct usb_interface *intf,
dev->udev = udev;
dev->net = netdev;
dev->intf = intf;
-
+ dev->confirmed_pairing = false;
/* Set up endpoints */
hintf = usb_altnum_to_altsetting(intf, IPHETH_ALT_INTFNUM);
if (hintf == NULL) {
@@ -540,7 +571,9 @@ static int ipheth_probe(struct usb_interface *intf,
retval = -EIO;
goto err_register_netdev;
}
-
+ // carrier down and transmit queues stopped until packet from device
+ netif_carrier_off(netdev);
+ netif_tx_stop_all_queues(netdev);
dev_info(&intf->dev, "Apple iPhone USB Ethernet device attached\n");
return 0;
--
2.7.4

25
patches-siflower-18.x/0309-fix-sta-enable-ieee80211r-by-default.patch Normal file
View File

@ -0,0 +1,25 @@
From cc7aa08b523c031864cee794a51b27d85e9b274f Mon Sep 17 00:00:00 2001
From: "GL.iNet-Xinfa.Deng" <xinfa.deng@gl-inet.com>
Date: Tue, 19 Apr 2022 11:09:24 +0800
Subject: [PATCH] fix: sta enable ieee80211r by default
---
openwrt-18.06/package/network/services/hostapd/files/hostapd.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/openwrt-18.06/package/network/services/hostapd/files/hostapd.sh b/openwrt-18.06/package/network/services/hostapd/files/hostapd.sh
index 67c2d82..ff0c644 100644
--- a/openwrt-18.06/package/network/services/hostapd/files/hostapd.sh
+++ b/openwrt-18.06/package/network/services/hostapd/files/hostapd.sh
@@ -872,7 +872,7 @@ wpa_supplicant_add_network() {
;;
esac
- set_default ieee80211r 0
+ set_default ieee80211r 1
set_default multi_ap 0
local key_mgmt='NONE'
--
2.7.4

21
patches-siflower-18.x/9000-add-support-GL.iNET-SF1200-target.patch
View File

@ -1,4 +1,4 @@
From 54605062af0db1c1d75736e2cb1da6a8ee04992e Mon Sep 17 00:00:00 2001
From 9e9ccac6c13c753e4549c173295f9dfdc34731cd Mon Sep 17 00:00:00 2001
From: Lancer <luoyejiang0701@gmail.com>
Date: Mon, 26 Apr 2021 17:36:39 +0800
Subject: [PATCH] add support GL.iNET SF1200 target
@ -8,7 +8,7 @@ Signed-off-by: Lancer <luoyejiang0701@gmail.com>
.../arch/mips/boot/dts/siflower/Makefile | 1 +
.../dts/siflower/sf19a28_fullmask_gl_sf1200.dts | 146 +
.../linux-4.14.90/arch/mips/siflower/Kconfig | 8 +
openwrt-18.06/make.sh | 3 +
openwrt-18.06/make.sh | 2 +
.../bin/config_check.sh | 6 +
.../base-files-SF19A28-GL-SF1200/bin/sf_reset.sh | 3 +
.../base-files-SF19A28-GL-SF1200/bin/wanLinkStatus | 3 +
@ -26,7 +26,7 @@ Signed-off-by: Lancer <luoyejiang0701@gmail.com>
.../sf19a28-fullmask/profiles/sf19a28-gl-sf1200.mk | 28 +
.../siflower/sf19a28_gl_sf1200_fullmask_def.config | 4086 ++++++++++++++
.../siflower/sf19a28_gl_sf1200_fullmask_rel.config | 5575 ++++++++++++++++++++
21 files changed, 10668 insertions(+)
21 files changed, 10667 insertions(+)
create mode 100644 linux-4.14.90-dev/linux-4.14.90/arch/mips/boot/dts/siflower/sf19a28_fullmask_gl_sf1200.dts
create mode 100755 openwrt-18.06/target/linux/siflower/sf19a28-fullmask/base-files-SF19A28-GL-SF1200/bin/config_check.sh
create mode 100755 openwrt-18.06/target/linux/siflower/sf19a28-fullmask/base-files-SF19A28-GL-SF1200/bin/sf_reset.sh
@ -47,7 +47,7 @@ Signed-off-by: Lancer <luoyejiang0701@gmail.com>
create mode 100644 openwrt-18.06/target/linux/siflower/sf19a28_gl_sf1200_fullmask_rel.config
diff --git a/linux-4.14.90-dev/linux-4.14.90/arch/mips/boot/dts/siflower/Makefile b/linux-4.14.90-dev/linux-4.14.90/arch/mips/boot/dts/siflower/Makefile
index d6bdab9..4644b6f 100755
index ae5582b..ef1879a 100755
--- a/linux-4.14.90-dev/linux-4.14.90/arch/mips/boot/dts/siflower/Makefile
+++ b/linux-4.14.90-dev/linux-4.14.90/arch/mips/boot/dts/siflower/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_DT_SF19A28_MPW1_AC22) += sf19a28_mpw1_ac22.dtb
@ -211,7 +211,7 @@ index 0000000..3a4cbb7
+ smp-affinity = <3>;
+};
diff --git a/linux-4.14.90-dev/linux-4.14.90/arch/mips/siflower/Kconfig b/linux-4.14.90-dev/linux-4.14.90/arch/mips/siflower/Kconfig
index 7362cec..3c7ddb9 100755
index fc46db5..c46054f 100755
--- a/linux-4.14.90-dev/linux-4.14.90/arch/mips/siflower/Kconfig
+++ b/linux-4.14.90-dev/linux-4.14.90/arch/mips/siflower/Kconfig
@@ -125,6 +125,14 @@ config DT_SF19A28_FULLMASK_NF
@ -230,19 +230,18 @@ index 7362cec..3c7ddb9 100755
bool "Built-in device tree for sf19a28 fullmask ac28"
default n
diff --git a/openwrt-18.06/make.sh b/openwrt-18.06/make.sh
index 55e481f..f9f9d33 100755
index cd1d141..96300ff 100755
--- a/openwrt-18.06/make.sh
+++ b/openwrt-18.06/make.sh
@@ -59,6 +59,9 @@ case ${board} in
a28_evb)
target_board=target/linux/siflower/sf19a28_evb_fullmask_def.config
@@ -113,6 +113,8 @@ case ${board} in
;;
a28_nf)
target_board=target/linux/siflower/sf19a28_nf_fullmask_def.config
+ a28_gl_sf1200)
+ target_board=target/linux/siflower/sf19a28_gl_sf1200_fullmask_def.config
+ ;;
;;
a28_ac28)
target_board=target/linux/siflower/sf19a28_ac28_fullmask_def.config
;;
diff --git a/openwrt-18.06/target/linux/siflower/sf19a28-fullmask/base-files-SF19A28-GL-SF1200/bin/config_check.sh b/openwrt-18.06/target/linux/siflower/sf19a28-fullmask/base-files-SF19A28-GL-SF1200/bin/config_check.sh
new file mode 100755
index 0000000..da0bcaf