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patches-19.x: target/ramips: fix esw rt3050 panic
Signed-off-by: gl-zhaojianhui <jianhui.zhao@gl-inet.com>
This commit is contained in:
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@ -1,17 +1,17 @@
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From ac8ea98bd4aff7f28c5bbfbc2580a624de9db6fe Mon Sep 17 00:00:00 2001
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From cdb0acc648bd71ed9d1e44851776236ef3575342 Mon Sep 17 00:00:00 2001
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From: gl-zhaojianhui <jianhui.zhao@gl-inet.com>
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Date: Sat, 6 Nov 2021 18:16:06 +0800
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Subject: [PATCH] target/ramips: fix esw-rt3050 panic
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Signed-off-by: gl-zhaojianhui <jianhui.zhao@gl-inet.com>
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---
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target/linux/ramips/dts/mt7628an.dtsi | 4 ++--
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.../files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.c | 8 ++++++--
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.../files-4.14/drivers/net/ethernet/mediatek/soc_rt3050.c | 2 +-
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3 files changed, 9 insertions(+), 5 deletions(-)
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target/linux/ramips/dts/mt7628an.dtsi | 8 ++--
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.../net/ethernet/mediatek/esw_rt3050.c | 47 ++++++++++++++++---
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.../net/ethernet/mediatek/soc_rt3050.c | 2 +-
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3 files changed, 45 insertions(+), 12 deletions(-)
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diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi
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index 61016c8b40..e2246f9e91 100644
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index 61016c8b40..ec4406a3ce 100644
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--- a/target/linux/ramips/dts/mt7628an.dtsi
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+++ b/target/linux/ramips/dts/mt7628an.dtsi
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@@ -445,8 +445,8 @@
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@ -25,8 +25,19 @@ index 61016c8b40..e2246f9e91 100644
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mediatek,switch = <&esw>;
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};
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@@ -455,8 +455,8 @@
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compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
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reg = <0x10110000 0x8000>;
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- resets = <&rstctrl 23>;
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- reset-names = "esw";
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+ resets = <&rstctrl 23 &rstctrl 24>;
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+ reset-names = "esw", "ephy";
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interrupt-parent = <&intc>;
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interrupts = <17>;
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diff --git a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.c b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.c
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index 816c588dd7..bbc0824af7 100644
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index 816c588dd7..8eea0ff437 100644
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--- a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.c
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+++ b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/esw_rt3050.c
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@@ -18,7 +18,7 @@
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@ -38,24 +49,99 @@ index 816c588dd7..bbc0824af7 100644
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#include <linux/switch.h>
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#include "mtk_eth_soc.h"
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@@ -173,6 +173,7 @@
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@@ -172,7 +172,6 @@
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#define RT5350_ESW_REG_PXTPC(_x) (0x150 + (4 * _x))
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#define RT5350_EWS_REG_LED_POLARITY 0x168
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#define RT5350_RESET_EPHY BIT(24)
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+#define RT305X_RESET_ESW BIT(23)
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-#define RT5350_RESET_EPHY BIT(24)
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enum {
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/* Global attributes. */
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@@ -791,6 +792,8 @@ static int esw_apply_config(struct switch_dev *dev)
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@@ -232,7 +231,8 @@ struct rt305x_esw {
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int led_frequency;
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struct esw_vlan vlans[RT305X_ESW_NUM_VLANS];
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struct esw_port ports[RT305X_ESW_NUM_PORTS];
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-
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+ struct reset_control *rst_esw;
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+ struct reset_control *rst_ephy;
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};
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static inline void esw_w32(struct rt305x_esw *esw, u32 val, unsigned reg)
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@@ -430,12 +430,37 @@ static void esw_set_gsc(struct rt305x_esw *esw)
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static int esw_apply_config(struct switch_dev *dev);
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+static void esw_reset(struct rt305x_esw *esw)
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+{
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+ if (!esw->rst_esw)
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+ return;
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+
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+ reset_control_assert(esw->rst_esw);
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+ usleep_range(60, 120);
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+ reset_control_deassert(esw->rst_esw);
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+ /* the esw takes long to reset otherwise the board hang */
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+ msleep(10);
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+}
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+
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+static void esw_reset_ephy(struct rt305x_esw *esw)
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+{
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+ if (!esw->rst_ephy)
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+ return;
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+
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+ reset_control_assert(esw->rst_ephy);
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+ usleep_range(60, 120);
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+ reset_control_deassert(esw->rst_ephy);
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+ usleep_range(60, 120);
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+}
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+
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static void esw_hw_init(struct rt305x_esw *esw)
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{
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int i;
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u8 port_disable = 0;
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u8 port_map = RT305X_ESW_PMAP_LLLLLL;
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+ esw_reset(esw);
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+
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/* vodoo from original driver */
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esw_w32(esw, 0xC8A07850, RT305X_ESW_REG_FCT0);
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esw_w32(esw, 0x00000000, RT305X_ESW_REG_SGC2);
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@@ -506,7 +531,7 @@ static void esw_hw_init(struct rt305x_esw *esw)
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if (ralink_soc == RT305X_SOC_RT3352) {
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/* reset EPHY */
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- fe_reset(RT5350_RESET_EPHY);
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+ esw_reset_ephy(esw);
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rt305x_mii_write(esw, 0, 31, 0x8000);
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for (i = 0; i < 5; i++) {
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@@ -557,7 +582,7 @@ static void esw_hw_init(struct rt305x_esw *esw)
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rt305x_mii_write(esw, 0, 31, 0x8000);
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} else if (ralink_soc == RT305X_SOC_RT5350) {
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/* reset EPHY */
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- fe_reset(RT5350_RESET_EPHY);
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+ esw_reset_ephy(esw);
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/* set the led polarity */
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esw_w32(esw, esw->reg_led_polarity & 0x1F,
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@@ -615,7 +640,7 @@ static void esw_hw_init(struct rt305x_esw *esw)
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int i;
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/* reset EPHY */
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- fe_reset(RT5350_RESET_EPHY);
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+ esw_reset_ephy(esw);
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rt305x_mii_write(esw, 0, 31, 0x2000); /* change G2 page */
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rt305x_mii_write(esw, 0, 26, 0x0020);
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@@ -791,6 +816,8 @@ static int esw_apply_config(struct switch_dev *dev)
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esw_set_vmsc(esw, 0, RT305X_ESW_PORTS_ALL);
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}
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+ fe_reset(RT5350_RESET_EPHY);
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+ esw_reset_ephy(esw);
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+
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return 0;
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}
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@@ -801,7 +804,6 @@ static int esw_reset_switch(struct switch_dev *dev)
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@@ -801,7 +828,6 @@ static int esw_reset_switch(struct switch_dev *dev)
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esw->global_vlan_enable = 0;
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memset(esw->ports, 0, sizeof(esw->ports));
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memset(esw->vlans, 0, sizeof(esw->vlans));
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@ -63,15 +149,20 @@ index 816c588dd7..bbc0824af7 100644
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return 0;
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}
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@@ -1351,6 +1353,8 @@ static int esw_probe(struct platform_device *pdev)
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struct rt305x_esw *esw;
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int ret;
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@@ -1396,6 +1422,13 @@ static int esw_probe(struct platform_device *pdev)
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return ret;
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}
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+ fe_reset(RT305X_RESET_ESW);
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+ esw->rst_esw = devm_reset_control_get(&pdev->dev, "esw");
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+ if (IS_ERR(esw->rst_esw))
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+ esw->rst_esw = NULL;
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+ esw->rst_ephy = devm_reset_control_get(&pdev->dev, "ephy");
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+ if (IS_ERR(esw->rst_ephy))
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+ esw->rst_ephy = NULL;
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+
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esw = devm_kzalloc(&pdev->dev, sizeof(*esw), GFP_KERNEL);
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if (!esw)
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return -ENOMEM;
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platform_set_drvdata(pdev, esw);
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spin_lock_init(&esw->reg_rw_lock);
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diff --git a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/soc_rt3050.c b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/soc_rt3050.c
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index 914b81410e..6291259fe0 100644
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--- a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/soc_rt3050.c
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