ax1800/axt1800: fix dts file format

Signed-off-by: Jianhui Zhao <jianhui.zhao@gl-inet.com>
This commit is contained in:
Jianhui Zhao 2022-02-10 11:39:03 +08:00
parent f64ea39646
commit c4f51cfc55
3 changed files with 14 additions and 17 deletions

View File

@ -18,6 +18,7 @@
#include "qcom-ipq6018-gl-ax1800.dtsi" #include "qcom-ipq6018-gl-ax1800.dtsi"
/ { / {
model = "GL Technologies, Inc. AX1800";
compatible = "glinet,ax1800", "qcom,ipq6018-cp03", "qcom,ipq6018"; compatible = "glinet,ax1800", "qcom,ipq6018-cp03", "qcom,ipq6018";
aliases { aliases {

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@ -18,9 +18,8 @@
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
/ { / {
#address-cells = <0x2>; #address-cells = <0x2>;
#size-cells = <0x2>; #size-cells = <0x2>;
model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP03-C1";
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
qcom,msm-id = <0x1A5 0x0>; qcom,msm-id = <0x1A5 0x0>;
@ -35,9 +34,9 @@
led-upgrade = &led_run; led-upgrade = &led_run;
}; };
chosen { chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init"; bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
bootargs-append = " swiotlb=1 coherent_pool=2M console=ttyMSM0,115200,n8"; bootargs-append = " swiotlb=1 coherent_pool=2M";
}; };
gl_hw: gl_hw { gl_hw: gl_hw {
@ -60,7 +59,7 @@
}; };
&tlmm { &tlmm {
uart_pins: uart_pins { uart_pins: uart_pins {
mux { mux {
pins = "gpio44", "gpio45"; pins = "gpio44", "gpio45";
function = "blsp2_uart"; function = "blsp2_uart";
@ -120,7 +119,7 @@
}; };
qpic_pad { qpic_pad {
pins = "gpio1", "gpio3", "gpio4", pins = "gpio1", "gpio3", "gpio4",
"gpio10", "gpio11", "gpio17"; "gpio10", "gpio11", "gpio17";
function = "qpic_pad"; function = "qpic_pad";
drive-strength = <8>; drive-strength = <8>;
bias-pull-down; bias-pull-down;
@ -163,7 +162,7 @@
}; };
leds_pins: leds_pins { leds_pins: leds_pins {
led_run: white { white {
pins = "gpio35"; pins = "gpio35";
function = "gpio"; function = "gpio";
drive-strength = <8>; drive-strength = <8>;
@ -184,10 +183,10 @@
}; };
&soc { &soc {
mdio0: mdio@90000 { mdio0: mdio@90000 {
pinctrl-0 = <&mdio_pins>; pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
phy-reset-gpio = <&tlmm 74 0>; phy-reset-gpio = <&tlmm 74 GPIO_ACTIVE_HIGH>;
status = "ok"; status = "ok";
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
reg = <0>; reg = <0>;
@ -200,7 +199,7 @@
}; };
}; };
ess0: ess-switch@3a000000 { ess0: ess-switch@3a000000 {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */ switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x0c>; /* lan port bitmap */ switch_lan_bmp = <0x0c>; /* lan port bitmap */
switch_wan_bmp = <0x02>; /* wan port bitmap */ switch_wan_bmp = <0x02>; /* wan port bitmap */
@ -224,7 +223,7 @@
}; };
}; };
dp1 { dp1 {
device_type = "network"; device_type = "network";
compatible = "qcom,nss-dp"; compatible = "qcom,nss-dp";
qcom,id = <1>; qcom,id = <1>;
@ -260,12 +259,12 @@
phy-mode = "sgmii"; phy-mode = "sgmii";
}; };
leds: leds { leds: leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>; pinctrl-0 = <&leds_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
white { led_run: white {
label = "white_led"; label = "white_led";
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
default-state = "off"; default-state = "off";
@ -381,7 +380,3 @@
>; >;
clock-latency = <200000>; clock-latency = <200000>;
}; };
&nss0 {
//qcom,max-frequency = <1689600000>;
};

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@ -18,6 +18,7 @@
#include "qcom-ipq6018-gl-ax1800.dtsi" #include "qcom-ipq6018-gl-ax1800.dtsi"
/ { / {
model = "GL Technologies, Inc. AXT1800";
compatible = "glinet,axt1800", "qcom,ipq6018-cp03", "qcom,ipq6018"; compatible = "glinet,axt1800", "qcom,ipq6018-cp03", "qcom,ipq6018";
aliases { aliases {