mirror of
https://github.com/FUjr/gl-infra-builder.git
synced 2025-12-16 09:10:02 +00:00
292 lines
6.4 KiB
Diff
292 lines
6.4 KiB
Diff
From e0edc46aca7a661db13360431408822baaf473ed Mon Sep 17 00:00:00 2001
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From: Hongjian Zhang <hongjian.zhang@gl-inet.com>
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Date: Mon, 29 May 2023 14:35:12 +0800
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Subject: [PATCH] support MT3000 target
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---
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.../boot/dts/mediatek/mt7981-gl-mt3000.dts | 272 ++++++++++++++++++
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1 file changed, 272 insertions(+)
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create mode 100755 target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-gl-mt3000.dts
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diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-gl-mt3000.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-gl-mt3000.dts
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new file mode 100755
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index 0000000000..b70ee8ae56
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--- /dev/null
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+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-gl-mt3000.dts
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@@ -0,0 +1,272 @@
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+/dts-v1/;
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+
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+#include "mt7981.dtsi"
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+
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+/ {
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+ model = "GL.iNet GL-MT3000";
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+ compatible = "glinet,mt3000-snand", "mediatek,mt7981";
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+
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+ aliases {
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+ led-upgrade = &led_run;
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+ };
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+
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+ chosen {
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+ bootargs = "console=ttyS0,115200n1 loglevel=8 \
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+ earlycon=uart8250,mmio32,0x11002000";
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+ };
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+
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+
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+ reset {
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+ label = "reset";
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+ linux,code = <KEY_RESTART>;
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+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ switch {
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+ label = "switch";
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+ linux,code = <KEY_SETUP>;
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+ gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ led_run: led@0 {
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+ label = "blue:run";
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+ gpios = <&pio 31 GPIO_ACTIVE_LOW>;
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+ default-state = "on";
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+ };
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+
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+ led@1 {
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+ label = "white:system";
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+ gpios = <&pio 30 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+
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+ nmbm_spim_nand {
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+ compatible = "generic,nmbm";
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+
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ lower-mtd-device = <&spi_nand>;
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+ max-reserved-blocks = <32>;
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+ forced-create;
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+
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+ partitions {
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+ compatible = "fixed-partitions";
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+
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+ partition@0 {
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+ label = "BL2";
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+ reg = <0x00000 0x0100000>;
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+ read-only;
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+ };
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+
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+ partition@100000 {
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+ label = "u-boot-env";
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+ reg = <0x0100000 0x0080000>;
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+ };
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+
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+ partition@180000 {
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+ label = "Factory";
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+ reg = <0x180000 0x0200000>;
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+ };
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+
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+ partition@380000 {
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+ label = "FIP";
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+ reg = <0x380000 0x0200000>;
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+ };
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+
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+ partition@580000 {
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+ label = "log";
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+ reg = <0x580000 0x40000>;
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+ };
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+
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+ partition@5c0000 {
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+ label = "ubi";
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+ reg = <0x5c0000 0>;
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+ };
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+ };
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+ };
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+
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+ gl-hw {
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+ compatible = "gl-hw-info";
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+ model = "mt3000";
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+ wan = "eth0";
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+ lan = "eth1";
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+ usb-port = "1-1,2-1";
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+ fan = "hwmon0 cooling_device0";
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+ flash_size = <256>;
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+ temperature = "/sys/devices/virtual/thermal/thermal_zone0/temp";
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+ switch-button = "gpio-455";
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+ reset-button = "gpio-456";
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+ radio = "mt798111 mt798112";
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+ cfg-partition = "/dev/mtd7";
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+ dfs;
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+ factory_data {
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+ device_mac = "Factory", "0x0a";
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+ device_ddns = "Factory", "0x10";
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+ device_sn_bak = "Factory", "0x20";
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+ device_sn = "Factory", "0x30";
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+ country_code = "Factory", "0x88";
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+ device_cert = "Factory", "0x1000";
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+ };
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+ };
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+
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+ fan_5v: regulator-fan-5v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "fan";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ gpio = <&pio 28 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+
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+ pwm-fan {
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+ compatible = "pwm-fan";
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+ #cooling-cells = <2>;
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+ pwms = <&pwm 0 40000 0>;
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+ fan-supply = <&fan_5v>;
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+ interrupt-parent = <&pio>;
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+ interrupts = <29 IRQ_TYPE_EDGE_RISING>;
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+ cooling-levels = <0 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36
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+ 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 37 38 39
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+ 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
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+ 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79
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+ 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
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+ 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119
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+ 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139
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+ 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159
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+ 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179
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+ 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199
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+ 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219
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+ 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239
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+ 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>;
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+ };
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+
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+ gpio-export {
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+ compatible = "gpio-export";
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+
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+ usb_power {
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+ gpio-export,name = "usb_power";
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+ gpio-export,output = <1>;
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+ gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
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+ };
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+ };
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+};
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+
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+&uart0 {
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+ status = "okay";
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+};
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+
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+&watchdog {
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+ status = "okay";
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+};
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+
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+ð {
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+ status = "okay";
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+
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+ gmac0: mac@0 {
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+ compatible = "mediatek,eth-mac";
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+ reg = <0>;
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+ phy-mode = "2500base-x";
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+ fixed-link {
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+ speed = <2500>;
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+ full-duplex;
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+ pause;
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+ };
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+ };
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+
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+ gmac1: mac@1 {
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+ compatible = "mediatek,eth-mac";
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+ reg = <1>;
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+ phy-mode = "gmii";
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+ phy-handle = <&phy0>;
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+ };
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+
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+ mdio: mdio-bus {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ phy0: phy@0 {
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+ compatible = "ethernet-phy-id03a2.9461";
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+ reg = <0>;
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+ nvmem-cells = <&phy_calibration>;
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+ nvmem-cell-names = "phy-cal-data";
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+ };
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+
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+ phy5: phy@5 {
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+ compatible = "ethernet-phy-id67c9.de0a";
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+ reg = <5>;
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+ reset-gpios = <&pio 14 1>;
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+ reset-assert-us = <600>;
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+ reset-deassert-us = <20000>;
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+ };
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+ };
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+};
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+
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+&hnat {
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+ mtketh-wan = "eth0";
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+ mtketh-lan = "eth1";
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+ mtketh-ppd = "eth1";
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+ mtketh-max-gmac = <2>;
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+ status = "okay";
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+};
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+
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+&spi0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi0_flash_pins>;
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+ status = "okay";
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+ spi_nand: spi_nand@0 {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "spi-nand";
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+ reg = <0>;
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+ spi-max-frequency = <52000000>;
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+ spi-tx-buswidth = <4>;
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+ spi-rx-buswidth = <4>;
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+ };
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+};
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+
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+&pio {
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+ pwm0_pin: pwm0-pin-g0 {
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+ mux {
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+ function = "pwm";
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+ groups = "pwm0_1";
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+ };
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+ };
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+
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+ spi0_flash_pins: spi0-pins {
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+ mux {
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+ function = "spi";
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+ groups = "spi0", "spi0_wp_hold";
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+ };
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+
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+ conf-pu {
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+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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+ drive-strength = <MTK_DRIVE_8mA>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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+ };
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+
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+ conf-pd {
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+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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+ drive-strength = <MTK_DRIVE_8mA>;
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+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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+ };
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+ };
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+};
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+
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+&xhci {
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+ mediatek,u3p-dis-msk = <0x0>;
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+ phys = <&u2port0 PHY_TYPE_USB2>,
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+ <&u3port0 PHY_TYPE_USB3>;
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+ status = "okay";
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+};
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+
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+&pwm {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm0_pin>;
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+};
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--
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2.34.1
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