gl-infra-builder-FUjr/patches-siflower-18.x/0304-fix-EC20-dongle-panic.patch
2021-11-29 10:45:40 +08:00

67 lines
2.6 KiB
Diff

From 034d2febe7b5bb49a47f144cabb40ad5a68cac11 Mon Sep 17 00:00:00 2001
From: "GL.iNet-Xinfa.Deng" <xinfa.deng@gl-inet.com>
Date: Thu, 18 Nov 2021 11:35:20 +0800
Subject: [PATCH] fix: EC20 dongle panic
---
.../linux-4.14.90/drivers/usb/dwc2/hcd_intr.c | 20 ++++++++++++++++----
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/linux-4.14.90-dev/linux-4.14.90/drivers/usb/dwc2/hcd_intr.c b/linux-4.14.90-dev/linux-4.14.90/drivers/usb/dwc2/hcd_intr.c
index 17905ba..60f9915 100644
--- a/linux-4.14.90-dev/linux-4.14.90/drivers/usb/dwc2/hcd_intr.c
+++ b/linux-4.14.90-dev/linux-4.14.90/drivers/usb/dwc2/hcd_intr.c
@@ -487,7 +487,7 @@ static int dwc2_update_urb_state(struct dwc2_hsotg *hsotg,
&short_read);
if (urb->actual_length + xfer_length > urb->length) {
- dev_warn(hsotg->dev, "%s(): trimming xfer length\n", __func__);
+ dev_dbg(hsotg->dev, "%s(): trimming xfer length\n", __func__);
xfer_length = urb->length - urb->actual_length;
}
@@ -1160,7 +1160,7 @@ static void dwc2_update_urb_state_abn(struct dwc2_hsotg *hsotg,
u32 hctsiz;
if (urb->actual_length + xfer_length > urb->length) {
- dev_warn(hsotg->dev, "%s(): trimming xfer length\n", __func__);
+ dev_dbg(hsotg->dev, "%s(): trimming xfer length\n", __func__);
xfer_length = urb->length - urb->actual_length;
}
@@ -1919,10 +1919,10 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,
dwc2_halt_channel(hsotg, chan, qtd,
DWC2_HC_XFER_PERIODIC_INCOMPLETE);
} else {
- dev_err(hsotg->dev,
+ dev_dbg(hsotg->dev,
"%s: Channel %d - ChHltd set, but reason is unknown\n",
__func__, chnum);
- dev_err(hsotg->dev,
+ dev_dbg(hsotg->dev,
"hcint 0x%08x, intsts 0x%08x\n",
chan->hcint,
dwc2_readl(hsotg->regs + GINTSTS));
@@ -1938,6 +1938,18 @@ error:
qtd->error_count++;
dwc2_update_urb_state_abn(hsotg, chan, chnum, qtd->urb,
qtd, DWC2_HC_XFER_XACT_ERR);
+ /*
+ * We can get here after a completed transaction
+ * (urb->actual_length >= urb->length) which was not reported
+ * as completed. If that is the case, and we do not abort
+ * the transfer, a transfer of size 0 will be enqueued
+ * subsequently. If urb->actual_length is not DMA-aligned,
+ * the buffer will then point to an unaligned address, and
+ * the resulting behavior is undefined. Bail out in that
+ * situation.
+ */
+ if (qtd->urb->actual_length >= qtd->urb->length)
+ qtd->error_count = 3;
dwc2_hcd_save_data_toggle(hsotg, chan, chnum, qtd);
dwc2_halt_channel(hsotg, chan, qtd, DWC2_HC_XFER_XACT_ERR);
}
--
2.7.4