Merge branch 'master'

This commit is contained in:
VIKING 2025-08-10 20:02:19 +08:00
commit 1fc763e683
47 changed files with 1727 additions and 278 deletions

View File

@ -11,15 +11,24 @@ USBNET_DIR:=net/usb
USBHID_DIR?=hid/usbhid
USBINPUT_DIR?=input/misc
define KernelPackage/usb-common
TITLE:=USB common
HIDDEN:=1
DEPENDS:=@(USB_SUPPORT||USB_GADGET_SUPPORT)
KCONFIG:=CONFIG_USB_COMMON
FILES:=$(LINUX_DIR)/drivers/usb/common/usb-common.ko
AUTOLOAD:=$(call AutoLoad,20,usb-common,1)
endef
$(eval $(call KernelPackage,usb-common))
define KernelPackage/usb-core
SUBMENU:=$(USB_MENU)
TITLE:=Support for USB
DEPENDS:=@USB_SUPPORT
DEPENDS:=@USB_SUPPORT +USB_SUPPORT:kmod-usb-common
KCONFIG:=CONFIG_USB CONFIG_XPS_USB_HCD_XILINX=n CONFIG_USB_FHCI_HCD=n
FILES:= \
$(LINUX_DIR)/drivers/usb/core/usbcore.ko \
$(LINUX_DIR)/drivers/usb/common/usb-common.ko
AUTOLOAD:=$(call AutoLoad,20,usb-common usbcore,1)
FILES:=$(LINUX_DIR)/drivers/usb/core/usbcore.ko
AUTOLOAD:=$(call AutoLoad,20,usbcore,1)
$(call AddDepends/nls)
endef
@ -90,14 +99,15 @@ $(eval $(call KernelPackage,phy-ath79-usb))
define KernelPackage/usb-gadget
SUBMENU:=$(USB_MENU)
TITLE:=USB Gadget support
KCONFIG:=CONFIG_USB_GADGET
HIDDEN:=1
FILES:=\
$(LINUX_DIR)/drivers/usb/gadget/udc/udc-core.ko
AUTOLOAD:=$(call AutoLoad,21,udc-core,1)
DEPENDS:=@USB_GADGET_SUPPORT
$(call AddDepends/usb)
DEPENDS:=@USB_GADGET_SUPPORT +kmod-usb-common
$(call AddDepends/nls)
endef
define KernelPackage/usb-gadget/description
@ -106,14 +116,20 @@ endef
$(eval $(call KernelPackage,usb-gadget))
define AddDepends/usbgadget
SUBMENU:=$(USB_MENU)
DEPENDS+=+kmod-usb-gadget $(1)
endef
define KernelPackage/usb-lib-composite
TITLE:=USB lib composite
KCONFIG:=CONFIG_USB_LIBCOMPOSITE
DEPENDS:=+kmod-usb-gadget +kmod-fs-configfs
HIDDEN:=1
FILES:=$(LINUX_DIR)/drivers/usb/gadget/libcomposite.ko
AUTOLOAD:=$(call AutoLoad,50,libcomposite)
$(call AddDepends/usb)
$(call AddDepends/usbgadget,+kmod-fs-configfs)
endef
define KernelPackage/usb-lib-composite/description
@ -125,12 +141,11 @@ $(eval $(call KernelPackage,usb-lib-composite))
define KernelPackage/usb-gadget-hid
TITLE:=USB HID Gadget Support
KCONFIG:=CONFIG_USB_G_HID
DEPENDS:=+kmod-usb-gadget +kmod-usb-lib-composite
FILES:= \
$(LINUX_DIR)/drivers/usb/gadget/legacy/g_hid.ko \
$(LINUX_DIR)/drivers/usb/gadget/function/usb_f_hid.ko
AUTOLOAD:=$(call AutoLoad,52,usb_f_hid)
$(call AddDepends/usb)
$(call AddDepends/usbgadget,+kmod-usb-lib-composite)
endef
define KernelPackage/usb-gadget-hid/description
@ -145,9 +160,8 @@ define KernelPackage/usb-gadget-ehci-debug
CONFIG_USB_G_DBGP \
CONFIG_USB_G_DBGP_SERIAL=y \
CONFIG_USB_G_DBGP_PRINTK=n
DEPENDS:=+kmod-usb-gadget +kmod-usb-lib-composite +kmod-usb-gadget-serial
FILES:=$(LINUX_DIR)/drivers/usb/gadget/legacy/g_dbgp.ko
$(call AddDepends/usb)
$(call AddDepends/usbgadget,+kmod-usb-lib-composite +kmod-usb-gadget-serial)
endef
define KernelPackage/usb-gadget-ehci-debug/description
@ -162,7 +176,6 @@ define KernelPackage/usb-gadget-eth
CONFIG_USB_ETH \
CONFIG_USB_ETH_RNDIS=y \
CONFIG_USB_ETH_EEM=n
DEPENDS:=+kmod-usb-gadget +kmod-usb-lib-composite
FILES:= \
$(LINUX_DIR)/drivers/usb/gadget/function/u_ether.ko \
$(LINUX_DIR)/drivers/usb/gadget/function/usb_f_ecm.ko \
@ -170,7 +183,7 @@ define KernelPackage/usb-gadget-eth
$(LINUX_DIR)/drivers/usb/gadget/function/usb_f_rndis.ko \
$(LINUX_DIR)/drivers/usb/gadget/legacy/g_ether.ko
AUTOLOAD:=$(call AutoLoad,52,usb_f_ecm)
$(call AddDepends/usb)
$(call AddDepends/usbgadget,+kmod-usb-lib-composite)
endef
define KernelPackage/usb-gadget-eth/description
@ -182,13 +195,11 @@ $(eval $(call KernelPackage,usb-gadget-eth))
define KernelPackage/usb-gadget-ncm
TITLE:=USB Network Control Model (NCM) Gadget support
KCONFIG:=CONFIG_USB_G_NCM
DEPENDS:=+kmod-usb-gadget +kmod-usb-lib-composite \
+kmod-usb-gadget-eth
FILES:= \
$(LINUX_DIR)/drivers/usb/gadget/function/usb_f_ncm.ko \
$(LINUX_DIR)/drivers/usb/gadget/legacy/g_ncm.ko
AUTOLOAD:=$(call AutoLoad,52,usb_f_ncm)
$(call AddDepends/usb)
$(call AddDepends/usbgadget,+kmod-usb-lib-composite +kmod-usb-gadget-eth)
endef
define KernelPackage/usb-gadget-ncm/description
@ -200,7 +211,6 @@ $(eval $(call KernelPackage,usb-gadget-ncm))
define KernelPackage/usb-gadget-serial
TITLE:=USB Serial Gadget support
KCONFIG:=CONFIG_USB_G_SERIAL
DEPENDS:=+kmod-usb-gadget +kmod-usb-lib-composite
FILES:= \
$(LINUX_DIR)/drivers/usb/gadget/function/u_serial.ko \
$(LINUX_DIR)/drivers/usb/gadget/function/usb_f_acm.ko \
@ -208,7 +218,7 @@ define KernelPackage/usb-gadget-serial
$(LINUX_DIR)/drivers/usb/gadget/function/usb_f_serial.ko \
$(LINUX_DIR)/drivers/usb/gadget/legacy/g_serial.ko
AUTOLOAD:=$(call AutoLoad,52,usb_f_acm)
$(call AddDepends/usb)
$(call AddDepends/usbgadget,+kmod-usb-lib-composite)
endef
define KernelPackage/usb-gadget-serial/description
@ -220,12 +230,11 @@ $(eval $(call KernelPackage,usb-gadget-serial))
define KernelPackage/usb-gadget-mass-storage
TITLE:=USB Mass Storage support
KCONFIG:=CONFIG_USB_MASS_STORAGE
DEPENDS:=+kmod-usb-gadget +kmod-usb-lib-composite
FILES:= \
$(LINUX_DIR)/drivers/usb/gadget/function/usb_f_mass_storage.ko \
$(LINUX_DIR)/drivers/usb/gadget/legacy/g_mass_storage.ko
AUTOLOAD:=$(call AutoLoad,52,usb_f_mass_storage)
$(call AddDepends/usb)
$(call AddDepends/usbgadget,+kmod-usb-lib-composite)
endef
define KernelPackage/usb-gadget-mass-storage/description
@ -237,10 +246,11 @@ $(eval $(call KernelPackage,usb-gadget-mass-storage))
define KernelPackage/usb-gadget-cdc-composite
TITLE:= USB CDC Composite (Ethernet + ACM)
KCONFIG:=CONFIG_USB_CDC_COMPOSITE
DEPENDS:=+kmod-usb-gadget +kmod-usb-lib-composite \
+kmod-usb-gadget-eth +kmod-usb-gadget-serial
FILES:= $(LINUX_DIR)/drivers/usb/gadget/legacy/g_cdc.ko
$(call AddDepends/usb)
$(call AddDepends/usbgadget, \
+kmod-usb-lib-composite \
+kmod-usb-gadget-eth \
+kmod-usb-gadget-serial)
endef
define KernelPackage/usb-gadget-cdc-composite/description
@ -460,13 +470,15 @@ $(eval $(call KernelPackage,usb-dwc2-pci))
define KernelPackage/usb-cdns
SUBMENU:=$(USB_MENU)
TITLE:=Cadence USB USB controller driver
DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget +kmod-usb-roles
DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget \
+USB_SUPPORT:kmod-usb-core \
+kmod-usb-roles
KCONFIG:= \
CONFIG_USB_CDNS_SUPPORT
FILES:= $(LINUX_DIR)/drivers/usb/cdns3/cdns-usb-common.ko
AUTOLOAD:=$(call AutoLoad,50,cdns-usb-common,1)
$(call AddDepends/usb)
endef
define KernelPackage/usb-cdns/description
@ -478,15 +490,15 @@ $(eval $(call KernelPackage,usb-cdns))
define KernelPackage/usb-cdns3
SUBMENU:=$(USB_MENU)
TITLE:=Cadence USB3 USB controller driver
DEPENDS:=+kmod-usb-cdns
KCONFIG:= \
CONFIG_USB_CDNS3 \
CONFIG_USB_CDNS3_GADGET=y \
CONFIG_USB_CDNS3_HOST=y
CONFIG_USB_CDNS3_GADGET=$(if $(CONFIG_USB_GADGET_SUPPORT),y,n) \
CONFIG_USB_CDNS3_HOST=$(if $(CONFIG_USB_SUPPORT),y,n)
FILES:= $(LINUX_DIR)/drivers/usb/cdns3/cdns3.ko
AUTOLOAD:=$(call AutoLoad,54,cdns3,1)
$(call AddDepends/usb)
endef
define KernelPackage/usb-cdns3/description
@ -498,17 +510,28 @@ $(eval $(call KernelPackage,usb-cdns3))
define KernelPackage/usb-dwc3
SUBMENU:=$(USB_MENU)
TITLE:=DWC3 USB controller driver
DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget \
+USB_SUPPORT:kmod-usb-core \
+kmod-usb-roles
KCONFIG:= \
CONFIG_USB_DWC3 \
CONFIG_USB_DWC3_HOST=y \
CONFIG_USB_DWC3_GADGET=n \
CONFIG_USB_DWC3_DUAL_ROLE=n \
CONFIG_USB_DWC3_DEBUG=n \
CONFIG_USB_DWC3_VERBOSE=n
ifeq ($(CONFIG_USB_SUPPORT)$(CONFIG_USB_GADGET_SUPPORT),yy)
KCONFIG+= \
CONFIG_USB_DWC3_HOST=n \
CONFIG_USB_DWC3_GADGET=n \
CONFIG_USB_DWC3_DUAL_ROLE=y
else
KCONFIG+= \
CONFIG_USB_DWC3_HOST=$(if $(CONFIG_USB_SUPPORT),y,n) \
CONFIG_USB_DWC3_GADGET=$(if $(CONFIG_USB_GADGET_SUPPORT),y,n) \
CONFIG_USB_DWC3_DUAL_ROLE=n
endif
FILES:= $(LINUX_DIR)/drivers/usb/dwc3/dwc3.ko
AUTOLOAD:=$(call AutoLoad,54,dwc3,1)
$(call AddDepends/usb)
endef
define KernelPackage/usb-dwc3/description
@ -1859,11 +1882,12 @@ endef
$(eval $(call KernelPackage,usb-net2280))
define KernelPackage/usb-roles
SUBMENU:=$(USB_MENU)
TITLE:=USB Role Switch Library Module
DEPENDS:=@USB_SUPPORT||USB_GADGET_SUPPORT
KCONFIG:=CONFIG_USB_ROLE_SWITCH
HIDDEN:=1
FILES:=$(LINUX_DIR)/drivers/usb/roles/roles.ko
$(call AddDepends/usb)
endef
define KernelPackage/usb-roles/description

View File

@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/mac80211/sta_info.c
+++ b/net/mac80211/sta_info.c
@@ -2621,6 +2621,27 @@ static inline u64 sta_get_stats_bytes(st
@@ -2621,6 +2621,29 @@ static inline u64 sta_get_stats_bytes(st
return value;
}
@ -33,6 +33,8 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+
+ duration = ieee80211_rate_expected_tx_airtime(hw, NULL, ri, band, true, 1024);
+ duration += duration >> 4; /* add assumed packet error rate of ~6% */
+ if (!duration)
+ return 0;
+
+ return ((1024 * USEC_PER_SEC) / duration) * 8;
+}
@ -40,7 +42,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
void sta_set_sinfo(struct sta_info *sta, struct station_info *sinfo,
bool tidstats)
{
@@ -2865,6 +2886,8 @@ void sta_set_sinfo(struct sta_info *sta,
@@ -2865,6 +2888,8 @@ void sta_set_sinfo(struct sta_info *sta,
sinfo->sta_flags.set |= BIT(NL80211_STA_FLAG_TDLS_PEER);
thr = sta_get_expected_throughput(sta);

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@ -8,7 +8,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=openssl
PKG_VERSION:=3.5.1
PKG_VERSION:=3.5.2
PKG_RELEASE:=1
PKG_BUILD_FLAGS:=no-mips16 gc-sections no-lto
@ -21,7 +21,7 @@ PKG_SOURCE_URL:= \
https://www.openssl.org/source/old/$(PKG_BASE)/ \
https://github.com/openssl/openssl/releases/download/$(PKG_NAME)-$(PKG_VERSION)/
PKG_HASH:=529043b15cffa5f36077a4d0af83f3de399807181d607441d734196d889b641f
PKG_HASH:=c53a47e5e441c930c3928cf7bf6fb00e5d129b630e0aa873b08258656e7345ec
PKG_LICENSE:=Apache-2.0
PKG_LICENSE_FILES:=LICENSE

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@ -21,7 +21,8 @@ include $(INCLUDE_DIR)/cmake.mk
define Package/netifd
SECTION:=base
CATEGORY:=Base system
DEPENDS:=+libuci +libnl-tiny +libubus +ubus +ubusd +jshn +libubox +libudebug +ucode +ucode-mod-fs
DEPENDS:=+libuci +libnl-tiny +libubus +ubus +ubusd +jshn +libubox +libudebug \
+ucode +ucode-mod-fs +ucode-mod-ubus +ucode-mod-uloop +ucode-mod-uci
TITLE:=OpenWrt Network Interface Configuration Daemon
endef

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@ -159,6 +159,8 @@ function setup_sta(data, config) {
config.group = 'GCMP';
}
config.key_mgmt ??= 'NONE';
config.basic_rate = ratelist(config.basic_rate);
config.mcast_rate = ratestr(config.mcast_rate);

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@ -0,0 +1,6 @@
#!/bin/sh
[ "$ACTION" = "pressed" ] && exit 5
for script in /etc/rc.wps/*; do
[ -x "$script" ] || continue
"$script" && break
done

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@ -0,0 +1,10 @@
#!/bin/sh
[ "$SEEN" -ge 3 ] && exit 1
wps_done=0
ubusobjs="$( ubus -S list hostapd.* )"
for ubusobj in $ubusobjs; do
ubus -S call $ubusobj wps_start && wps_done=1
done
[ $wps_done = 1 ]

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@ -1,4 +1,6 @@
#!/bin/sh
[ "$SEEN" -lt 3 ] && exit 1
[ "$ACTION" = "released" ] || exit 1
wps_catch_credentials() {
local iface ifaces ifc ifname ssid encryption key radio radios
@ -38,32 +40,18 @@ wps_catch_credentials() {
done
}
if [ "$ACTION" = "released" ] && [ "$BUTTON" = "wps" ]; then
# If the button was pressed for 3 seconds or more, trigger WPS on
# wpa_supplicant only, no matter if hostapd is running or not. If
# was pressed for less than 3 seconds, try triggering on
# hostapd. If there is no hostapd instance to trigger it on or WPS
# is not enabled on them, trigger it on wpa_supplicant.
if [ "$SEEN" -lt 3 ] ; then
wps_done=0
ubusobjs="$( ubus -S list hostapd.* )"
for ubusobj in $ubusobjs; do
ubus -S call $ubusobj wps_start && wps_done=1
done
[ $wps_done = 0 ] || return 0
wps_done=0
ubusobjs="$( ubus -S list wpa_supplicant.* )"
for ubusobj in $ubusobjs; do
ifname="$(echo $ubusobj | cut -d'.' -f2 )"
multi_ap=""
if [ -e "/var/run/wpa_supplicant-${ifname}.conf.is_multiap" ]; then
ubus -S call $ubusobj wps_start '{ "multi_ap": true }' && wps_done=1
else
ubus -S call $ubusobj wps_start && wps_done=1
fi
wps_done=0
ubusobjs="$( ubus -S list wpa_supplicant.* )"
for ubusobj in $ubusobjs; do
ifname="$(echo $ubusobj | cut -d'.' -f2 )"
multi_ap=""
if [ -e "/var/run/wpa_supplicant-${ifname}.conf.is_multiap" ]; then
ubus -S call $ubusobj wps_start '{ "multi_ap": true }' && wps_done=1
else
ubus -S call $ubusobj wps_start && wps_done=1
fi
done
[ $wps_done = 0 ] || wps_catch_credentials &
fi
done
[ $wps_done = 0 ] && exit 1
return 0
wps_catch_credentials &
exit 0

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@ -726,14 +726,12 @@ endef
define Package/hostapd-common/install
$(INSTALL_DIR) \
$(1)/etc/capabilities \
$(1)/etc/rc.button \
$(1)/etc/hotplug.d/ieee80211 \
$(1)/etc/init.d $(1)/lib/netifd \
$(1)/usr/share/acl.d \
$(1)/usr/share/hostap
$(INSTALL_BIN) ./files/dhcp-get-server.sh $(1)/lib/netifd/dhcp-get-server.sh
$(INSTALL_BIN) ./files/wpad.init $(1)/etc/init.d/wpad
$(INSTALL_BIN) ./files/wps-hotplug.sh $(1)/etc/rc.button/wps
$(INSTALL_DATA) ./files/wpad_acl.json $(1)/usr/share/acl.d
$(INSTALL_DATA) ./files/wpad.json $(1)/etc/capabilities
endef

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@ -8,13 +8,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=rpcd
PKG_RELEASE:=2
PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/rpcd.git
PKG_MIRROR_HASH:=51c77637b65dd3dbd0d39f902223678d190fb409a1293ac92bd5665ac790cab4
PKG_SOURCE_DATE:=2025-06-22
PKG_SOURCE_VERSION:=9389775ceb4702c82bd62b79cf17b0359c63e527
PKG_MIRROR_HASH:=1628372b214012b2c1c686d03692ee84e04e033669a0269a06de6dac4d20e974
PKG_SOURCE_DATE:=2025-08-09
PKG_SOURCE_VERSION:=1905e096a8b722e67733cd4088026f571b27e521
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
PKG_LICENSE:=ISC

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@ -0,0 +1,15 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7981b-creatlentem-clt-r30b1-common.dtsi"
/ {
model = "CreatLentem CLT-R30B1 (112M)";
compatible = "creatlentem,clt-r30b1-112m", "mediatek,mt7981";
};
&partitions {
partition@580000 {
label = "ubi";
reg = <0x0580000 0x7000000>;
};
};

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@ -0,0 +1,273 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "mt7981b.dtsi"
/ {
aliases {
led-boot = &led_status_red;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_green;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led_status_green: green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
led_status_red: red {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 12 GPIO_ACTIVE_LOW>;
};
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_24 0>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
label = "wan";
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_2a 0>;
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
macaddr_factory_24: macaddr@24 {
compatible = "mac-base";
reg = <0x24 0x6>;
#nvmem-cell-cells = <1>;
};
macaddr_factory_2a: macaddr@2a {
compatible = "mac-base";
reg = <0x2a 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
#address-cells = <1>;
#size-cells = <0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
status = "okay";
band@0 {
reg = <0>;
nvmem-cells = <&macaddr_factory_4 0>;
nvmem-cell-names = "mac-address";
};
band@1 {
reg = <1>;
nvmem-cells = <&macaddr_factory_4 1>;
nvmem-cell-names = "mac-address";
};
};

View File

@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7981b-creatlentem-clt-r30b1-common.dtsi"
/ {
model = "CreatLentem CLT-R30B1";
compatible = "creatlentem,clt-r30b1", "mediatek,mt7981";
};
&partitions {
partition@580000 {
label = "ubi";
reg = <0x0580000 0x4000000>;
};
partition@4580000 {
label = "data";
reg = <0x4580000 0x2000000>;
};
};

View File

@ -0,0 +1,210 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "mt7981b.dtsi"
/ {
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
bias-pull-up = <103>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
read-only;
};
factory: partition@180000 {
label = "factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
};
partition@380000 {
label = "fip";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
partition@4580000 {
label = "hw";
reg = <0x4580000 0x80000>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_hw_44e: macaddr@44e {
compatible = "mac-base";
reg = <0x44e 0x11>;
#nvmem-cell-cells = <1>;
};
};
};
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_hw_44e 0>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_hw_44e 1>;
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan1";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory 0>;
nvmem-cell-names = "eeprom";
};

View File

@ -0,0 +1,63 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "mt7981b-wavlink-wl-3port-128nand-common.dtsi"
/ {
model = "WAVLINK WL-WN551X3";
compatible = "wavlink,wl-wn551x3", "mediatek,mt7981b";
aliases {
label-mac-device = &wifi;
led-boot = &led_status_blue;
led-failsafe = &led_status_blue;
led-running = &led_status_blue;
led-upgrade = &led_status_blue;
serial0 = &uart0;
};
leds {
compatible = "gpio-leds";
led_status_blue: led-0 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
};
led-1 {
color = <LED_COLOR_ID_RED>;
gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
};
led-2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
led-3 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
led-4 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
gpios = <&pio 25 GPIO_ACTIVE_LOW>;
};
};
};
&usb_phy {
status = "okay";
};
&xhci {
status = "okay";
};

View File

@ -227,6 +227,11 @@ tplink,tl-7dr7250-v1)
ucidef_set_led_netdev "lan2" "LAN2" "mt7530-0:00:green:lan" "lan2"
ucidef_set_led_netdev "lan3" "LAN3" "mdio-bus:0f:green:lan" "lan3"
;;
wavlink,wl-wn551x3)
ucidef_set_led_netdev "lan-1" "lan-1" "green:lan-1" "lan1" "link tx rx"
ucidef_set_led_netdev "lan-2" "lan-2" "green:lan-2" "lan2" "link tx rx"
ucidef_set_led_netdev "wan" "wan" "green:wan" "eth1" "link tx rx"
;;
wavlink,wl-wn586x3)
ucidef_set_led_netdev "lan-1" "lan-1" "blue:lan-1" "lan1" "link tx rx"
ucidef_set_led_netdev "lan-2" "lan-2" "blue:lan-2" "lan2" "link tx rx"

View File

@ -43,6 +43,8 @@ mediatek_setup_interfaces()
cmcc,a10-stock|\
cmcc,a10-ubootmod|\
confiabits,mt7981|\
creatlentem,clt-r30b1|\
creatlentem,clt-r30b1-112m|\
cudy,wr3000-v1|\
jcg,q30-pro|\
keenetic,kn-3811|\
@ -146,6 +148,7 @@ mediatek_setup_interfaces()
ucidef_set_interfaces_lan_wan "port1 port3 port4 port5 port6" "port2"
;;
tplink,tl-xdr6086|\
wavlink,wl-wn551x3|\
wavlink,wl-wn586x3)
ucidef_set_interfaces_lan_wan "lan1 lan2" eth1
;;

View File

@ -273,6 +273,8 @@ platform_check_image() {
fit_check_image "$1"
return $?
;;
creatlentem,clt-r30b1|\
creatlentem,clt-r30b1-112m|\
nradio,c8-668gl)
# tar magic `ustar`
magic="$(dd if="$1" bs=1 skip=257 count=5 2>/dev/null)"

View File

@ -774,6 +774,41 @@ define Device/confiabits_mt7981
endef
TARGET_DEVICES += confiabits_mt7981
define Device/creatlentem_clt-r30b1-common
DEVICE_VENDOR := CreatLentem
DEVICE_MODEL := CLT-R30B1
DEVICE_ALT0_VENDOR := EDUP
DEVICE_ALT0_MODEL := RT2980
DEVICE_ALT1_VENDOR := Dragonglass
DEVICE_ALT1_MODEL := DXG21
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_IN_UBI := 1
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
define Device/creatlentem_clt-r30b1-112m
DEVICE_VARIANT := 112M
DEVICE_ALT0_VARIANT := 112M
DEVICE_ALT1_VARIANT := 112M
DEVICE_DTS := mt7981b-creatlentem-clt-r30b1-112m
SUPPORTED_DEVICES += clt,r30b1 clt,r30b1-112m
IMAGE_SIZE := 114688k
$(call Device/creatlentem_clt-r30b1-common)
endef
TARGET_DEVICES += creatlentem_clt-r30b1-112m
define Device/creatlentem_clt-r30b1
DEVICE_DTS := mt7981b-creatlentem-clt-r30b1
SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
IMAGE_SIZE := 65536k
$(call Device/creatlentem_clt-r30b1-common)
endef
TARGET_DEVICES += creatlentem_clt-r30b1
define Device/cudy_ap3000outdoor-v1
DEVICE_VENDOR := Cudy
DEVICE_MODEL := AP3000 Outdoor
@ -1804,7 +1839,7 @@ define Device/nradio_c8-668gl
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware \
kmod-usb-serial-option kmod-usb-net-cdc-ether kmod-usb-net-qmi-wwan \
kmod-usb3
kmod-usb3 automount
IMAGE_SIZE := 131072k
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata | check-size
endef
@ -1835,7 +1870,7 @@ define Device/openfi_6c
DEVICE_MODEL := 6C
DEVICE_DTS := mt7981b-openfi-6c
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3 automount
KERNEL := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
@ -1850,7 +1885,8 @@ define Device/openwrt_one
DEVICE_DTS_DIR := ../dts
DEVICE_DTC_FLAGS := --pad 4096
DEVICE_DTS_LOADADDR := 0x43f00000
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware kmod-rtc-pcf8563 kmod-usb3 kmod-phy-airoha-en8811h
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware \
kmod-rtc-pcf8563 kmod-usb3 kmod-phy-airoha-en8811h automount
KERNEL_LOADADDR := 0x44000000
KERNEL := kernel-bin | gzip
KERNEL_INITRAMFS := kernel-bin | lzma | \
@ -1947,7 +1983,7 @@ define Device/routerich_ax3000-ubootmod
IMAGE/sysupgrade.itb := append-kernel | \
fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | \
append-metadata
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware kmod-usb3 mt7981-wo-firmware
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware kmod-usb3 mt7981-wo-firmware automount
ARTIFACTS := preloader.bin bl31-uboot.fip
ARTIFACT/preloader.bin := mt7981-bl2 spim-nand-ddr3
ARTIFACT/bl31-uboot.fip := mt7981-bl31-uboot routerich_ax3000
@ -1960,7 +1996,7 @@ define Device/routerich_ax3000-v1
DEVICE_VARIANT := v1
DEVICE_DTS := mt7981b-routerich-ax3000-v1
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware kmod-usb3 mt7981-wo-firmware
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware kmod-usb3 mt7981-wo-firmware automount
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
endef
@ -2209,6 +2245,24 @@ define Device/unielec_u7981-01-nand
endef
TARGET_DEVICES += unielec_u7981-01-nand
define Device/wavlink_wl-wn551x3
DEVICE_VENDOR := WAVLINK
DEVICE_MODEL := WL-WN551X3
DEVICE_DTS := mt7981b-wavlink-wl-wn551x3
DEVICE_DTS_DIR := ../dts
DEVICE_DTS_LOADADDR := 0x47000000
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 65536k
KERNEL_INITRAMFS_SUFFIX := .itb
KERNEL_IN_UBI := 1
DEVICE_PACKAGES := kmod-usb3 kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware automount
SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += wavlink_wl-wn551x3
define Device/wavlink_wl-wn586x3
DEVICE_VENDOR := WAVLINK
DEVICE_MODEL := WL-WN586X3
@ -2420,7 +2474,8 @@ define Device/zbtlink_zbt-z8102ax-v2
DEVICE_MODEL := ZBT-Z8102AX-V2
DEVICE_DTS := mt7981b-zbtlink-zbt-z8102ax-v2
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3 kmod-usb-net-qmi-wwan kmod-usb-serial-option
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3 \
kmod-usb-net-qmi-wwan kmod-usb-serial-option automount
KERNEL_IN_UBI := 1
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k

View File

@ -0,0 +1,171 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7628an.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "hongdian,h7920-v40", "mediatek,mt7628an-soc";
model = "Hongdian H7920 v40";
aliases {
led-boot = &led_sys;
led-failsafe = &led_sys;
led-running = &led_sys;
led-upgrade = &led_sys;
};
chosen {
bootargs = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
led-rf {
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = "rf";
};
led-net {
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_MOBILE;
};
led_sys: led-sys {
gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
default-state = "on";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
hw_algo = "toggle";
hw_margin_ms = <600>;
always-running;
};
gpio-export {
compatible = "gpio-export";
gpio_modem_power {
gpio-export,name = "modem_power";
gpio-export,output = <0>;
gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
};
gpio_serial_rs485_mode {
gpio-export,name = "serial_rs485_mode";
gpio-export,output = <0>;
gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
};
};
};
&watchdog {
status = "disabled";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x400>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xfb0000>;
};
};
};
};
&state_default {
gpio {
groups = "i2s", "gpio", "refclk";
function = "gpio";
};
};
&ethernet {
nvmem-cells = <&macaddr_factory_28>;
nvmem-cell-names = "mac-address";
};
&esw {
mediatek,portmap = <0x3e>;
mediatek,portdisable = <0x3c>;
};
&wmac {
status = "okay";
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&uart1 {
status = "okay";
};
&pcie {
status = "okay";
};

View File

@ -340,6 +340,15 @@ define Device/hiwifi_hc5861b
endef
TARGET_DEVICES += hiwifi_hc5861b
define Device/hongdian_h7920-v40
IMAGE_SIZE := 16064k
DEVICE_VENDOR := Hongdian
DEVICE_MODEL := H7920
DEVICE_VARIANT := v40
DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-net-qmi-wwan kmod-usb-serial-option uqmi
endef
TARGET_DEVICES += hongdian_h7920-v40
define Device/huasifei_shf283
IMAGE_SIZE := 16064k
DEVICE_VENDOR := Huasifei

View File

@ -109,6 +109,7 @@ ramips_setup_interfaces()
;;
duzun,dm06|\
glinet,gl-mt300n-v2|\
hongdian,h7920-v40|\
teltonika,rut200|\
teltonika,rut241)
ucidef_add_switch "switch0" \
@ -309,6 +310,7 @@ ramips_setup_macs()
totolink,a3)
wan_mac=$(mtd_get_mac_binary u-boot 0x1fc40)
;;
hongdian,h7920-v40|\
jotale,js76x8-8m|\
jotale,js76x8-16m|\
jotale,js76x8-32m|\

View File

@ -9,6 +9,10 @@ board_config_update
board=$(board_name)
case "$board" in
hongdian,h7920-v40)
ucidef_add_gpio_switch "modem_enable" "Modem power" "modem_power" "1"
ucidef_add_gpio_switch "switch_serial_mode" "Switch RS232 to RS485" "serial_rs485_mode" "0"
;;
teltonika,rut200|\
teltonika,rut241)
ucidef_add_gpio_switch "digital_output" "Digital output" "digital_output" "0"

View File

@ -7,12 +7,12 @@ BOARD:=realtek
BOARDNAME:=Realtek MIPS
DEVICE_TYPE:=basic
FEATURES:=ramdisk squashfs
SUBTARGETS:=rtl838x rtl839x rtl930x rtl931x
SUBTARGETS:=rtl838x rtl839x rtl930x rtl930x_nand rtl931x rtl931x_nand
KERNEL_PATCHVER:=6.12
define Target/Description
Build firmware images for Realtek RTL83xx based boards.
Build firmware images for Realtek RTL83xx/RTL93xx based boards.
endef
include $(INCLUDE_DIR)/target.mk

View File

@ -415,13 +415,6 @@ struct rtl83xx_soc_info {
};
/* rtl83xx-related functions used across subsystems */
int rtl838x_smi_wait_op(int timeout);
int rtl838x_read_phy(u32 port, u32 page, u32 reg, u32 *val);
int rtl838x_write_phy(u32 port, u32 page, u32 reg, u32 val);
int rtl839x_read_phy(u32 port, u32 page, u32 reg, u32 *val);
int rtl839x_write_phy(u32 port, u32 page, u32 reg, u32 val);
int rtl930x_read_phy(u32 port, u32 page, u32 reg, u32 *val);
int rtl930x_write_phy(u32 port, u32 page, u32 reg, u32 val);
int rtl931x_read_phy(u32 port, u32 page, u32 reg, u32 *val);
int rtl931x_write_phy(u32 port, u32 page, u32 reg, u32 val);

View File

@ -368,7 +368,7 @@ static void rtl83xx_vlan_setup(struct rtl838x_switch_priv *priv)
info.hash_uc_fid = false; /* Do not build the L2 lookup hash with FID, but VID */
info.hash_mc_fid = false; /* Do the same for Multicast packets */
info.profile_id = 0; /* Use default Vlan Profile 0 */
info.tagged_ports = 0; /* Initially no port members */
info.member_ports = 0; /* Initially no port members */
if (priv->family_id == RTL9310_FAMILY_ID) {
info.if_id = 0;
info.multicast_grp_mask = 0;
@ -388,7 +388,7 @@ static void rtl83xx_vlan_setup(struct rtl838x_switch_priv *priv)
*/
for (int i = 0; i <= priv->cpu_port; i++) {
rtl83xx_vlan_set_pvid(priv, i, 0);
info.tagged_ports |= BIT_ULL(i);
info.member_ports |= BIT_ULL(i);
}
priv->r->vlan_set_tagged(0, &info);
@ -1922,19 +1922,19 @@ static int rtl83xx_vlan_prepare(struct dsa_switch *ds, int port,
priv->r->vlan_tables_read(0, &info);
pr_debug("VLAN 0: Tagged ports %llx, untag %llx, profile %d, MC# %d, UC# %d, FID %x\n",
info.tagged_ports, info.untagged_ports, info.profile_id,
pr_debug("VLAN 0: Member ports %llx, untag %llx, profile %d, MC# %d, UC# %d, FID %x\n",
info.member_ports, info.untagged_ports, info.profile_id,
info.hash_mc_fid, info.hash_uc_fid, info.fid);
priv->r->vlan_tables_read(1, &info);
pr_debug("VLAN 1: Tagged ports %llx, untag %llx, profile %d, MC# %d, UC# %d, FID %x\n",
info.tagged_ports, info.untagged_ports, info.profile_id,
pr_debug("VLAN 1: Member ports %llx, untag %llx, profile %d, MC# %d, UC# %d, FID %x\n",
info.member_ports, info.untagged_ports, info.profile_id,
info.hash_mc_fid, info.hash_uc_fid, info.fid);
priv->r->vlan_set_untagged(1, info.untagged_ports);
pr_debug("SET: Untagged ports, VLAN %d: %llx\n", 1, info.untagged_ports);
priv->r->vlan_set_tagged(1, &info);
pr_debug("SET: Tagged ports, VLAN %d: %llx\n", 1, info.tagged_ports);
pr_debug("SET: Member ports, VLAN %d: %llx\n", 1, info.member_ports);
return 0;
}
@ -1983,7 +1983,7 @@ static int rtl83xx_vlan_add(struct dsa_switch *ds, int port,
priv->r->vlan_tables_read(vlan->vid, &info);
/* new VLAN? */
if (!info.tagged_ports) {
if (!info.member_ports) {
info.fid = 0;
info.hash_mc_fid = false;
info.hash_uc_fid = false;
@ -1991,10 +1991,10 @@ static int rtl83xx_vlan_add(struct dsa_switch *ds, int port,
}
/* sanitize untagged_ports - must be a subset */
if (info.untagged_ports & ~info.tagged_ports)
if (info.untagged_ports & ~info.member_ports)
info.untagged_ports = 0;
info.tagged_ports |= BIT_ULL(port);
info.member_ports |= BIT_ULL(port);
if (vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED)
info.untagged_ports |= BIT_ULL(port);
else
@ -2004,7 +2004,7 @@ static int rtl83xx_vlan_add(struct dsa_switch *ds, int port,
pr_debug("Untagged ports, VLAN %d: %llx\n", vlan->vid, info.untagged_ports);
priv->r->vlan_set_tagged(vlan->vid, &info);
pr_debug("Tagged ports, VLAN %d: %llx\n", vlan->vid, info.tagged_ports);
pr_debug("Member ports, VLAN %d: %llx\n", vlan->vid, info.member_ports);
mutex_unlock(&priv->reg_mutex);
@ -2041,13 +2041,13 @@ static int rtl83xx_vlan_del(struct dsa_switch *ds, int port,
/* remove port from both tables */
info.untagged_ports &= (~BIT_ULL(port));
info.tagged_ports &= (~BIT_ULL(port));
info.member_ports &= (~BIT_ULL(port));
priv->r->vlan_set_untagged(vlan->vid, info.untagged_ports);
pr_debug("Untagged ports, VLAN %d: %llx\n", vlan->vid, info.untagged_ports);
priv->r->vlan_set_tagged(vlan->vid, &info);
pr_debug("Tagged ports, VLAN %d: %llx\n", vlan->vid, info.tagged_ports);
pr_debug("Member ports, VLAN %d: %llx\n", vlan->vid, info.member_ports);
mutex_unlock(&priv->reg_mutex);

View File

@ -155,9 +155,9 @@ static void rtl838x_vlan_tables_read(u32 vlan, struct rtl838x_vlan_info *info)
struct table_reg *r = rtl_table_get(RTL8380_TBL_0, 0);
rtl_table_read(r, vlan);
info->tagged_ports = sw_r32(rtl_table_data(r, 0));
info->member_ports = sw_r32(rtl_table_data(r, 0));
v = sw_r32(rtl_table_data(r, 1));
pr_debug("VLAN_READ %d: %016llx %08x\n", vlan, info->tagged_ports, v);
pr_debug("VLAN_READ %d: %016llx %08x\n", vlan, info->member_ports, v);
rtl_table_release(r);
info->profile_id = v & 0x7;
@ -178,7 +178,7 @@ static void rtl838x_vlan_set_tagged(u32 vlan, struct rtl838x_vlan_info *info)
/* Access VLAN table (0) via register 0 */
struct table_reg *r = rtl_table_get(RTL8380_TBL_0, 0);
sw_w32(info->tagged_ports, rtl_table_data(r, 0));
sw_w32(info->member_ports, rtl_table_data(r, 0));
v = info->profile_id;
v |= info->hash_mc_fid ? 0x8 : 0;

View File

@ -246,6 +246,8 @@
#define RTL838X_L2_LRN_CONSTRT_EN (0x3368)
#define RTL838X_L2_PORT_LRN_CONSTRT (0x32A0)
#define RTL839X_L2_PORT_LRN_CONSTRT (0x3914)
#define RTL930X_L2_LRN_PORT_CONSTRT_CTRL (0x90A4)
#define RTL931X_L2_LRN_PORT_CONSTRT_CTRL (0xC96C)
#define RTL838X_L2_PORT_NEW_SALRN(p) (0x328c + (((p >> 4) << 2)))
#define RTL839X_L2_PORT_NEW_SALRN(p) (0x38F0 + (((p >> 4) << 2)))
@ -707,7 +709,7 @@ struct rtl838x_pcs {
struct rtl838x_vlan_info {
u64 untagged_ports;
u64 tagged_ports;
u64 member_ports;
u8 profile_id;
bool hash_mc_fid;
bool hash_uc_fid;

View File

@ -172,8 +172,8 @@ static void rtl839x_vlan_tables_read(u32 vlan, struct rtl838x_vlan_info *info)
w = sw_r32(rtl_table_data(r, 2));
rtl_table_release(r);
info->tagged_ports = u;
info->tagged_ports = (info->tagged_ports << 21) | ((v >> 11) & 0x1fffff);
info->member_ports = u;
info->member_ports = (info->member_ports << 21) | ((v >> 11) & 0x1fffff);
info->profile_id = w >> 30 | ((v & 1) << 2);
info->hash_mc_fid = !!(w & BIT(2));
info->hash_uc_fid = !!(w & BIT(3));
@ -196,8 +196,8 @@ static void rtl839x_vlan_set_tagged(u32 vlan, struct rtl838x_vlan_info *info)
/* Access VLAN table (0) via register 0 */
struct table_reg *r = rtl_table_get(RTL8390_TBL_0, 0);
u = info->tagged_ports >> 21;
v = info->tagged_ports << 11;
u = info->member_ports >> 21;
v = info->member_ports << 11;
v |= ((u32)info->fid) << 3;
v |= info->hash_uc_fid ? BIT(2) : 0;
v |= info->hash_mc_fid ? BIT(1) : 0;

View File

@ -194,9 +194,6 @@ int rtl83xx_lag_del(struct dsa_switch *ds, int group, int port);
/* phy functions that will need to be moved to the future mdio driver */
int rtl930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
int rtl930x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val);
int rtl931x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
int rtl931x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val);

View File

@ -184,7 +184,7 @@ static void rtl930x_vlan_tables_read(u32 vlan, struct rtl838x_vlan_info *info)
pr_debug("VLAN_READ %d: %08x %08x\n", vlan, v, w);
rtl_table_release(r);
info->tagged_ports = v >> 3;
info->member_ports = v >> 3;
info->profile_id = (w >> 24) & 7;
info->hash_mc_fid = !!(w & BIT(27));
info->hash_uc_fid = !!(w & BIT(28));
@ -205,7 +205,7 @@ static void rtl930x_vlan_set_tagged(u32 vlan, struct rtl838x_vlan_info *info)
/* Access VLAN table (1) via register 0 */
struct table_reg *r = rtl_table_get(RTL9300_TBL_0, 1);
v = info->tagged_ports << 3;
v = info->member_ports << 3;
v |= ((u32)info->fid) >> 3;
w = ((u32)info->fid) << 29;
@ -296,6 +296,26 @@ static void rtl930x_l2_learning_setup(void)
sw_w32((0x7fff << 2) | 0, RTL930X_L2_LRN_CONSTRT_CTRL);
}
static void rtldsa_930x_enable_learning(int port, bool enable)
{
/* Limit learning to maximum: 32k entries */
sw_w32_mask(GENMASK(17, 3), enable ? (0x7ffe << 3) : 0,
RTL930X_L2_LRN_PORT_CONSTRT_CTRL + port * 4);
}
static void rtldsa_930x_enable_flood(int port, bool enable)
{
/* 0: forward
* 1: drop
* 2: trap to local CPU
* 3: copy to local CPU
* 4: trap to master CPU
* 5: copy to master CPU
*/
sw_w32_mask(GENMASK(2, 0), enable ? 0 : 1,
RTL930X_L2_LRN_PORT_CONSTRT_CTRL + port * 4);
}
static void rtl930x_stp_get(struct rtl838x_switch_priv *priv, u16 msti, u32 port_state[])
{
u32 cmd = 1 << 17 | /* Execute cmd */
@ -721,125 +741,6 @@ irqreturn_t rtldsa_930x_switch_irq(int irq, void *dev_id)
return IRQ_HANDLED;
}
int rtl930x_write_phy(u32 port, u32 page, u32 reg, u32 val)
{
u32 v;
int err = 0;
pr_debug("%s: port %d, page: %d, reg: %x, val: %x\n", __func__, port, page, reg, val);
if (port > 63 || page > 4095 || reg > 31)
return -ENOTSUPP;
val &= 0xffff;
mutex_lock(&smi_lock);
sw_w32(BIT(port), RTL930X_SMI_ACCESS_PHY_CTRL_0);
sw_w32_mask(0xffff << 16, val << 16, RTL930X_SMI_ACCESS_PHY_CTRL_2);
v = reg << 20 | page << 3 | 0x1f << 15 | BIT(2) | BIT(0);
sw_w32(v, RTL930X_SMI_ACCESS_PHY_CTRL_1);
do {
v = sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_1);
} while (v & 0x1);
if (v & 0x2)
err = -EIO;
mutex_unlock(&smi_lock);
return err;
}
int rtl930x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
{
u32 v;
int err = 0;
if (port > 63 || page > 4095 || reg > 31)
return -ENOTSUPP;
mutex_lock(&smi_lock);
sw_w32_mask(0xffff << 16, port << 16, RTL930X_SMI_ACCESS_PHY_CTRL_2);
v = reg << 20 | page << 3 | 0x1f << 15 | 1;
sw_w32(v, RTL930X_SMI_ACCESS_PHY_CTRL_1);
do {
v = sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_1);
} while ( v & 0x1);
if (v & BIT(25)) {
pr_debug("Error reading phy %d, register %d\n", port, reg);
err = -EIO;
}
*val = (sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_2) & 0xffff);
pr_debug("%s: port %d, page: %d, reg: %x, val: %x\n", __func__, port, page, reg, *val);
mutex_unlock(&smi_lock);
return err;
}
/* Write to an mmd register of the PHY */
int rtl930x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val)
{
int err = 0;
u32 v;
mutex_lock(&smi_lock);
/* Set PHY to access */
sw_w32(BIT(port), RTL930X_SMI_ACCESS_PHY_CTRL_0);
/* Set data to write */
sw_w32_mask(0xffff << 16, val << 16, RTL930X_SMI_ACCESS_PHY_CTRL_2);
/* Set MMD device number and register to write to */
sw_w32(devnum << 16 | (regnum & 0xffff), RTL930X_SMI_ACCESS_PHY_CTRL_3);
v = BIT(2) | BIT(1) | BIT(0); /* WRITE | MMD-access | EXEC */
sw_w32(v, RTL930X_SMI_ACCESS_PHY_CTRL_1);
do {
v = sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_1);
} while (v & BIT(0));
pr_debug("%s: port %d, regnum: %x, val: %x (err %d)\n", __func__, port, regnum, val, err);
mutex_unlock(&smi_lock);
return err;
}
/* Read an mmd register of the PHY */
int rtl930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
{
int err = 0;
u32 v;
mutex_lock(&smi_lock);
/* Set PHY to access */
sw_w32_mask(0xffff << 16, port << 16, RTL930X_SMI_ACCESS_PHY_CTRL_2);
/* Set MMD device number and register to write to */
sw_w32(devnum << 16 | (regnum & 0xffff), RTL930X_SMI_ACCESS_PHY_CTRL_3);
v = BIT(1) | BIT(0); /* MMD-access | EXEC */
sw_w32(v, RTL930X_SMI_ACCESS_PHY_CTRL_1);
do {
v = sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_1);
} while (v & BIT(0));
/* There is no error-checking via BIT 25 of v, as it does not seem to be set correctly */
*val = (sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_2) & 0xffff);
pr_debug("%s: port %d, regnum: %x, val: %x (err %d)\n", __func__, port, regnum, *val, err);
mutex_unlock(&smi_lock);
return err;
}
/* Calculate both the block 0 and the block 1 hash, and return in
* lower and higher word of the return value since only 12 bit of
* the hash are significant
@ -2513,4 +2414,6 @@ const struct rtl838x_reg rtl930x_reg = {
.set_l3_egress_intf = rtl930x_set_l3_egress_intf,
.set_distribution_algorithm = rtl930x_set_distribution_algorithm,
.led_init = rtl930x_led_init,
.enable_learning = rtldsa_930x_enable_learning,
.enable_flood = rtldsa_930x_enable_flood,
};

View File

@ -198,7 +198,7 @@ static void rtl931x_vlan_tables_read(u32 vlan, struct rtl838x_vlan_info *info)
rtl_table_release(r);
pr_debug("VLAN_READ %d: %08x %08x %08x %08x\n", vlan, v, w, x, y);
info->tagged_ports = ((u64) v) << 25 | (w >> 7);
info->member_ports = ((u64) v) << 25 | (w >> 7);
info->profile_id = (x >> 16) & 0xf;
info->fid = w & 0x7f; /* AKA MSTI depending on context */
info->hash_uc_fid = !!(x & BIT(31));
@ -209,8 +209,8 @@ static void rtl931x_vlan_tables_read(u32 vlan, struct rtl838x_vlan_info *info)
info->l2_tunnel_list_id = y >> 18;
else
info->l2_tunnel_list_id = -1;
pr_debug("%s read tagged %016llx, profile-id %d, uc %d, mc %d, intf-id %d\n", __func__,
info->tagged_ports, info->profile_id, info->hash_uc_fid, info->hash_mc_fid,
pr_debug("%s read member %016llx, profile-id %d, uc %d, mc %d, intf-id %d\n", __func__,
info->member_ports, info->profile_id, info->hash_uc_fid, info->hash_mc_fid,
info->if_id);
/* Read UNTAG table via table register 3 */
@ -227,8 +227,8 @@ static void rtl931x_vlan_set_tagged(u32 vlan, struct rtl838x_vlan_info *info)
struct table_reg *r;
u32 v, w, x, y;
v = info->tagged_ports >> 25;
w = (info->tagged_ports & GENMASK(24, 0)) << 7;
v = info->member_ports >> 25;
w = (info->member_ports & GENMASK(24, 0)) << 7;
w |= info->fid & 0x7f;
x = info->hash_uc_fid ? BIT(31) : 0;
x |= info->hash_mc_fid ? BIT(30) : 0;
@ -869,6 +869,26 @@ static void rtl931x_l2_learning_setup(void)
sw_w32((0xffff << 3) | FORWARD, RTL931X_L2_LRN_CONSTRT_CTRL);
}
static void rtldsa_931x_enable_learning(int port, bool enable)
{
/* Limit learning to maximum: 64k entries */
sw_w32_mask(GENMASK(18, 3), enable ? (0xfffe << 3) : 0,
RTL931X_L2_LRN_PORT_CONSTRT_CTRL + port * 4);
}
static void rtldsa_931x_enable_flood(int port, bool enable)
{
/* 0: forward
* 1: drop
* 2: trap to local CPU
* 3: copy to local CPU
* 4: trap to master CPU
* 5: copy to master CPU
*/
sw_w32_mask(GENMASK(2, 0), enable ? 0 : 1,
RTL931X_L2_LRN_PORT_CONSTRT_CTRL + port * 4);
}
static u64 rtl931x_read_mcast_pmask(int idx)
{
u64 portmask;
@ -1690,4 +1710,6 @@ const struct rtl838x_reg rtl931x_reg = {
.l2_learning_setup = rtl931x_l2_learning_setup,
.l3_setup = rtl931x_l3_setup,
.led_init = rtldsa_931x_led_init,
.enable_learning = rtldsa_931x_enable_learning,
.enable_flood = rtldsa_931x_enable_flood,
};

View File

@ -27,11 +27,6 @@ extern struct rtl83xx_soc_info soc_info;
extern int rtl83xx_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data);
extern int rtl930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
extern int rtl930x_read_phy(u32 port, u32 page, u32 reg, u32 *val);
extern int rtl930x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val);
extern int rtl930x_write_phy(u32 port, u32 page, u32 reg, u32 val);
extern int rtl931x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val);
extern int rtl931x_read_phy(u32 port, u32 page, u32 reg, u32 *val);
extern int rtl931x_read_sds_phy(int phy_addr, int page, int phy_reg);
@ -2276,6 +2271,127 @@ int rtmdio_930x_write_sds_phy(int sds, int page, int regnum, u16 val)
return ret;
}
/* RTL930x specific MDIO functions */
static int rtmdio_930x_write_phy(u32 port, u32 page, u32 reg, u32 val)
{
u32 v;
int err = 0;
pr_debug("%s: port %d, page: %d, reg: %x, val: %x\n", __func__, port, page, reg, val);
if (port > 63 || page > 4095 || reg > 31)
return -ENOTSUPP;
val &= 0xffff;
mutex_lock(&rtmdio_lock);
sw_w32(BIT(port), RTL930X_SMI_ACCESS_PHY_CTRL_0);
sw_w32_mask(0xffff << 16, val << 16, RTL930X_SMI_ACCESS_PHY_CTRL_2);
v = reg << 20 | page << 3 | 0x1f << 15 | BIT(2) | BIT(0);
sw_w32(v, RTL930X_SMI_ACCESS_PHY_CTRL_1);
do {
v = sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_1);
} while (v & 0x1);
if (v & 0x2)
err = -EIO;
mutex_unlock(&rtmdio_lock);
return err;
}
static int rtmdio_930x_read_phy(u32 port, u32 page, u32 reg, u32 *val)
{
u32 v;
int err = 0;
if (port > 63 || page > 4095 || reg > 31)
return -ENOTSUPP;
mutex_lock(&rtmdio_lock);
sw_w32_mask(0xffff << 16, port << 16, RTL930X_SMI_ACCESS_PHY_CTRL_2);
v = reg << 20 | page << 3 | 0x1f << 15 | 1;
sw_w32(v, RTL930X_SMI_ACCESS_PHY_CTRL_1);
do {
v = sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_1);
} while ( v & 0x1);
if (v & BIT(25)) {
pr_debug("Error reading phy %d, register %d\n", port, reg);
err = -EIO;
}
*val = (sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_2) & 0xffff);
pr_debug("%s: port %d, page: %d, reg: %x, val: %x\n", __func__, port, page, reg, *val);
mutex_unlock(&rtmdio_lock);
return err;
}
/* Write to an mmd register of the PHY */
static int rtmdio_930x_write_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 val)
{
int err = 0;
u32 v;
mutex_lock(&rtmdio_lock);
/* Set PHY to access */
sw_w32(BIT(port), RTL930X_SMI_ACCESS_PHY_CTRL_0);
/* Set data to write */
sw_w32_mask(0xffff << 16, val << 16, RTL930X_SMI_ACCESS_PHY_CTRL_2);
/* Set MMD device number and register to write to */
sw_w32(devnum << 16 | (regnum & 0xffff), RTL930X_SMI_ACCESS_PHY_CTRL_3);
v = BIT(2) | BIT(1) | BIT(0); /* WRITE | MMD-access | EXEC */
sw_w32(v, RTL930X_SMI_ACCESS_PHY_CTRL_1);
do {
v = sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_1);
} while (v & BIT(0));
pr_debug("%s: port %d, regnum: %x, val: %x (err %d)\n", __func__, port, regnum, val, err);
mutex_unlock(&rtmdio_lock);
return err;
}
/* Read an mmd register of the PHY */
static int rtmdio_930x_read_mmd_phy(u32 port, u32 devnum, u32 regnum, u32 *val)
{
int err = 0;
u32 v;
mutex_lock(&rtmdio_lock);
/* Set PHY to access */
sw_w32_mask(0xffff << 16, port << 16, RTL930X_SMI_ACCESS_PHY_CTRL_2);
/* Set MMD device number and register to write to */
sw_w32(devnum << 16 | (regnum & 0xffff), RTL930X_SMI_ACCESS_PHY_CTRL_3);
v = BIT(1) | BIT(0); /* MMD-access | EXEC */
sw_w32(v, RTL930X_SMI_ACCESS_PHY_CTRL_1);
do {
v = sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_1);
} while (v & BIT(0));
/* There is no error-checking via BIT 25 of v, as it does not seem to be set correctly */
*val = (sw_r32(RTL930X_SMI_ACCESS_PHY_CTRL_2) & 0xffff);
pr_debug("%s: port %d, regnum: %x, val: %x (err %d)\n", __func__, port, regnum, *val, err);
mutex_unlock(&rtmdio_lock);
return err;
}
/* These are the core functions of our new Realtek SoC MDIO bus. */
static int rtmdio_read_c45(struct mii_bus *bus, int addr, int devnum, int regnum)
@ -2347,7 +2463,7 @@ static int rtmdio_write_sds_phy(struct rtmdio_bus_priv *priv, int sds, int page,
return ret;
}
static int rtmdio_83xx_read(struct mii_bus *bus, int addr, int regnum)
static int rtmdio_read(struct mii_bus *bus, int addr, int regnum)
{
struct rtmdio_bus_priv *priv = bus->priv;
int err, val;
@ -2388,12 +2504,8 @@ static int rtmdio_93xx_read(struct mii_bus *bus, int addr, int regnum)
priv->raw[addr] = (priv->page[addr] == priv->rawpage);
if (priv->phy_is_internal[addr]) {
if (priv->family_id == RTL9300_FAMILY_ID)
return rtmdio_930x_read_sds_phy(priv->sds_id[addr],
priv->page[addr], regnum);
else
return rtl931x_read_sds_phy(priv->sds_id[addr],
priv->page[addr], regnum);
return rtl931x_read_sds_phy(priv->sds_id[addr],
priv->page[addr], regnum);
}
err = (*priv->read_phy)(addr, priv->page[addr], regnum, &val);
@ -2419,7 +2531,7 @@ static int rtmdio_write_c45(struct mii_bus *bus, int addr, int devnum, int regnu
return err;
}
static int rtmdio_83xx_write(struct mii_bus *bus, int addr, int regnum, u16 val)
static int rtmdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
{
struct rtmdio_bus_priv *priv = bus->priv;
int err, page;
@ -2480,12 +2592,8 @@ static int rtmdio_93xx_write(struct mii_bus *bus, int addr, int regnum, u16 val)
if (!priv->raw[addr] && (regnum != RTMDIO_PAGE_SELECT || page == priv->rawpage)) {
priv->raw[addr] = (page == priv->rawpage);
if (priv->phy_is_internal[addr]) {
if (priv->family_id == RTL9300_FAMILY_ID)
return rtmdio_930x_write_sds_phy(priv->sds_id[addr],
page, regnum, val);
else
return rtl931x_write_sds_phy(priv->sds_id[addr],
page, regnum, val);
return rtl931x_write_sds_phy(priv->sds_id[addr],
page, regnum, val);
}
err = (*priv->write_phy)(addr, page, regnum, val);
@ -2767,8 +2875,8 @@ static int rtl838x_mdio_init(struct rtl838x_eth_priv *priv)
switch(priv->family_id) {
case RTL8380_FAMILY_ID:
priv->mii_bus->name = "rtl838x-eth-mdio";
priv->mii_bus->read = rtmdio_83xx_read;
priv->mii_bus->write = rtmdio_83xx_write;
priv->mii_bus->read = rtmdio_read;
priv->mii_bus->write = rtmdio_write;
priv->mii_bus->reset = rtmdio_838x_reset;
bus_priv->read_sds_phy = rtmdio_838x_read_sds_phy;
bus_priv->write_sds_phy = rtmdio_838x_write_sds_phy;
@ -2781,8 +2889,8 @@ static int rtl838x_mdio_init(struct rtl838x_eth_priv *priv)
break;
case RTL8390_FAMILY_ID:
priv->mii_bus->name = "rtl839x-eth-mdio";
priv->mii_bus->read = rtmdio_83xx_read;
priv->mii_bus->write = rtmdio_83xx_write;
priv->mii_bus->read = rtmdio_read;
priv->mii_bus->write = rtmdio_write;
priv->mii_bus->reset = rtmdio_839x_reset;
bus_priv->read_sds_phy = rtmdio_839x_read_sds_phy;
bus_priv->write_sds_phy = rtmdio_839x_write_sds_phy;
@ -2795,13 +2903,15 @@ static int rtl838x_mdio_init(struct rtl838x_eth_priv *priv)
break;
case RTL9300_FAMILY_ID:
priv->mii_bus->name = "rtl930x-eth-mdio";
priv->mii_bus->read = rtmdio_93xx_read;
priv->mii_bus->write = rtmdio_93xx_write;
priv->mii_bus->read = rtmdio_read;
priv->mii_bus->write = rtmdio_write;
priv->mii_bus->reset = rtmdio_930x_reset;
bus_priv->read_mmd_phy = rtl930x_read_mmd_phy;
bus_priv->write_mmd_phy = rtl930x_write_mmd_phy;
bus_priv->read_phy = rtl930x_read_phy;
bus_priv->write_phy = rtl930x_write_phy;
bus_priv->read_sds_phy = rtmdio_930x_read_sds_phy;
bus_priv->write_sds_phy = rtmdio_930x_write_sds_phy;
bus_priv->read_mmd_phy = rtmdio_930x_read_mmd_phy;
bus_priv->write_mmd_phy = rtmdio_930x_write_mmd_phy;
bus_priv->read_phy = rtmdio_930x_read_phy;
bus_priv->write_phy = rtmdio_930x_write_phy;
bus_priv->cpu_port = RTL930X_CPU_PORT;
bus_priv->rawpage = 0xfff;
break;

View File

@ -32,7 +32,7 @@ struct __attribute__ ((__packed__)) fw_header {
#define PHY_ID_RTL8226 0x001cc838
#define PHY_ID_RTL8390_GENERIC 0x001ccab0
#define PHY_ID_RTL8393_I 0x001c8393
#define PHY_ID_RTL9300_I 0x70d03106
#define PHY_ID_RTL9300_I 0x338002a0
/* These PHYs share the same id (0x001cc981) */
#define PHY_IS_NOT_RTL821X 0

View File

@ -86,8 +86,9 @@ define Device/zyxel_gs1900
KERNEL_INITRAMFS := \
kernel-bin | \
append-dtb | \
libdeflate-gzip | \
rt-compress | \
zyxel-vers | \
uImage gzip | \
rt-loader | \
uImage none | \
check-size 6976k
endef

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@ -0,0 +1 @@
# SPDX-License-Identifier: GPL-2.0-only

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@ -0,0 +1 @@
# SPDX-License-Identifier: GPL-2.0-only

View File

@ -143,7 +143,7 @@ CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_SPI_NAND=y
# CONFIG_MTD_SPI_NAND is not set
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_BRNIMAGE_FW=y
CONFIG_MTD_SPLIT_EVA_FW=y
@ -219,7 +219,7 @@ CONFIG_SMP_UP=y
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_REALTEK_SNAND=y
# CONFIG_SPI_REALTEK_SNAND is not set
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SWPHY=y
CONFIG_SYNC_R4K=y

View File

@ -0,0 +1,260 @@
CONFIG_AQUANTIA_PHY=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BOARD_SCACHE=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
# CONFIG_COMMON_CLK_REALTEK is not set
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_MIPSR2_IRQ_EI=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRC_CCITT=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_SECTION_MISMATCH=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_EARLY_PRINTK_8250=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FIXED_PHY=y
CONFIG_FORCE_NR_CPUS=y
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_REALTEK_OTTO=y
CONFIG_GRO_CELLS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HIGHMEM=y
CONFIG_HWMON=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
# CONFIG_I2C_GPIO_SHARED is not set
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_RTL9300=y
CONFIG_I2C_RTL9300=y
CONFIG_I2C_SMBUS=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_JFFS2_ZLIB=y
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_RTL8231 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MACH_REALTEK_RTL=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_I2C=y
CONFIG_MDIO_REALTEK_OTTO_AUX=y
CONFIG_MDIO_SMBUS=y
CONFIG_MFD_RTL8231=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CMDLINE_FROM_DTB=y
CONFIG_MIPS_CPU_SCACHE=y
CONFIG_MIPS_EXTERNAL_TIMER=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MT=y
# CONFIG_MIPS_MT_FPAFF is not set
CONFIG_MIPS_MT_SMP=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_NR_CPU_NR_MAP=2
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_BRNIMAGE_FW=y
CONFIG_MTD_SPLIT_EVA_FW=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_TPLINK_FW=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_RTL83XX=y
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NR_CPUS=2
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_RTL8231=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO_RESTART=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REALTEK_OTTO_TIMER=y
CONFIG_REALTEK_OTTO_WDT=y
CONFIG_REALTEK_PHY=y
CONFIG_REALTEK_PHY_HWMON=y
CONFIG_REALTEK_SOC_PHY=y
CONFIG_REALTEK_THERMAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MDIO=y
CONFIG_REGMAP_MMIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RTL8261N_PHY=y
# CONFIG_RTL838X is not set
# CONFIG_RTL839X is not set
CONFIG_RTL930X=y
# CONFIG_RTL931X is not set
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SFP=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_REALTEK_SNAND=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SWPHY=y
CONFIG_SYNC_R4K=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_HIGHMEM=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
CONFIG_TARGET_ISA_REV=2
CONFIG_THERMAL=y
# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TINY_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
CONFIG_USE_OF=y
CONFIG_WATCHDOG_CORE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y

View File

@ -0,0 +1,11 @@
# SPDX-License-Identifier: GPL-2.0-only
ARCH:=mips
SUBTARGET:=rtl930x_nand
CPU_TYPE:=24kc
BOARD:=realtek
BOARDNAME:=Realtek MIPS RTL930X (NAND)
FEATURES+=nand source-only
define Target/Description
Build firmware images for Realtek RTL930x based boards.
endef

View File

@ -153,7 +153,7 @@ CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_SPI_NAND=y
# CONFIG_MTD_SPI_NAND is not set
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_BRNIMAGE_FW=y
CONFIG_MTD_SPLIT_EVA_FW=y
@ -228,7 +228,7 @@ CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_REALTEK_SNAND=y
# CONFIG_SPI_REALTEK_SNAND is not set
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SWPHY=y
CONFIG_SYNC_R4K=y

View File

@ -0,0 +1,267 @@
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BOARD_SCACHE=y
CONFIG_CLKSRC_MIPS_GIC=y
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=125
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
# CONFIG_COMMON_CLK_REALTEK is not set
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONSOLE_LOGLEVEL_DEFAULT=15
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_MIPSR2_IRQ_EI=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_SECTION_MISMATCH=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_EARLY_PRINTK_8250=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FIXED_PHY=y
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_REALTEK_OTTO=y
CONFIG_GRO_CELLS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HIGHMEM=y
CONFIG_HWMON=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
# CONFIG_I2C_GPIO_SHARED is not set
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_RTL9300=y
CONFIG_I2C_RTL9300=y
CONFIG_I2C_SMBUS=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_JFFS2_ZLIB=y
CONFIG_KMAP_LOCAL=y
CONFIG_LEDS_GPIO=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MACH_REALTEK_RTL=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_I2C=y
# CONFIG_MDIO_REALTEK_OTTO_AUX is not set
CONFIG_MDIO_SMBUS=y
# CONFIG_MFD_RTL8231 is not set
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
CONFIG_MIPS_CM=y
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CMDLINE_FROM_DTB=y
CONFIG_MIPS_CPC=y
CONFIG_MIPS_CPS=y
# CONFIG_MIPS_CPS_NS16550_BOOL is not set
CONFIG_MIPS_CPU_SCACHE=y
CONFIG_MIPS_EXTERNAL_TIMER=y
CONFIG_MIPS_GIC=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MT=y
CONFIG_MIPS_MT_FPAFF=y
CONFIG_MIPS_MT_SMP=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_NR_CPU_NR_MAP=2
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_BRNIMAGE_FW=y
CONFIG_MTD_SPLIT_EVA_FW=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_TPLINK_FW=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SRCU_NMI_SAFE=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_RTL83XX=y
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_RTL838X=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
CONFIG_PINCTRL=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REALTEK_OTTO_TIMER=y
CONFIG_REALTEK_OTTO_WDT=y
CONFIG_REALTEK_SOC_PHY=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
# CONFIG_RTL838X is not set
# CONFIG_RTL839X is not set
CONFIG_RTL930X=y
CONFIG_RTL931X=y
CONFIG_SENSORS_GPIO_FAN=y
CONFIG_SENSORS_LM75=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SFP=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_REALTEK_SNAND=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SWPHY=y
CONFIG_SYNC_R4K=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_HIGHMEM=y
CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_MIPS_CPS=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_SYS_SUPPORTS_VPE_LOADER=y
CONFIG_TARGET_ISA_REV=2
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
CONFIG_USE_OF=y
CONFIG_WATCHDOG_CORE=y
CONFIG_WEAK_ORDERING=y
CONFIG_XPS=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y

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@ -0,0 +1,11 @@
# SPDX-License-Identifier: GPL-2.0-only
ARCH:=mips
SUBTARGET:=rtl931x_nand
CPU_TYPE:=24kc
BOARD:=realtek
BOARDNAME:=Realtek MIPS RTL931X (NAND)
FEATURES+=nand source-only
define Target/Description
Build firmware images for Realtek RTL931x based boards.
endef

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@ -60,6 +60,13 @@ gowin-solution-co-ltd-gw-mb-u01)
ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4 poe" "sfp1 sfp2"
;;
micro-computer-hk-tech-limited-ms-a2)
ucidef_set_network_device_path "lan1" "pci0000:00/0000:00:03.2/0000:04:00.0"
ucidef_set_network_device_path "lan2" "pci0000:00/0000:00:03.1/0000:03:00.0"
ucidef_set_network_device_path "sfp1" "pci0000:00/0000:00:02.1/0000:05:00.0"
ucidef_set_network_device_path "sfp2" "pci0000:00/0000:00:02.1/0000:05:00.1"
ucidef_set_interface_lan "lan1 lan2 sfp1 sfp2"
;;
pc-engines-apu1|pc-engines-apu2|pc-engines-apu3)
ucidef_set_interfaces_lan_wan "eth1 eth2" "eth0"
;;

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@ -15,7 +15,7 @@ config GCC_VERSION
default EXTERNAL_GCC_VERSION if EXTERNAL_TOOLCHAIN && !NATIVE_TOOLCHAIN
default "12.3.0" if GCC_VERSION_12
default "13.3.0" if GCC_VERSION_13
default "15.1.0" if GCC_VERSION_15
default "15.2.0" if GCC_VERSION_15
default "14.3.0"
config GCC_USE_DEFAULT_VERSION

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@ -46,8 +46,8 @@ ifeq ($(PKG_VERSION),14.3.0)
PKG_HASH:=e0dc77297625631ac8e50fa92fffefe899a4eb702592da5c32ef04e2293aca3a
endif
ifeq ($(PKG_VERSION),15.1.0)
PKG_HASH:=e2b09ec21660f01fecffb715e0120265216943f038d0e48a9868713e54f06cea
ifeq ($(PKG_VERSION),15.2.0)
PKG_HASH:=438fd996826b0c82485a29da03a72d71d6e3541a83ec702df4271f6fe025d24e
endif
PATCH_DIR=../patches-$(GCC_MAJOR_VERSION).x

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@ -40,7 +40,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000
case OPT_fconstant_string_class_:
constant_string_class_name = arg;
break;
@@ -1359,6 +1368,47 @@ c_common_init (void)
@@ -1361,6 +1370,47 @@ c_common_init (void)
return false;
}