Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2025-08-24 22:02:24 +08:00
commit 361853b40d
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
114 changed files with 1916 additions and 633 deletions

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@ -21,8 +21,8 @@
+ record-size = <0x1000>;
+ };
+
+ /* 192 KiB reserved for ARM Trusted Firmware (BL31) */
+ secmon_reserved: secmon@43000000 {
+ /* 192 KiB reserved for ARM Trusted Firmware (BL31 + BL32) */
+ secmon@43000000 {
+ reg = <0x43000000 0x30000>;
+ no-map;
+ };

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@ -1,6 +1,6 @@
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -33,6 +33,35 @@
@@ -33,6 +33,30 @@
};
};
@ -21,16 +21,11 @@
+ record-size = <0x1000>;
+ };
+
+ /* 192 KiB reserved for ARM Trusted Firmware (BL31) */
+ secmon_reserved: secmon@43000000 {
+ /* 192 KiB reserved for ARM Trusted Firmware (BL31 + BL32) */
+ secmon@43000000 {
+ reg = <0x43000000 0x30000>;
+ no-map;
+ };
+
+ wmcpu_emi: wmcpu-reserved@4fc00000 {
+ no-map;
+ reg = <0x4fc00000 0x00100000>;
+ };
+ };
+
gpt_clk: gpt_dummy20m {

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@ -1,6 +1,6 @@
--- a/arch/arm/dts/mt7986.dtsi
+++ b/arch/arm/dts/mt7986.dtsi
@@ -50,6 +50,35 @@
@@ -50,6 +50,30 @@
};
};
@ -21,16 +21,11 @@
+ record-size = <0x1000>;
+ };
+
+ /* 192 KiB reserved for ARM Trusted Firmware (BL31) */
+ secmon_reserved: secmon@43000000 {
+ reg = <0x43000000 0x30000>;
+ /* 256 KiB reserved for ARM Trusted Firmware (BL31 + BL32) */
+ secmon@43000000 {
+ reg = <0x43000000 0x40000>;
+ no-map;
+ };
+
+ wmcpu_emi: wmcpu-reserved@4fc00000 {
+ no-map;
+ reg = <0x4fc00000 0x00100000>;
+ };
+ };
+
dummy_clk: dummy12m {

View File

@ -21,8 +21,8 @@
+ record-size = <0x1000>;
+ };
+
+ /* 320 KiB reserved for ARM Trusted Firmware (BL31+BL32) */
+ secmon_reserved: secmon@43000000 {
+ /* 320 KiB reserved for ARM Trusted Firmware (BL31 + BL32) */
+ secmon@43000000 {
+ reg = <0 0x43000000 0 0x50000>;
+ no-map;
+ };

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@ -1,7 +1,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=ath10k-ct-firmware
PKG_VERSION:=2020.11.08
PKG_VERSION:=2023.04.04
PKG_RELEASE:=1
DL_SUBDIR:=$(PKG_NAME)-$(PKG_VERSION)
@ -30,120 +30,120 @@ define Download/ct-firmware-htt
URL_FILE:=$($(1)_FIRMWARE_FILE_CT_HTT)
endef
QCA988X_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-22.bin.lede.022
QCA988X_FIRMWARE_FILE_CT:=firmware-2-ct-full-community.bin
define Download/ath10k-firmware-qca988x-ct
$(call Download/ct-firmware,QCA988X,)
HASH:=398e4380e7e55105f3da0f78af29d1e437404ed3a82597aa4b6daaa7dce1a38e
$(call Download/ct-firmware,QCA988X,ath10k-fw-beta)
HASH:=0723e73558e7187f099219bc5de2152336f27c40aa8ca6f2ed7e4f7cbd6049bd
endef
$(eval $(call Download,ath10k-firmware-qca988x-ct))
QCA988X_FIRMWARE_FILE_CT_FULL_HTT:=firmware-2-ct-full-htt-mgt-community-22.bin.lede.022
QCA988X_FIRMWARE_FILE_CT_FULL_HTT:=firmware-2-ct-full-htt-mgt-community.bin
define Download/ath10k-firmware-qca988x-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA988X,)
HASH:=990d9cbf79dd81f141257a289f89808bd7726406c9ed845a7e49e5167002ffde
$(call Download/ct-firmware-full-htt,QCA988X,ath10k-fw-beta)
HASH:=256cc450c02494e450fea9463be1289e3b46fcb5d8ce02a0c97fc86d15703b25
endef
$(eval $(call Download,ath10k-firmware-qca988x-ct-full-htt))
QCA9887_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-22.bin.lede.022
QCA9887_FIRMWARE_FILE_CT:=firmware-2-ct-full-community.bin
define Download/ath10k-firmware-qca9887-ct
$(call Download/ct-firmware,QCA9887,ath10k-9887)
HASH:=a526cb44560da569781e10bf608194b1eff29b250e9887dba6d4d9a15c921c1e
HASH:=4bbe3524e029272de7805f52d6730846628a7890ff6d9f3758950dbc2e8591c7
endef
$(eval $(call Download,ath10k-firmware-qca9887-ct))
QCA9887_FIRMWARE_FILE_CT_FULL_HTT:=firmware-2-ct-full-htt-mgt-community-22.bin.lede.022
QCA9887_FIRMWARE_FILE_CT_FULL_HTT:=firmware-2-ct-full-htt-mgt-community.bin
define Download/ath10k-firmware-qca9887-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA9887,ath10k-9887)
HASH:=0b60fc558b773e9cbd5c2df903c894a030872fdb96390b0cca4b23b7fc7b881f
HASH:=1eb7a6d705cdca390c5a2df8a823e854da31e79dcf78e7c9214691386619d28f
endef
$(eval $(call Download,ath10k-firmware-qca9887-ct-full-htt))
QCA99X0_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.022
QCA99X0_FIRMWARE_FILE_CT:=firmware-5-ct-full-community.bin
define Download/ath10k-firmware-qca99x0-ct
$(call Download/ct-firmware,QCA99X0,ath10k-10-4b)
HASH:=578ad67976b61a393eb820a05e8eae70ec95f6b803bedbe952b8ff573eb09abe
$(call Download/ct-firmware,QCA99X0,ath10k-10-4b/ath10k-fw-beta)
HASH:=ef5e9607e7804320a99a8a69524f2981f4b3ff8e42fe9860e36e8e6c6a08954b
endef
$(eval $(call Download,ath10k-firmware-qca99x0-ct))
QCA99X0_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.022
QCA99X0_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community.bin
define Download/ath10k-firmware-qca99x0-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA99X0,ath10k-10-4b)
HASH:=8ea5c9f27c048796d406706a9c8471cd070f5aeb768622bb334a04853d557a4d
$(call Download/ct-firmware-full-htt,QCA99X0,ath10k-10-4b/ath10k-fw-beta)
HASH:=7965b617e1a3b4b2f12e9313272ae3b765376a90357024e41665483cb3dbc1a5
endef
$(eval $(call Download,ath10k-firmware-qca99x0-ct-full-htt))
QCA99X0_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.022
QCA99X0_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community.bin
define Download/ath10k-firmware-qca99x0-ct-htt
$(call Download/ct-firmware-htt,QCA99X0,ath10k-10-4b)
HASH:=7b0b7545114e8dc0f2c70dc8a43a5a48d84d37f2a4673977a692c5f3361445c6
$(call Download/ct-firmware-htt,QCA99X0,ath10k-10-4b/ath10k-fw-beta)
HASH:=78d4df0a5c88209e3be4b10559d9a0dd45f6175bf3033a5f5dac04479821c7a5
endef
$(eval $(call Download,ath10k-firmware-qca99x0-ct-htt))
QCA9984_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.022
QCA9984_FIRMWARE_FILE_CT:=firmware-5-ct-full-community.bin
define Download/ath10k-firmware-qca9984-ct
$(call Download/ct-firmware,QCA9984,ath10k-9984-10-4b)
HASH:=7bfe5bf7c38532fa57db62ebc56ec625583928d5d4736475d5dec4d4ae031154
$(call Download/ct-firmware,QCA9984,ath10k-9984-10-4b/ath10k-fw-beta)
HASH:=d0e032352eda9a65a737217f14ac08148ba80bb73215783cf8fe2680948a5184
endef
$(eval $(call Download,ath10k-firmware-qca9984-ct))
QCA9984_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.022
QCA9984_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community.bin
define Download/ath10k-firmware-qca9984-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA9984,ath10k-9984-10-4b)
HASH:=672be40c4d987d7e8e309341262a37cda7baf925416d1dc651284b6d2bd30969
$(call Download/ct-firmware-full-htt,QCA9984,ath10k-9984-10-4b/ath10k-fw-beta)
HASH:=40791ec0bb0a26693406752cdff49c8fb5294cccd84939f05b897d6f9544810a
endef
$(eval $(call Download,ath10k-firmware-qca9984-ct-full-htt))
QCA9984_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.022
QCA9984_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community.bin
define Download/ath10k-firmware-qca9984-ct-htt
$(call Download/ct-firmware-htt,QCA9984,ath10k-9984-10-4b)
HASH:=a24e887f13aca4358ab2b6a42a7212d066e4d19e29b00bb26f9681b1dc8d0eb0
$(call Download/ct-firmware-htt,QCA9984,ath10k-9984-10-4b/ath10k-fw-beta)
HASH:=bef51e1bf7b5dc5a98c355d9835370288251beb34f2243c71b95b496f23bc9fa
endef
$(eval $(call Download,ath10k-firmware-qca9984-ct-htt))
QCA4019_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.022
QCA4019_FIRMWARE_FILE_CT:=firmware-5-ct-full-community.bin
define Download/ath10k-firmware-qca4019-ct
$(call Download/ct-firmware,QCA4019,ath10k-4019-10-4b)
HASH:=503956d9bf09d603e4cf36ac080fa5b5a22032166204e3c15ae898647bc50df3
$(call Download/ct-firmware,QCA4019,ath10k-4019-10-4b/ath10k-fw-beta)
HASH:=81b6675616a1216f9becfcd89b4ff17048bf29d18d1a14ccf78c0b8e46a50e79
endef
$(eval $(call Download,ath10k-firmware-qca4019-ct))
QCA4019_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.022
QCA4019_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community.bin
define Download/ath10k-firmware-qca4019-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA4019,ath10k-4019-10-4b)
HASH:=591bf9ed00fb540d7ba034453f17696e8dd91a4b7d81f7cc1ec41f447fa74831
$(call Download/ct-firmware-full-htt,QCA4019,ath10k-4019-10-4b/ath10k-fw-beta)
HASH:=99b6a4ee2509b4a932ec7d1b5065b3cc9f6497d44cc63cb0fdf2a5e57b1a8340
endef
$(eval $(call Download,ath10k-firmware-qca4019-ct-full-htt))
QCA4019_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.022
QCA4019_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community.bin
define Download/ath10k-firmware-qca4019-ct-htt
$(call Download/ct-firmware-htt,QCA4019,ath10k-4019-10-4b)
HASH:=06e58a283ff90d021ff7cb58684cbf39750bd71cf91c56b32add64253133929c
$(call Download/ct-firmware-htt,QCA4019,ath10k-4019-10-4b/ath10k-fw-beta)
HASH:=6a5b4f39d891ab2a1fddf79a350d061daed800d42df44658fa1e635da16e7bb9
endef
$(eval $(call Download,ath10k-firmware-qca4019-ct-htt))
QCA9888_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-12.bin-lede.022
QCA9888_FIRMWARE_FILE_CT:=firmware-5-ct-full-community.bin
define Download/ath10k-firmware-qca9888-ct
$(call Download/ct-firmware,QCA9888,ath10k-9888-10-4b)
HASH:=82ff5afcf0c9dcdb03b0b40c6eddc81e11b18e4f522f681935b5ec42537972ee
$(call Download/ct-firmware,QCA9888,ath10k-9888-10-4b/ath10k-fw-beta)
HASH:=7d7f16fea259119d834ba7c722036c70de14ed92c206d1a1ff9b45f3d26e1aef
endef
$(eval $(call Download,ath10k-firmware-qca9888-ct))
QCA9888_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community-12.bin-lede.022
QCA9888_FIRMWARE_FILE_CT_FULL_HTT:=firmware-5-ct-full-htt-mgt-community.bin
define Download/ath10k-firmware-qca9888-ct-full-htt
$(call Download/ct-firmware-full-htt,QCA9888,ath10k-9888-10-4b)
HASH:=1a741f2cf43fbea24ed831b4e76cbb114b525d1ee9b917ce0000916cbcc42f92
$(call Download/ct-firmware-full-htt,QCA9888,ath10k-9888-10-4b/ath10k-fw-beta)
HASH:=d4111ba5f08c146696824875483ce2b26d3251ebf3dfe2d96832a31db4edd98b
endef
$(eval $(call Download,ath10k-firmware-qca9888-ct-full-htt))
QCA9888_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community-12.bin-lede.022
QCA9888_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-htt-mgt-community.bin
define Download/ath10k-firmware-qca9888-ct-htt
$(call Download/ct-firmware-htt,QCA9888,ath10k-9888-10-4b)
HASH:=34bf07912a2f3fce4a5887c690848bb06d339bd1c86541b0b57b9c45eccc88e4
$(call Download/ct-firmware-htt,QCA9888,ath10k-9888-10-4b/ath10k-fw-beta)
HASH:=0e48559fc853400686644557e3e231e724acbb5119afde2b2917b364a0964e7d
endef
$(eval $(call Download,ath10k-firmware-qca9888-ct-htt))

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@ -11,9 +11,9 @@ PKG_NAME:=udebug
CMAKE_INSTALL:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/udebug.git
PKG_MIRROR_HASH:=d787e64420b6b8410ee4a432cbaaeba0d116ef0d6bb6d670289229f049d10bf7
PKG_SOURCE_DATE:=2025-08-17
PKG_SOURCE_VERSION:=892647b81d30fcec8d275a2c5da05b94192c095d
PKG_MIRROR_HASH:=5e7b713aa1bff3b6480d4bd94d607b9cafed787b3d1cb27513883c83e56b0273
PKG_SOURCE_DATE:=2025-08-24
PKG_SOURCE_VERSION:=edeb4d6dc690acb476a47e6b11633b5632b08437
PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE))
PKG_LICENSE:=GPL-2.0

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@ -105,101 +105,108 @@ config DROPBEAR_SVR_PUBKEY_OPTIONS
Default: enabled.
config DROPBEAR_LASTLOG
bool "Write lastlog"
help
/var/log/lastlog is a record of the last login of each user.
To view the last login, use "lastlog" command (OpenWrt package shadow-lastlog).
## ---
## Nowadays, utmp/wtmp is not supported by musl libc.
## Ref: https://wiki.musl-libc.org/faq.html#Q:_Why_is_the_utmp/wtmp_functionality_only_implemented_as_stubs?
If enabled, Drobear will update it with SSH logins.
If disabled, SSH logins will not be recorded.
Warning: The lastlog record is considered a security and privacy risk by some.
Default: disabled.
config DROPBEAR_LASTLOG_PATH
string "lastlog path:"
default "/var/log/lastlog"
depends on DROPBEAR_LASTLOG
help
Default: /var/log/lastlog
config DROPBEAR_WTMP
bool "Write wtmp"
help
/var/log/wtmp is a record of all previous logins.
The file needs to be manually created - Dropbear will update it only if it already exists.
To view login history, use "last" command, available in Busybox but not included by default.
If enabled, Dropbear will add SSH logins to the record.
If disabled, SSH logins will not be recorded.
Warning: The wtmp record is considered a security and privacy risk by some.
Default: disabled.
config DROPBEAR_WTMP_PATH
string "wtmp path:"
default "/var/log/wtmp"
depends on DROPBEAR_WTMP
help
Default: /var/log/wtmp
# ---- MUSL UTMP ----
# In musl, pututline() and related functions are all stubs, and login(), logout() and ttyslot() don't exist.
# In Dropbear there is an option to write to utmp directly, but it uses ttyslot().
# So, there is currently no way to make utmp work with musl.
# Revisit this if/when Dropbear implements ttyslot() or an independent utmp direct write.
comment "* note: utmp is unavailable with musl libc"
## utmp-specific notes:
## In musl, pututline() and related functions are all stubs, and login(), logout() and ttyslot() don't exist.
## In Dropbear there is an option to write to utmp directly, but it uses ttyslot().
## So, there is currently no way to make utmp work with musl.
## Revisit this if/when Dropbear implements ttyslot() or an independent utmp direct write.
## ---
comment "* note: lastlog/login()/utmp/wtmp are unavailable with musl libc"
depends on USE_MUSL
config DROPBEAR_UTMP
bool "Write utmp"
depends on !USE_MUSL
help
/var/run/utmp is a record of currently logged-in users.
To view logged-in users, use "w", "who" or "users" commands.
if !USE_MUSL
If enabled, Dropbear will keep it updated with users that log in via SSH.
If disabled, SSH logins will not be recorded.
config DROPBEAR_LASTLOG
bool "Write lastlog"
help
/var/log/lastlog is a record of the last login of each user.
To view the last login, use "lastlog" command (OpenWrt package shadow-lastlog).
Warning: The utmp record is considered a security and privacy risk by some.
If enabled, Drobear will update it with SSH logins.
If disabled, SSH logins will not be recorded.
Default: disabled.
Warning: The lastlog record is considered a security and privacy risk by some.
config DROPBEAR_UTMP_PATH
string "utmp path:"
default "/var/run/utmp"
depends on DROPBEAR_UTMP
help
Default: /var/run/utmp
Default: disabled.
# musl pututline() and related functions are all stubs.
config DROPBEAR_PUTUTLINE
bool "Use pututline() to write to utmp"
default y if !DROPBEAR_LOGINFUNC
depends on !USE_MUSL && !DROPBEAR_LOGINFUNC && DROPBEAR_UTMP
help
If enabled, Dropbear will use pututline() to write into the utmp file.
If disabled, Dropbear will write to utmp file directly.
config DROPBEAR_LASTLOG_PATH
string "lastlog path:"
default "/var/log/lastlog"
depends on DROPBEAR_LASTLOG
help
Default: /var/log/lastlog
Consider using login() and logout() functions via DROPBEAR_LOGINFUNC option if available.
config DROPBEAR_LOGINFUNC
bool "Use login() and logout() functions"
help
If enabled, Dropbear will use login() and logout() functions to record logins in utmp and wtmp files.
Default: enabled if DROPBEAR_UTMP is enabled.
If disabled, see DROPBEAR_UTMP and DROPBEAR_WTMP options.
# musl doesn't have login() and logout()
config DROPBEAR_LOGINFUNC
bool "Use login() and logout() functions"
depends on !USE_MUSL
select DROPBEAR_UTMP
select DROPBEAR_WTMP
help
If enabled, Dropbear will use login() and logout() functions to record logins in utmp and wtmp files.
If disabled, see DROPBEAR_UTMP and DROPBEAR_WTMP options.
Default: disabled.
Default: disabled.
comment "* note: utmp/wtmp are handled by libc implementation rather than Dropbear"
depends on DROPBEAR_LOGINFUNC
config DROPBEAR_WTMP
bool "Write wtmp"
depends on !DROPBEAR_LOGINFUNC
help
/var/log/wtmp is a record of all previous logins.
The file needs to be manually created - Dropbear will update it only if it already exists.
To view login history, use "last" command, available in Busybox but not included by default.
If enabled, Dropbear will add SSH logins to the record.
If disabled, SSH logins will not be recorded.
Warning: The wtmp record is considered a security and privacy risk by some.
Default: disabled.
config DROPBEAR_WTMP_PATH
string "wtmp path:"
default "/var/log/wtmp"
depends on DROPBEAR_WTMP
help
Default: /var/log/wtmp
config DROPBEAR_UTMP
bool "Write utmp"
depends on !DROPBEAR_LOGINFUNC
help
/var/run/utmp is a record of currently logged-in users.
To view logged-in users, use "w", "who" or "users" commands.
If enabled, Dropbear will keep it updated with users that log in via SSH.
If disabled, SSH logins will not be recorded.
Warning: The utmp record is considered a security and privacy risk by some.
Default: disabled.
config DROPBEAR_UTMP_PATH
string "utmp path:"
default "/var/run/utmp"
depends on DROPBEAR_UTMP
help
Default: /var/run/utmp
config DROPBEAR_PUTUTLINE
bool "Use pututline() to write to utmp"
depends on DROPBEAR_UTMP
help
If enabled, Dropbear will use pututline() to write into the utmp file.
If disabled, Dropbear will write to utmp file directly.
PS: DROPBEAR_UTMP_PATH value is likely to be ignored if DROPBEAR_PUTUTLINE is enabled.
Default: disabled.
endif
## </LOGIN OPTIONS>
## <FEATURES>

View File

@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=dropbear
PKG_VERSION:=2025.88
PKG_RELEASE:=3
PKG_RELEASE:=4
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:= \

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@ -0,0 +1,24 @@
From 4bc1e18948d0918bcb1338a5f1e7856478abf985 Mon Sep 17 00:00:00 2001
From: Konstantin Demin <rockdrilla@gmail.com>
Date: Fri, 8 Aug 2025 10:02:44 +0300
Subject: fix missing depends for sntrup761x25519-sha512
fixes 440b7b5c4f "Add sntrup761x25519-sha512 post-quantum key exchange"
Signed-off-by: Konstantin Demin <rockdrilla@gmail.com>
Forwarded: https://github.com/mkj/dropbear/pull/375
---
src/sysoptions.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/src/sysoptions.h
+++ b/src/sysoptions.h
@@ -207,7 +207,7 @@
/* LTC SHA384 depends on SHA512 */
#define DROPBEAR_SHA512 ((DROPBEAR_SHA2_512_HMAC) || (DROPBEAR_ECC_521) \
|| (DROPBEAR_SHA384) || (DROPBEAR_DH_GROUP16) \
- || (DROPBEAR_ED25519))
+ || (DROPBEAR_ED25519) || (DROPBEAR_SNTRUP761))
#define DROPBEAR_DH_GROUP14 ((DROPBEAR_DH_GROUP14_SHA256) || (DROPBEAR_DH_GROUP14_SHA1))

View File

@ -0,0 +1,65 @@
From a8610f7b98ad4b33ab723602863d60d462fa5af2 Mon Sep 17 00:00:00 2001
From: Matt Johnston <matt@ucc.asn.au>
Date: Sun, 10 Aug 2025 19:46:01 +0800
Subject: Don't limit channel window to 500MB
Previously the channel window and increments were limited to 500MB.
That is incorrect and causes stuck connections if peers advertise
a large window, then don't send an increment within the first 500MB.
That's seen with SSH.NET https://github.com/sshnet/SSH.NET/issues/1671
---
src/common-channel.c | 17 ++++++++++-------
src/sysoptions.h | 3 ---
2 files changed, 10 insertions(+), 10 deletions(-)
--- a/src/common-channel.c
+++ b/src/common-channel.c
@@ -858,17 +858,21 @@ void common_recv_msg_channel_data(struct Channel *channel, int fd,
void recv_msg_channel_window_adjust() {
struct Channel * channel;
- unsigned int incr;
+ unsigned int incr, newwin;
channel = getchannel();
incr = buf_getint(ses.payload);
- TRACE(("received window increment %d", incr))
- incr = MIN(incr, TRANS_MAX_WIN_INCR);
+ TRACE(("received window increment %u", incr))
- channel->transwindow += incr;
- channel->transwindow = MIN(channel->transwindow, TRANS_MAX_WINDOW);
-
+ newwin = channel->transwindow + incr;
+ if (newwin < channel->transwindow) {
+ /* Integer overflow, clamp it at maximum.
+ * Behaviour may be unexpected, senders MUST NOT overflow per rfc4254. */
+ TRACE(("overflow window, prev %u", channel->transwindow));
+ newwin = 0xffffffff;
+ }
+ channel->transwindow = newwin;
}
/* Increment the incoming data window for a channel, and let the remote
@@ -906,7 +910,6 @@ void recv_msg_channel_open() {
remotechan = buf_getint(ses.payload);
transwindow = buf_getint(ses.payload);
- transwindow = MIN(transwindow, TRANS_MAX_WINDOW);
transmaxpacket = buf_getint(ses.payload);
transmaxpacket = MIN(transmaxpacket, TRANS_MAX_PAYLOAD_LEN);
--- a/src/sysoptions.h
+++ b/src/sysoptions.h
@@ -243,9 +243,6 @@
#define RECV_MAX_PACKET_LEN (MAX(35000, ((RECV_MAX_PAYLOAD_LEN)+100)))
/* for channel code */
-#define TRANS_MAX_WINDOW 500000000 /* 500MB is sufficient, stopping overflow */
-#define TRANS_MAX_WIN_INCR 500000000 /* overflow prevention */
-
#define RECV_WINDOWEXTEND (opts.recv_window / 3) /* We send a "window extend" every
RECV_WINDOWEXTEND bytes */
#define MAX_RECV_WINDOW (10*1024*1024) /* 10 MB should be enough */

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@ -1,45 +0,0 @@
From 0e71cac033bb7689c4dfa2e6814191337ef770f5 Mon Sep 17 00:00:00 2001
From: INAGAKI Hiroshi <musashino.open@gmail.com>
Date: Thu, 13 Oct 2022 00:51:33 +0900
Subject: [PATCH] nvmem: layouts: u-boot-env: align endianness of crc32 values
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This patch fixes crc32 error on Big-Endianness system by conversion of
calculated crc32 value.
Little-Endianness system:
obtained crc32: Little
calculated crc32: Little
Big-Endianness system:
obtained crc32: Little
calculated crc32: Big
log (APRESIA ApresiaLightGS120GT-SS, RTL8382M, Big-Endianness):
[ 8.570000] u_boot_env 18001200.spi:flash@0:partitions:partition@c0000: Invalid calculated CRC32: 0x88cd6f09 (expected: 0x096fcd88)
[ 8.580000] u_boot_env: probe of 18001200.spi:flash@0:partitions:partition@c0000 failed with error -22
Fixes: f955dc1445069 ("nvmem: add driver handling U-Boot environment variables")
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Tested-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
--- a/drivers/nvmem/layouts/u-boot-env.c
+++ b/drivers/nvmem/layouts/u-boot-env.c
@@ -148,7 +148,7 @@ int u_boot_env_parse(struct device *dev,
crc32_data_len = dev_size - crc32_data_offset;
data_len = dev_size - data_offset;
- calc = crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L;
+ calc = le32_to_cpu((__le32)crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L);
if (calc != crc32) {
dev_err(dev, "Invalid calculated CRC32: 0x%08x (expected: 0x%08x)\n", calc, crc32);
err = -EINVAL;

View File

@ -1,6 +1,8 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7622-buffalo-wsr.dtsi"
/ {
@ -11,8 +13,9 @@
label-mac-device = &gmac0;
};
memory {
reg = <0 0x40000000 0 0x0F000000>;
memory@40000000 {
reg = <0 0x40000000 0 0x0f000000>;
device_type = "memory";
};
rtkgsw: rtkgsw@0 {
@ -38,7 +41,7 @@
"NALE", "NDL0", "NDL1",
"NDL2", "NDL3";
input-enable;
drive-strength = <8>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up;
};
};

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@ -1,14 +1,17 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7622-buffalo-wsr.dtsi"
/ {
model = "Buffalo WSR-3200AX4S";
compatible = "buffalo,wsr-3200ax4s", "mediatek,mt7622";
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x1f000000>;
device_type = "memory";
};
};
@ -24,13 +27,13 @@
pins = "SPI_WP", "SPI_HOLD", "SPI_MOSI",
"SPI_MISO", "SPI_CS";
input-enable;
drive-strength = <16>;
drive-strength = <MTK_DRIVE_16mA>;
bias-pull-up;
};
conf-clk {
pins = "SPI_CLK";
drive-strength = <16>;
drive-strength = <MTK_DRIVE_16mA>;
bias-pull-down;
};
};

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@ -45,8 +45,9 @@
};
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
};

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@ -8,6 +8,7 @@
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
@ -134,8 +135,9 @@
enable-active-high;
};
memory {
reg = <0 0x40000000 0 0x3F000000>;
memory@40000000 {
reg = <0 0x40000000 0 0x3f000000>;
device_type = "memory";
};
reg_1p8v: regulator-1p8v {
@ -214,13 +216,13 @@
"NDL3", "NDL4", "NDL5",
"NDL6", "NDL7", "NRB";
input-enable;
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up;
};
conf-clk {
pins = "NCLE";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-down;
};
};
@ -257,7 +259,7 @@
conf {
pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
"I2S_WS", "I2S_MCLK";
drive-strength = <12>;
drive-strength = <MTK_DRIVE_12mA>;
bias-pull-down;
};
};
@ -337,12 +339,12 @@
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
"I2S2_IN","I2S4_OUT";
input-enable;
drive-strength = <8>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up;
};
conf-clk {
pins = "I2S3_OUT";
drive-strength = <12>;
drive-strength = <MTK_DRIVE_12mA>;
bias-pull-down;
};
conf-cd {

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
@ -25,8 +26,9 @@
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x1f000000>;
device_type = "memory";
};
leds {
@ -158,13 +160,13 @@
conf-cmd-data {
pins = "SPI_WP", "SPI_HOLD", "SPI_MOSI",
"SPI_MISO", "SPI_CS";
drive-strength = <16>;
drive-strength = <MTK_DRIVE_16mA>;
bias-pull-up;
};
conf-clk {
pins = "SPI_CLK";
drive-strength = <16>;
drive-strength = <MTK_DRIVE_16mA>;
bias-pull-down;
};
};

View File

@ -80,8 +80,9 @@
};
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
reg_1p8v: regulator-1p8v {

View File

@ -108,8 +108,9 @@
};
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
};

View File

@ -71,8 +71,9 @@
};
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
};

View File

@ -11,6 +11,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
@ -90,8 +91,9 @@
};
};
memory {
memory@40000000 {
reg = <0x0 0x40000000 0x0 0x40000000>;
device_type = "memory";
};
reserved-memory {
@ -406,13 +408,13 @@
"NDL3", "NDL4", "NDL5",
"NDL6", "NDL7", "NRB";
input-enable;
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up;
};
conf-clk {
pins = "NCLE";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-down;
};
};

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@ -26,6 +26,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
cpus {

View File

@ -45,8 +45,9 @@
};
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x3f000000>;
device_type = "memory";
};
reg_1p8v: regulator-1p8v {

View File

@ -26,8 +26,9 @@
bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 ubi.block=0,fit root=/dev/fit0";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x8000000>;
device_type = "memory";
};
leds {

View File

@ -20,8 +20,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>; // 256mb
device_type = "memory";
};
gpio-keys {

View File

@ -2,6 +2,8 @@
/dts-v1/;
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -223,12 +225,12 @@
"SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
input-enable;
drive-strength = <MTK_DRIVE_12mA>;
mediatek,pull-up-adv = <1>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "SPI1_CS";
drive-strength = <MTK_DRIVE_12mA>;
mediatek,pull-down-adv = <2>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
};
mmc0_pins_uhs: mmc0-pins-uhs {
@ -242,12 +244,12 @@
"SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
input-enable;
drive-strength = <MTK_DRIVE_12mA>;
mediatek,pull-up-adv = <1>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "SPI1_CS";
drive-strength = <MTK_DRIVE_12mA>;
mediatek,pull-down-adv = <2>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
};
pcie_pins: pcie-pins {

View File

@ -64,13 +64,13 @@
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <103>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <103>;
};
};

View File

@ -4,6 +4,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -26,6 +28,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {
@ -129,14 +132,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -19,8 +19,9 @@
bootargs-override = "";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
keys {

View File

@ -21,8 +21,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {

View File

@ -7,6 +7,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -24,6 +26,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {
@ -105,14 +108,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -3,6 +3,8 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/pinctrl/mt65xx.h>
/ {
compatible = "cmcc,rax3000m", "cmcc,rax3000me", "mediatek,mt7981";
@ -40,14 +42,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -27,8 +27,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
gpio-keys {

View File

@ -55,8 +55,9 @@
};
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
};

View File

@ -5,6 +5,7 @@
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
@ -202,14 +203,14 @@
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
bias-pull-up = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};

View File

@ -3,6 +3,7 @@
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
@ -217,14 +218,14 @@
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
bias-pull-up = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};

View File

@ -9,6 +9,8 @@
fragment@1 {
target = <&mmc0>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
card@0 {
compatible = "mmc-card";
reg = <0>;

View File

@ -22,8 +22,9 @@
rootdisk = <&firmware>;
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
reg_3p3v: regulator-3p3v {

View File

@ -2,6 +2,7 @@
/dts-v1/;
#include "mt7981b.dtsi"
#include <dt-bindings/pinctrl/mt65xx.h>
/ {
model = "GL.iNet GL-MT2500";
@ -84,12 +85,12 @@
"SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
input-enable;
drive-strength = <MTK_DRIVE_12mA>;
mediatek,pull-up-adv = <1>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "SPI1_CS";
drive-strength = <MTK_DRIVE_12mA>;
mediatek,pull-down-adv = <2>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
};
mmc0_pins_uhs: mmc0-pins-uhs {
@ -103,12 +104,12 @@
"SPI1_CLK", "SPI1_MOSI", "SPI1_MISO";
input-enable;
drive-strength = <MTK_DRIVE_12mA>;
mediatek,pull-up-adv = <1>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "SPI1_CS";
drive-strength = <MTK_DRIVE_12mA>;
mediatek,pull-down-adv = <2>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
@ -25,8 +26,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {
@ -224,14 +226,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -60,6 +60,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
};

View File

@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
@ -136,14 +137,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -260,6 +260,8 @@
&wifi {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_0>;

View File

@ -262,6 +262,8 @@
&wifi {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_0>;

View File

@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
@ -26,8 +27,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {
@ -221,14 +223,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -4,6 +4,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -27,6 +29,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {
@ -121,14 +124,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -23,6 +23,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {

View File

@ -22,8 +22,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
keys {

View File

@ -4,6 +4,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -27,6 +29,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {
@ -138,14 +141,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -5,6 +5,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -25,6 +27,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
beeper {
@ -224,14 +227,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>;
drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>;
drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
};
};
@ -251,8 +254,8 @@
wwan_rst_h: wwan-rst-h {
pins = "GPIO_WPS";
drive-strength = <8>;
mediatek,pull-down-adv = <0>;
drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
output-low;
};
};

View File

@ -22,8 +22,9 @@
rootdisk = <&ubi_fit_volume>;
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
reg_3p3v: regulator-3p3v {

View File

@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
@ -25,8 +26,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {
@ -214,14 +216,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -108,8 +108,9 @@
};
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
};

View File

@ -51,7 +51,7 @@
led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS; // Second WAN led defined below.
function = LED_FUNCTION_STATUS; // Second WAN led defined below.
gpios = <&pio 4 GPIO_ACTIVE_LOW>;
};
@ -323,6 +323,8 @@
&wifi {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_0>;

View File

@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
@ -23,8 +24,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
gpio-keys {
@ -364,14 +366,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -4,6 +4,9 @@
*/
/dts-v1/;
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b-unielec-u7981-01.dtsi"
/ {
model = "Unielec U7981-01 (NAND)";
@ -86,14 +89,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -2,6 +2,8 @@
/dts-v1/;
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -37,14 +39,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
bias-pull-up = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};

View File

@ -55,9 +55,9 @@
};
&usb_phy {
status = "okay";
status = "okay";
};
&xhci {
status = "okay";
status = "okay";
};

View File

@ -2,6 +2,8 @@
/dts-v1/;
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -168,14 +170,14 @@
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
bias-pull-up = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};

View File

@ -2,6 +2,8 @@
/dts-v1/;
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -221,14 +223,14 @@
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
bias-pull-up = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};

View File

@ -0,0 +1,57 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "mt7981b-wavlink-wl-3port-128nand-common.dtsi"
/ {
model = "WAVLINK WL-WN586X3 Rev B";
compatible = "wavlink,wl-wn586x3b", "mediatek,mt7981b";
aliases {
label-mac-device = &wifi;
led-boot = &led_status_blue;
led-failsafe = &led_status_blue;
led-running = &led_status_blue;
led-upgrade = &led_status_blue;
serial0 = &uart0;
};
leds {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN;
gpios = <&pio 5 GPIO_ACTIVE_LOW>;
};
led-1 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
led_status_blue: led-2 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
led-3 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
gpios = <&pio 12 GPIO_ACTIVE_LOW>;
};
led-4 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
gpios = <&pio 13 GPIO_ACTIVE_LOW>;
};
};
};

View File

@ -19,8 +19,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {

View File

@ -2,6 +2,8 @@
/dts-v1/;
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -119,14 +121,14 @@
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
bias-pull-up = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};

View File

@ -1,8 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
@ -262,7 +263,7 @@
};
&pio {
gpio-line-names =
gpio-line-names =
"wps",
"reset",
"watchdog",
@ -286,14 +287,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};
@ -316,8 +317,8 @@
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory>;
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory>;
nvmem-cell-names = "eeprom";
};
&factory {
@ -325,13 +326,13 @@
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_004: macaddr@004 {
reg = <0x004 0x6>;
macaddr_factory_004: macaddr@4 {
reg = <0x4 0x6>;
};
macaddr_factory_02a: macaddr@02a {
reg = <0x02a 0x6>;
macaddr_factory_02a: macaddr@2a {
reg = <0x2a 0x6>;
};
eeprom_factory: eeprom@0 {
eeprom_factory: eeprom@0 {
reg = <0x0 0x1000>;
};
};

View File

@ -2,6 +2,8 @@
/dts-v1/;
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7981b.dtsi"
/ {
@ -22,8 +24,9 @@
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
gpio-keys {
@ -289,14 +292,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
bias-pull-up = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};

View File

@ -22,8 +22,9 @@
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
gpio-keys {

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -104,13 +105,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -127,7 +128,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -144,7 +145,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -0,0 +1,352 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
/ {
model = "Acer Predator Connect W6x";
compatible = "acer,predator-w6x", "mediatek,mt7986a";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
gpio-keys {
compatible = "gpio-keys";
factory {
label = "factory";
linux,code = <KEY_RESTART>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
};
};
&crypto {
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "2500base-x";
phy-handle = <&phy6>;
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
port@4 {
reg = <4>;
label = "lan4";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
phy6: phy@6 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <6>;
};
};
};
&pio {
spi_flash_pins: spi-flash-pins-33-to-38 {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
spi_led_pins: spic-pins-29-to-32 {
mux {
function = "spi";
groups = "spi1_2";
};
};
wf_2g_5g_pins: wf_2g_5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <MTK_DRIVE_4mA>;
};
};
wf_dbdc_pins: wf-dbdc-pins {
mux {
function = "wifi";
groups = "wf_dbdc";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <MTK_DRIVE_4mA>;
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
status = "okay";
spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
};
};
partition@380000 {
label = "fip";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "prod";
reg = <0x580000 0x20000>;
read-only;
};
partition@600000 {
label = "dual";
reg = <0x600000 0x100000>;
read-only;
};
partition@700000 {
label = "pot";
reg = <0x700000 0x100000>;
read-only;
};
partition@800000 {
label = "ubi";
reg = <0x800000 0x6400000>;
};
partition@6C00000 {
label = "ubi1";
reg = <0x6C00000 0x6400000>;
};
partition@D000000 {
label = "storage";
reg = <0xD000000 0x800000>;
};
};
};
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi_led_pins>;
status = "okay";
ws2812b@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "worldsemi,ws2812b";
reg = <0>;
spi-max-frequency = <3000000>;
led_status_rgb: led@0 {
reg = <0>;
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RGB>;
color-index = <LED_COLOR_ID_RED LED_COLOR_ID_GREEN LED_COLOR_ID_BLUE>;
};
};
};
&ssusb {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_5v>;
status = "okay";
};
&trng {
status = "okay";
};
&uart0 {
status = "okay";
};
&usb_phy {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
pinctrl-names = "default", "dbdc";
pinctrl-0 = <&wf_2g_5g_pins>;
pinctrl-1 = <&wf_dbdc_pins>;
status = "okay";
};

View File

@ -3,6 +3,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -12,8 +13,9 @@
bootargs = "dm-mod.create=\"acer,,,ro,0 1 zero 1 0 0 0\" rootfstype=squashfs,ext4 rootwait root=/dev/mmcblk0p6 fstools_ignore_partname=1";
};
memory@0 {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
reg_1p8v: regulator-1p8v {
@ -76,25 +78,25 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
@ -109,25 +111,25 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
@ -151,7 +153,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -168,7 +170,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -282,8 +284,6 @@
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
ports {
#address-cells = <1>;

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -26,8 +27,9 @@
bootargs-override = "";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
keys {
@ -159,13 +161,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -182,7 +184,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -199,7 +201,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -25,8 +26,9 @@
bootargs-override = "";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
keys {
@ -151,10 +153,7 @@
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
};
};
@ -166,13 +165,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -189,7 +188,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -206,7 +205,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -25,8 +26,9 @@
bootargs-override = "";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
keys {
@ -178,10 +180,7 @@
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
};
};
@ -193,13 +192,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -216,7 +215,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -233,7 +232,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -32,8 +33,9 @@
rootdisk-spim-nand = <&nand_rootdisk>;
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x80000000>;
device_type = "memory";
};
gpio-keys {
@ -299,15 +301,15 @@
&pio {
en8811_pwr_a: en8811-pwr-a {
pins = "GPIO_11";
drive-strength = <8>;
mediatek,pull-down-adv = <1>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
output-low;
};
en8811_pwr_b: en8811-pwr-b {
pins = "GPIO_12";
drive-strength = <8>;
mediatek,pull-down-adv = <1>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
output-low;
};
@ -335,22 +337,22 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
@ -364,22 +366,22 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
@ -404,13 +406,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>;
drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>;
drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
};
};
@ -431,33 +433,33 @@
usb_ngff_pins: usb-ngff-pins {
ngff-gnss-off {
pins = "GPIO_6";
drive-strength = <8>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
ngff-pe-rst {
pins = "GPIO_7";
drive-strength = <8>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
ngff-wwan-off {
pins = "GPIO_8";
drive-strength = <8>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
ngff-pwr-off {
pins = "GPIO_9";
drive-strength = <8>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
ngff-rst {
pins = "GPIO_10";
drive-strength = <8>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
ngff-coex {
pins = "SPI1_CS";
drive-strength = <8>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
@ -474,7 +476,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -491,7 +493,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -26,6 +27,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
gpio-keys {
@ -148,13 +150,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -189,7 +191,7 @@
"WF1_HB8",
"WF1_TOP_CLK",
"WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};

View File

@ -200,7 +200,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -214,22 +214,22 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
@ -243,22 +243,22 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
};

View File

@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -30,6 +31,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
gpio-keys {
@ -221,22 +223,22 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
@ -250,22 +252,22 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>;
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
};
@ -282,7 +284,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -28,6 +29,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
gpio-keys {
@ -311,13 +313,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -334,7 +336,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -26,8 +27,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
keys {
@ -238,13 +240,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -261,7 +263,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -25,6 +26,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
gpio-keys {
@ -118,13 +120,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -141,7 +143,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -8,6 +8,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -408,22 +409,22 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
@ -437,22 +438,22 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
@ -465,7 +466,7 @@
button_pins: button-pins {
pins = "GPIO_12";
mediatek,pull-down-adv = <0>; /* bias-disable */
bias-disable; /* bias-disable */
};
uart1_pins: uart1-pins {
@ -502,7 +503,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -25,6 +26,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
gpio-keys {
@ -276,13 +278,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
wf_2g_5g_pins: wf_2g_5g-pins {
@ -298,7 +300,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -3,6 +3,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -22,8 +23,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
reg_3p3v: regulator-3p3v {
@ -243,13 +245,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
};

View File

@ -68,7 +68,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -53,7 +53,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -68,7 +68,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -26,8 +27,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
reg_3p3v: regulator-3p3v {
@ -332,13 +334,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -355,7 +357,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -20,8 +21,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
keys {
@ -90,13 +92,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -120,7 +122,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -8,6 +8,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
/ {
aliases {
@ -23,8 +24,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
reg_1p8v: regulator-1p8v {
@ -156,21 +158,21 @@
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
cs-gpios = <0>, <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
cs-gpios = <0>, <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
spi_nand: spi_nand@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi_nand: spi_nand@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
nand_partitions: partitions {
compatible = "fixed-partitions";
@ -327,22 +329,22 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <4>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_4mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <4>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_4mA>;
bias-disable; /* bias-disable */
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0";
};
};
mux {
function = "uart";
groups = "uart0";
};
};
uart1_pins: uart1-pins {
mux {
@ -371,7 +373,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -388,16 +390,16 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
usb-oc-hog {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
input;
line-name = "usb-oc";
};
usb-oc-hog {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
input;
line-name = "usb-oc";
};
};
&spi1 {

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
@ -27,8 +28,9 @@
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
reg_3p3v: regulator-3p3v {
@ -311,13 +313,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -330,7 +332,7 @@
pins = "WF1_HB1", "WF1_HB2", "WF1_HB3", "WF1_HB4",
"WF1_HB0", "WF1_HB5", "WF1_HB6", "WF1_HB7",
"WF1_HB8", "WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986b.dtsi"
@ -21,8 +22,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
keys {
@ -179,13 +181,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -202,7 +204,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986b.dtsi"
@ -131,13 +132,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -154,7 +155,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -168,7 +169,7 @@
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -4,6 +4,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986b.dtsi"
@ -24,8 +25,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
keys {
@ -194,13 +196,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -217,7 +219,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -27,8 +27,9 @@
bootargs = "console=ttyS0,115200n1 pci=pcie_bus_perf root=PARTLABEL=rootfs";
};
memory {
memory@40000000 {
reg = <0x0 0x40000000 0x0 0x40000000>;
device_type = "memory";
};
reserved-memory {
@ -608,7 +609,7 @@
&pio {
button_pins: button-pins {
pins = "GPIO_RESET", "GPIO_WPS";
mediatek,pull-down-adv = <0>; /* bias-disable */
bias-disable; /* bias-disable */
};
gbe1_led0_pins: gbe1-led0-pins {
@ -710,13 +711,13 @@
sfp_i2c_pins: sfp-i2c-pins {
conf-scl {
pins = "LED_A";
drive-strength = <8>;
mediatek,pull-up-adv = <1>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
};
conf-sda {
pins = "LED_E";
drive-strength = <8>;
mediatek,pull-up-adv = <0>;
drive-strength = <MTK_DRIVE_8mA>;
bias-disable;
};
};

View File

@ -86,8 +86,9 @@
led-upgrade = &led_status_blue;
};
memory {
memory@40000000 {
reg = <0x0 0x40000000 0x0 0x40000000>;
device_type = "memory";
};
cpus {
@ -299,7 +300,7 @@
&pio {
button_pins: button-pins {
pins = "GPIO_RESET", "GPIO_WPS";
mediatek,pull-down-adv = <0>; /* bias-disable */
bias-disable; /* bias-disable */
};
mdio0_pins: mdio0-pins {

View File

@ -33,6 +33,7 @@
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
gpio-keys {

View File

@ -20,8 +20,9 @@
bootargs-append = " root=/dev/fit0 rootwait";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
reg_3p3v: regulator-3p3v {

View File

@ -5,6 +5,7 @@
*/
/dts-v1/;
#include <dt-bindings/pinctrl/mt65xx.h>
#include "mt7986a.dtsi"
/ {
@ -19,8 +20,9 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
reg_1p8v: regulator-1p8v {
@ -149,22 +151,22 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
@ -178,22 +180,22 @@
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
drive-strength = <MTK_DRIVE_6mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
drive-strength = <MTK_DRIVE_4mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
};
};
@ -218,13 +220,13 @@
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
drive-strength = <MTK_DRIVE_8mA>;
bias-disable; /* bias-disable */
};
};
@ -255,7 +257,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
@ -272,7 +274,7 @@
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
drive-strength = <MTK_DRIVE_4mA>;
};
};
};

View File

@ -16,6 +16,9 @@ acer,predator-w6d)
ucidef_set_led_netdev "internet" "INTERNET" "mdio-bus:06:amber:wan" "eth1" "link_10 link_100 link_1000 tx rx"
ucidef_set_led_netdev "internet" "INTERNET" "mdio-bus:06:green:wan" "eth1" "link_2500 tx rx"
;;
acer,predator-w6x)
ucidef_set_led_netdev "wan" "wan" "rgb:status" "eth1"
;;
asus,rt-ax52|\
snr,snr-cpe-ax2)
ucidef_set_led_netdev "wan" "wan" "blue:wan" "wan" "link tx rx"
@ -232,7 +235,8 @@ wavlink,wl-wn551x3)
ucidef_set_led_netdev "lan-2" "lan-2" "green:lan-2" "lan2" "link tx rx"
ucidef_set_led_netdev "wan" "wan" "green:wan" "eth1" "link tx rx"
;;
wavlink,wl-wn586x3)
wavlink,wl-wn586x3|\
wavlink,wl-wn586x3b)
ucidef_set_led_netdev "lan-1" "lan-1" "blue:lan-1" "lan1" "link tx rx"
ucidef_set_led_netdev "lan-2" "lan-2" "blue:lan-2" "lan2" "link tx rx"
ucidef_set_led_netdev "wan" "wan" "blue:wan" "eth1" "link tx rx"

View File

@ -28,6 +28,9 @@ mediatek_setup_interfaces()
acer,predator-w6d)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1
;;
acer,predator-w6x)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1
;;
acer,vero-w6m)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" internet
;;
@ -149,7 +152,8 @@ mediatek_setup_interfaces()
;;
tplink,tl-xdr6086|\
wavlink,wl-wn551x3|\
wavlink,wl-wn586x3)
wavlink,wl-wn586x3|\
wavlink,wl-wn586x3b)
ucidef_set_interfaces_lan_wan "lan1 lan2" eth1
;;
tplink,archer-ax80-v1)
@ -190,6 +194,11 @@ mediatek_setup_macs()
wan_mac=$(mmc_get_mac_ascii u-boot-env WANMAC)
lan_mac=$(mmc_get_mac_ascii u-boot-env LANMAC)
;;
acer,predator-w6x)
wan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
lan_mac=$(macaddr_add "$wan_mac" 1)
label_mac=$wan_mac
;;
bananapi,bpi-r3|\
bananapi,bpi-r3-mini|\
bananapi,bpi-r4)

View File

@ -27,6 +27,11 @@ case "$board" in
[ "$PHYNBR" = "0" ] && mmc_get_mac_ascii u-boot-env 2gMAC > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && mmc_get_mac_ascii u-boot-env 5gMAC > /sys${DEVPATH}/macaddress
;;
acer,predator-w6x)
hw_mac_addr="$(mtd_get_mac_ascii u-boot-env ethaddr)"
[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 3 > /sys${DEVPATH}/macaddress
;;
asus,rt-ax59u)
CI_UBIPART="UBI_DEV"
addr=$(mtd_get_mac_binary_ubi "Factory" 0x4)

View File

@ -12,6 +12,15 @@ preinit_set_mac_address() {
ip link set dev game address "$lan_mac"
ip link set dev eth1 address "$wan_mac"
;;
acer,predator-w6x)
wan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
lan_mac=$(macaddr_add "$wan_mac" 1)
ip link set dev lan1 address "$lan_mac"
ip link set dev lan2 address "$lan_mac"
ip link set dev lan3 address "$lan_mac"
ip link set dev lan4 address "$lan_mac"
ip link set dev eth1 address "$wan_mac"
;;
acer,vero-w6m)
wan_mac=$(mmc_get_mac_ascii u-boot-env WANMAC)
lan_mac=$(mmc_get_mac_ascii u-boot-env LANMAC)

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