Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2025-04-23 17:17:06 +08:00
commit 9691b5d1b2
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
152 changed files with 7715 additions and 1564 deletions

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@ -502,6 +502,34 @@ define Build/kernel-bin
cp $< $@
endef
define Build/gl-qsdk-factory
$(eval GL_NAME := $(call param_get_default,type,$(1),$(DEVICE_NAME)))
$(eval GL_IMGK := $(KDIR_TMP)/$(DEVICE_IMG_PREFIX)-squashfs-factory.img)
$(eval GL_ITS := $(KDIR_TMP)/$(GL_NAME).its)
$(eval GL_UBI := "ubi")
$(CP) $(BOOT_SCRIPT) $(KDIR_TMP)/
$(shell mv $(GL_IMGK) $(GL_IMGK).tmp)
sed -i "s/rootfs_size/`wc -c $(GL_IMGK) | \
cut -d " " -f 1 | xargs printf "0x%x"`/g" $(KDIR_TMP)/$(BOOT_SCRIPT);
$(TOPDIR)/scripts/mkits-qsdk-ipq-image.sh \
$(GL_ITS) \
$(BOOT_SCRIPT) \
$(GL_UBI) \
$(GL_IMGK)
PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage -f \
$(GL_ITS) \
$(GL_IMGK)
$(RM) \
$(GL_ITS) \
$(GL_IMGK).tmp \
$(KDIR_TMP)/$(notdir $(BOOT_SCRIPT))
endef
define Build/linksys-image
let \
size="$$(stat -c%s $@)" \

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@ -6,7 +6,7 @@ ifdef CONFIG_TESTING_KERNEL
KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
endif
KERNEL_DETAILS_FILE=$(INCLUDE_DIR)/kernel-$(KERNEL_PATCHVER)
KERNEL_DETAILS_FILE=$(GENERIC_PLATFORM_DIR)/kernel-$(KERNEL_PATCHVER)
ifeq ($(wildcard $(KERNEL_DETAILS_FILE)),)
$(error Missing kernel version/hash file for $(KERNEL_PATCHVER). Please create $(KERNEL_DETAILS_FILE))
endif
@ -14,7 +14,7 @@ endif
include $(KERNEL_DETAILS_FILE)
ifdef KERNEL_TESTING_PATCHVER
KERNEL_TESTING_DETAILS_FILE=$(INCLUDE_DIR)/kernel-$(KERNEL_TESTING_PATCHVER)
KERNEL_TESTING_DETAILS_FILE=$(GENERIC_PLATFORM_DIR)/kernel-$(KERNEL_TESTING_PATCHVER)
ifeq ($(wildcard $(KERNEL_TESTING_DETAILS_FILE)),)
$(error Missing kernel version/hash file for $(KERNEL_TESTING_PATCHVER). Please create $(KERNEL_TESTING_DETAILS_FILE))
endif

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@ -171,11 +171,12 @@ ifeq ($(TARGET_BUILD),1)
endif
endif
GENERIC_PLATFORM_DIR := $(TOPDIR)/target/linux/generic
ifneq ($(TARGET_BUILD)$(if $(DUMP),,1),)
include $(INCLUDE_DIR)/kernel-version.mk
endif
GENERIC_PLATFORM_DIR := $(TOPDIR)/target/linux/generic
GENERIC_BACKPORT_DIR := $(GENERIC_PLATFORM_DIR)/backport$(if $(wildcard $(GENERIC_PLATFORM_DIR)/backport-$(KERNEL_PATCHVER)),-$(KERNEL_PATCHVER))
GENERIC_PATCH_DIR := $(GENERIC_PLATFORM_DIR)/pending$(if $(wildcard $(GENERIC_PLATFORM_DIR)/pending-$(KERNEL_PATCHVER)),-$(KERNEL_PATCHVER))
GENERIC_HACK_DIR := $(GENERIC_PLATFORM_DIR)/hack$(if $(wildcard $(GENERIC_PLATFORM_DIR)/hack-$(KERNEL_PATCHVER)),-$(KERNEL_PATCHVER))

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@ -384,8 +384,9 @@ json_load "$(/usr/libexec/validate_firmware_image "$IMAGE")" || {
exit 1
}
json_get_var valid "valid"
json_get_var forceable "forceable"
[ "$valid" -eq 0 ] && {
if [ $FORCE -eq 1 ]; then
if [ $FORCE -eq 1 ] && [ "$forceable" -eq 1 ]; then
echo "Image check failed but --force given - will update anyway!" >&2
else
echo "Image check failed." >&2

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@ -56,7 +56,17 @@ json_init
# Call platform_check_image() here so it can add its test
# results and still mark image properly.
json_set_namespace $old_ns
platform_check_image "$1" >&2 || notify_firmware_invalid
platform_check_image "$1" >&2
case "$?" in
0)
;;
74)
notify_firmware_broken
;;
*)
notify_firmware_invalid
;;
esac
json_set_namespace validate_firmware_image old_ns
json_close_object
json_add_boolean valid "$VALID"

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@ -38,7 +38,20 @@ define Trusted-Firmware-A/stm32mp135f-dk
DTB_FILE_NAME=stm32mp135f-dk.dtb
endef
TFA_TARGETS := stm32mp135f-dk
define Trusted-Firmware-A/stm32mp157c-dk2
$(call Trusted-Firmware-A/stm32mp1)
NAME:=STM32MP157C-DK2
DTB_FILE_NAME=stm32mp157c-dk2.dtb
endef
define Trusted-Firmware-A/stm32mp157c-dk2-scmi
$(call Trusted-Firmware-A/stm32mp157c-dk2)
NAME:=STM32MP157C-DK2 (SCMI)
endef
TFA_TARGETS := stm32mp135f-dk \
stm32mp157c-dk2 \
stm32mp157c-dk2-scmi
TFA_MAKE_FLAGS += \
ARCH=aarch32 AARCH32_SP=optee \
@ -54,7 +67,7 @@ TFA_MAKE_FLAGS += \
define Package/trusted-firmware-a/install
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
$(CP) $(PKG_BUILD_DIR)/build/$(PLAT)/release/tf-a-$(BUILD_VARIANT).stm32 \
$(CP) $(PKG_BUILD_DIR)/build/$(PLAT)/release/tf-a-$(subst -scmi,,$(BUILD_VARIANT)).stm32 \
$(STAGING_DIR_IMAGE)/tf-a-$(BUILD_VARIANT).stm32
$(CP) $(PKG_BUILD_DIR)/build/$(PLAT)/release/fip.bin \
$(STAGING_DIR_IMAGE)/fip-$(BUILD_VARIANT).bin

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@ -34,7 +34,22 @@ define Optee-os/stm32mp135f-dk
PLAT_FLAVOR:=135F_DK
endef
OPTEE_TARGETS := stm32mp135f-dk
define Optee-os/stm32mp157c-dk2
$(call Optee-os/stm32mp1)
NAME:=STM32MP157C-DK2
PLAT_FLAVOR:=157C_DK2
endef
define Optee-os/stm32mp157c-dk2-scmi
$(call Optee-os/stm32mp1)
NAME:=STM32MP157C-DK2 (SCMI)
PLAT_FLAVOR:=157C_DK2_SCMI
endef
OPTEE_TARGETS := \
stm32mp135f-dk \
stm32mp157c-dk2 \
stm32mp157c-dk2-scmi
define Package/optee-os/install/default
endef

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@ -5,9 +5,9 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2025.01
PKG_VERSION:=2025.04
PKG_RELEASE:=1
PKG_HASH:=cdef7d507c93f1bbd9f015ea9bc21fa074268481405501945abc6f854d5b686f
PKG_HASH:=439d3bef296effd54130be6a731c5b118be7fddd7fcc663ccbc5fb18294d8718
PKG_MAINTAINER:=Sarah Maedel <openwrt@tbspace.de>

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@ -1,26 +0,0 @@
From 57ad1ed7e84ac36d3d838d8c1eba96f586995a42 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Thu, 30 Jan 2025 22:07:11 +0000
Subject: [PATCH] rockchip: sdram: Allow the first bank to extend beyond 4 GiB
Allow the first bank to extend beyond 4 GiB when the blob of space for
peripheral is located before start of DRAM, e.g. when start of DRAM
is 0x40000000 and continue beyond the 4 GiB mark.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
arch/arm/mach-rockchip/sdram.c | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/arm/mach-rockchip/sdram.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -309,6 +309,8 @@ int dram_init_banksize(void)
if (ram_top > SZ_4G && top < SZ_4G) {
gd->bd->bi_dram[1].start = SZ_4G;
gd->bd->bi_dram[1].size = ram_top - gd->bd->bi_dram[1].start;
+ } else if (ram_top > SZ_4G && top == SZ_4G) {
+ gd->bd->bi_dram[0].size = ram_top - gd->bd->bi_dram[0].start;
}
#else
#ifdef CONFIG_SPL_OPTEE_IMAGE

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@ -1,26 +0,0 @@
From 356236126da7877ab115c65f8cb21215443beb2f Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Thu, 30 Jan 2025 22:07:12 +0000
Subject: [PATCH] rockchip: sdram: Limit usable ram_top to max 4G
U-Boot only works correctly when it uses RAM below the 4G address
boundary on Rockchip SoCs. Limit usable gd->ram_top to max 4G.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
arch/arm/mach-rockchip/sdram.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/arch/arm/mach-rockchip/sdram.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -487,7 +487,8 @@ int dram_init(void)
phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
{
- unsigned long top = CFG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE;
+ /* Make sure U-Boot only uses the space below the 4G address boundary */
+ u64 top = min_t(u64, CFG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE, SZ_4G);
return (gd->ram_top > top) ? top : gd->ram_top;
}

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@ -1,31 +0,0 @@
From d5fc369a598d0e84dbcfe08e80d676cdd0a54a78 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Thu, 30 Jan 2025 22:07:13 +0000
Subject: [PATCH] rockchip: sdram: Ensure ram_base is correct in SPL
Most Rockchip SoCs use 0x0 as DRAM base address, however some SoCs use
0x60000000 and RK3576 use 0x40000000 as DRAM base address.
CFG_SYS_SDRAM_BASE is defined with correct address for each SoC and
U-Boot proper use this to set correct gd->ram_base in setup_dest_addr().
SPL never assign any value to gd->ram_base and instead use the default,
0x0. Set correct gd->ram_base in dram_init() to ensure its correctness
in SPL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
---
arch/arm/mach-rockchip/sdram.c | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm/mach-rockchip/sdram.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -478,6 +478,7 @@ int dram_init(void)
debug("Cannot get DRAM size: %d\n", ret);
return ret;
}
+ gd->ram_base = ram.base;
gd->ram_size = ram.size;
debug("SDRAM base=%lx, size=%lx\n",
(unsigned long)ram.base, (unsigned long)ram.size);

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@ -93,16 +93,16 @@ Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
}
--- a/arch/arm/mach-rockchip/rk3568/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568/rk3568.c
@@ -6,6 +6,7 @@
#include <dm.h>
@@ -9,6 +9,7 @@
#include <misc.h>
#include <asm/armv8/mmu.h>
#include <asm/arch-rockchip/bootrom.h>
+#include <asm/arch-rockchip/boot_mode.h>
#include <asm/arch-rockchip/grf_rk3568.h>
#include <asm/arch-rockchip/hardware.h>
#include <dt-bindings/clock/rk3568-cru.h>
@@ -139,3 +140,26 @@ int arch_cpu_init(void)
#endif
@@ -200,3 +201,26 @@ int checkboard(void)
return 0;
}
+

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@ -1,13 +1,13 @@
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -52,3 +52,4 @@ obj-$(CONFIG_WDT_STM32MP) += stm32mp_wdt
@@ -53,3 +53,4 @@ obj-$(CONFIG_WDT_STM32MP) += stm32mp_wdt
obj-$(CONFIG_WDT_SUNXI) += sunxi_wdt.o
obj-$(CONFIG_WDT_TANGIER) += tangier_wdt.o
obj-$(CONFIG_WDT_XILINX) += xilinx_wwdt.o
+obj-$(CONFIG_WDT_PCAT) += pcat_wdt.o
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -443,4 +443,10 @@ config WDT_FTWDT010
@@ -450,4 +450,10 @@ config WDT_FTWDT010
help
Faraday Technology ftwdt010 watchdog is an architecture independent
watchdog. It is usually used in SoC chip design.

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@ -1,6 +1,6 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -87,6 +87,23 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \
@@ -74,6 +74,20 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \
rk3368-geekbox.dtb \
rk3368-px5-evb.dtb \
@ -8,9 +8,6 @@
+ rk3399-guangmiao-g4c.dtb \
+ rk3399-nanopi-r4se.dtb
+
+dtb-$(CONFIG_ROCKCHIP_RK3566) += \
+ rk3566-nanopi-r3s.dtb \
+
+dtb-$(CONFIG_ROCKCHIP_RK3568) += \
+ rk3568-armsom-sige3.dtb \
+ rk3568-mmbox-anas3035.dtb \

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@ -1,17 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
#include "rk356x-u-boot.dtsi"
&sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
};
&vcc5v0_usb {
/delete-property/ regulator-always-on;
/delete-property/ regulator-boot-on;
};

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@ -1,572 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
* Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd.
* (http://www.friendlyarm.com)
*
* Copyright (c) 2024 Tianling Shen <cnsztl@gmail.com>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3566.dtsi"
/ {
model = "FriendlyARM NanoPi R3S";
compatible = "friendlyarm,nanopi-r3s", "rockchip,rk3566";
aliases {
ethernet0 = &gmac1;
mmc0 = &sdmmc0;
mmc1 = &sdhci;
led-boot = &power_led;
led-failsafe = &power_led;
led-running = &power_led;
led-upgrade = &power_led;
};
chosen: chosen {
stdout-path = "serial2:1500000n8";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&reset_button_pin>;
button-reset {
label = "reset";
gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <50>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&power_led_pin>, <&lan_led_pin>, <&wan_led_pin>;
power_led: led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
};
lan_led: led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
};
wan_led: led-2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
};
};
vdd_usbc: vdd-usbc-regulator {
compatible = "regulator-fixed";
regulator-name = "vdd_usbc";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vdd_usbc>;
};
vcc3v3_sys: vcc3v3-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_sys>;
};
vcc5v0_usb: vcc5v0_usb-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb_host_en>;
regulator-name = "vcc5v0_usb";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
};
&combphy1 {
status = "okay";
};
&combphy2 {
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&cpu1 {
cpu-supply = <&vdd_cpu>;
};
&cpu2 {
cpu-supply = <&vdd_cpu>;
};
&cpu3 {
cpu-supply = <&vdd_cpu>;
};
&gmac1 {
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
assigned-clock-rates = <0>, <125000000>;
clock_in_out = "output";
phy-mode = "rgmii-id";
phy-handle = <&rgmii_phy1>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m0_miim
&gmac1m0_tx_bus2_level3
&gmac1m0_rx_bus2
&gmac1m0_rgmii_clk_level2
&gmac1m0_rgmii_bus_level3>;
snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
status = "okay";
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&i2c0 {
status = "okay";
vdd_cpu: regulator@1c {
compatible = "tcs,tcs4525";
reg = <0x1c>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "vdd_cpu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1150000>;
regulator-ramp-delay = <2300>;
vin-supply = <&vcc5v0_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
#clock-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>;
system-power-controller;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
wakeup-source;
regulators {
vdd_logic: DCDC_REG1 {
regulator-name = "vdd_logic";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-name = "vdd_gpu";
regulator-always-on;
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdd_npu: DCDC_REG4 {
regulator-name = "vdd_npu";
regulator-initial-mode = <0x2>;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: DCDC_REG5 {
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_image: LDO_REG1 {
regulator-name = "vdda0v9_image";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <950000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v9: LDO_REG2 {
regulator-name = "vdda_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_pmu: LDO_REG3 {
regulator-name = "vdda0v9_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vccio_acodec: LDO_REG4 {
regulator-name = "vccio_acodec";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_pmu: LDO_REG6 {
regulator-name = "vcc3v3_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcca_1v8: LDO_REG7 {
regulator-name = "vcca_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pmu: LDO_REG8 {
regulator-name = "vcca1v8_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcca1v8_image: LDO_REG9 {
regulator-name = "vcca1v8_image";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3: SWITCH_REG1 {
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_sd: SWITCH_REG2 {
regulator-name = "vcc3v3_sd";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&i2c1 {
status = "okay";
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
};
};
&mdio1 {
rgmii_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
interrupt-parent = <&gpio4>;
interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&eth_phy_reset_pin>;
realtek,led-data = <0xae00>;
};
};
&pcie2x1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie_reset_h>;
reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
status = "okay";
pcie@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
rtl8168: pcie@1,0 {
compatible = "pci10ec,8168";
reg = <0x000000 0 0 0 0>;
realtek,led-data = <0x870>;
};
};
};
&pinctrl {
gpio-leds {
lan_led_pin: lan-led-pin {
rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
power_led_pin: power-led-pin {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
wan_led_pin: wan-led-pin {
rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gmac {
eth_phy_reset_pin: eth-phy-reset-pin {
rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pcie {
pcie_reset_h: pcie-reset-h {
rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
rockchip-key {
reset_button_pin: reset-button-pin {
rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
rtc {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
vcc5v0_usb_host_en: vcc5v0-usb-host-en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pmu_io_domains {
status = "okay";
pmuio1-supply = <&vcc3v3_pmu>;
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio2-supply = <&vcc_1v8>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_1v8>;
vccio6-supply = <&vcc_3v3>;
vccio7-supply = <&vcc_3v3>;
};
&sdhci {
bus-width = <8>;
max-frequency = <200000000>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
status = "okay";
};
&sdmmc0 {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
max-frequency = <150000000>;
no-sdio;
no-mmc;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
sd-uhs-sdr50;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&tsadc {
status = "okay";
};
&uart2 {
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy0_host {
phy-supply = <&vcc5v0_usb>;
status = "okay";
};
&usb2phy0_otg {
status = "okay";
};
&usb_host0_xhci {
extcon = <&usb2phy0>;
status = "okay";
};
&usb_host1_xhci {
status = "okay";
};
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
status = "okay";
};
&vop_mmu {
status = "okay";
};

View File

@ -1,73 +0,0 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_DEFAULT_DEVICE_TREE="rk3566-nanopi-r3s"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_SERIAL=y
CONFIG_DEBUG_UART_BASE=0xFE660000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-nanopi-r3s.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_ATF=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_PHY_REALTEK=y
CONFIG_DWC_ETH_QOS=y
CONFIG_DWC_ETH_QOS_ROCKCHIP=y
CONFIG_RTL8169=y
CONFIG_NVME_PCI=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_ERRNO_STR=y

View File

@ -28,13 +28,33 @@ define U-Boot/stm32mp13
UBOOT_CONFIG:=stm32mp13
endef
define U-Boot/stm32mp15
BUILD_SUBTARGET:=stm32mp1
UBOOT_CONFIG:=stm32mp15
endef
define U-Boot/stm32mp135f-dk
$(call U-Boot/stm32mp13)
NAME:=STM32MP135F-DK
DEVICE_TREE:=stm32mp135f-dk
endef
UBOOT_TARGETS := stm32mp135f-dk
define U-Boot/stm32mp157c-dk2
$(call U-Boot/stm32mp15)
NAME:=STM32MP157C-DK2
DEVICE_TREE:=stm32mp157c-dk2
endef
define U-Boot/stm32mp157c-dk2-scmi
$(call U-Boot/stm32mp15)
NAME:=STM32MP157C-DK2 (SCMI)
DEVICE_TREE:=stm32mp157c-dk2-scmi
endef
UBOOT_TARGETS := \
stm32mp135f-dk \
stm32mp157c-dk2 \
stm32mp157c-dk2-scmi
UBOOT_MAKE_FLAGS += DEVICE_TREE=$(DEVICE_TREE)

View File

@ -8,6 +8,16 @@ touch /etc/config/ubootenv
board=$(board_name)
case "$board" in
elecom,wrc-x3000gs2)
idx="$(find_mtd_index 0:appsblenv)"
[ -n "$idx" ] && \
ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000"
;;
glinet,gl-b3000)
idx="$(find_mtd_index 0:APPSBLENV)"
[ -n "$idx" ] && \
ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x40000" "0x20000"
;;
linksys,mr5500|\
linksys,mx2000|\
linksys,mx5500|\

View File

@ -39,6 +39,7 @@ netgear,sxs80|\
netgear,wax218|\
netgear,wax620|\
netgear,wax630|\
tplink,deco-x80-5g|\
tplink,eap620hd-v1|\
tplink,eap660hd-v1)
ubootenv_add_mtd "0:appsblenv" "0x0" "0x40000" "0x20000"

View File

@ -65,6 +65,7 @@ kroks,kndrt31r19|\
mediatek,linkit-smart-7688|\
samknows,whitebox-v8|\
xiaomi,mi-router-4c|\
xiaomi,miwifi-3a|\
xiaomi,miwifi-nano|\
zbtlink,zbt-wg2626|\
zte,mf283plus)

View File

@ -6,9 +6,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware/qca-wireless.git
PKG_SOURCE_DATE:=2025-04-15
PKG_SOURCE_VERSION:=38a18dc26c9b150f06f56b9c5972d789eb5bc0c4
PKG_MIRROR_HASH:=a10a9b524ecd91854265b04819303410ae77e1f5a093f9cc8eb43e25e99c1bae
PKG_SOURCE_DATE:=2025-04-22
PKG_SOURCE_VERSION:=acf37292d2c1c27930b4d9ba58276b599706910d
PKG_MIRROR_HASH:=1068b8ea938bfb0cd72bd48ef329e885a283e91f2ae864bfba9171c729e3d308
PKG_FLAGS:=nonshared
include $(INCLUDE_DIR)/package.mk
@ -38,8 +38,10 @@ ALLWIFIBOARDS:= \
dynalink_dl-wrx36 \
edgecore_eap102 \
edimax_cax1800 \
elecom_wrc-x3000gs2 \
glinet_gl-ax1800 \
glinet_gl-axt1800 \
glinet_gl-b3000 \
linksys_homewrk \
linksys_mr5500 \
linksys_mr7350 \
@ -66,6 +68,7 @@ ALLWIFIBOARDS:= \
redmi_ax6 \
skspruce_wia3300-20 \
spectrum_sax1v1k \
tplink_deco-x80-5g \
tplink_eap610-outdoor \
tplink_eap620hd-v1 \
tplink_eap623od-hd-v1 \
@ -187,8 +190,10 @@ $(eval $(call generate-ipq-wifi-package,compex_wpq873,Compex WPQ-873))
$(eval $(call generate-ipq-wifi-package,dynalink_dl-wrx36,Dynalink DL-WRX36))
$(eval $(call generate-ipq-wifi-package,edgecore_eap102,Edgecore EAP102))
$(eval $(call generate-ipq-wifi-package,edimax_cax1800,Edimax CAX1800))
$(eval $(call generate-ipq-wifi-package,elecom_wrc-x3000gs2,ELECOM WRC-X3000GS2))
$(eval $(call generate-ipq-wifi-package,glinet_gl-ax1800,GL.iNet GL-AX1800))
$(eval $(call generate-ipq-wifi-package,glinet_gl-axt1800,GL.iNet GL-AXT1800))
$(eval $(call generate-ipq-wifi-package,glinet_gl-b3000,GL.iNet GL-B3000))
$(eval $(call generate-ipq-wifi-package,linksys_homewrk,Linksys HomeWRK))
$(eval $(call generate-ipq-wifi-package,linksys_mr5500,Linksys MR5500))
$(eval $(call generate-ipq-wifi-package,linksys_mr7350,Linksys MR7350))
@ -215,6 +220,7 @@ $(eval $(call generate-ipq-wifi-package,prpl_haze,prpl Haze))
$(eval $(call generate-ipq-wifi-package,redmi_ax6,Redmi AX6))
$(eval $(call generate-ipq-wifi-package,skspruce_wia3300-20,SKSpruce WIA3300-20))
$(eval $(call generate-ipq-wifi-package,spectrum_sax1v1k,Spectrum SAX1V1K))
$(eval $(call generate-ipq-wifi-package,tplink_deco-x80-5g,TP-Link Deco X80-5G))
$(eval $(call generate-ipq-wifi-package,tplink_eap610-outdoor,TPLink EAP610-Outdoor))
$(eval $(call generate-ipq-wifi-package,tplink_eap620hd-v1,TP-Link EAP620 HD v1))
$(eval $(call generate-ipq-wifi-package,tplink_eap623od-hd-v1,TP-Link EAP623-Outdoor HD v1))

View File

@ -8,7 +8,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=murata-nvram
PKG_RELEASE:=1
PKG_RELEASE:=2
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2024-09-28
@ -43,6 +43,12 @@ define Package/murata-nvram-43430-sdio/install
$(LN) \
cyfmac43430-sdio.1DX.stm32.txt \
$(1)/lib/firmware/brcm/brcmfmac43430-sdio.st,stm32mp135f-dk.txt
$(LN) \
cyfmac43430-sdio.1DX.stm32.txt \
$(1)/lib/firmware/brcm/brcmfmac43430-sdio.st,stm32mp157c-dk2.txt
$(LN) \
cyfmac43430-sdio.1DX.stm32.txt \
$(1)/lib/firmware/brcm/brcmfmac43430-sdio.st,stm32mp157c-dk2-scmi.txt
endef
$(eval $(call BuildPackage,murata-nvram-43430-sdio))

View File

@ -14,8 +14,10 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=linux
PKG_PATCHVER:=6.6
# Manually include kernel version and hash from kernel details file
include $(INCLUDE_DIR)/kernel-$(PKG_PATCHVER)
GENERIC_PLATFORM_DIR := $(CURDIR)/../../../target/linux/generic
include $(GENERIC_PLATFORM_DIR)/kernel-$(PKG_PATCHVER)
PKG_VERSION:=$(PKG_PATCHVER)$(strip $(LINUX_VERSION-$(PKG_PATCHVER)))
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
@ -23,7 +25,6 @@ PKG_SOURCE_URL:=@KERNEL/linux/kernel/v$(word 1,$(subst ., ,$(PKG_PATCHVER))).x
PKG_HASH:=$(LINUX_KERNEL_HASH-$(strip $(PKG_VERSION)))
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/bpf-headers/$(PKG_NAME)-$(PKG_VERSION)
GENERIC_PLATFORM_DIR := $(CURDIR)/../../../target/linux/generic
GENERIC_BACKPORT_DIR := $(GENERIC_PLATFORM_DIR)/backport$(if $(wildcard $(GENERIC_PLATFORM_DIR)/backport-$(PKG_PATCHVER)),-$(PKG_PATCHVER))
GENERIC_PATCH_DIR := $(GENERIC_PLATFORM_DIR)/pending$(if $(wildcard $(GENERIC_PLATFORM_DIR)/pending-$(PKG_PATCHVER)),-$(PKG_PATCHVER))
GENERIC_HACK_DIR := $(GENERIC_PLATFORM_DIR)/hack$(if $(wildcard $(GENERIC_PLATFORM_DIR)/hack-$(PKG_PATCHVER)),-$(PKG_PATCHVER))

View File

@ -1934,6 +1934,23 @@ endef
$(eval $(call KernelPackage,igc))
define KernelPackage/hinic
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Huawei Intelligent PCIE Network Interface Card support
DEPENDS:=@PCI_SUPPORT @TARGET_x86||TARGET_armsr_armv8
FILES:=$(LINUX_DIR)/drivers/net/ethernet/huawei/hinic/hinic.ko
KCONFIG:=CONFIG_HINIC
AUTOLOAD:=$(call AutoProbe,hinic)
endef
define KernelPackage/hinic/description
Kernel module for HiNIC PCIE Ethernet cards
endef
$(eval $(call KernelPackage,hinic))
define KernelPackage/sfc
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Solarflare SFC9000/SFC9100/EF100-family support

View File

@ -34,7 +34,7 @@ Signed-off-by: Sriram R <srirrama@codeaurora.org>
.name = "qca2066 hw2.1",
--- a/drivers/net/wireless/ath/ath11k/dp.c
+++ b/drivers/net/wireless/ath/ath11k/dp.c
@@ -361,12 +361,66 @@ void ath11k_dp_stop_shadow_timers(struct
@@ -348,12 +348,66 @@ void ath11k_dp_stop_shadow_timers(struct
ath11k_dp_shadow_stop_timer(ab, &ab->dp.reo_cmd_timer);
}
@ -101,7 +101,7 @@ Signed-off-by: Sriram R <srirrama@codeaurora.org>
ath11k_dp_srng_cleanup(ab, &dp->wbm_desc_rel_ring);
ath11k_dp_srng_cleanup(ab, &dp->tcl_cmd_ring);
ath11k_dp_srng_cleanup(ab, &dp->tcl_status_ring);
@@ -388,6 +442,8 @@ static int ath11k_dp_srng_common_setup(s
@@ -375,6 +429,8 @@ static int ath11k_dp_srng_common_setup(s
int i, ret;
u8 tcl_num, wbm_num;
@ -112,7 +112,7 @@ Signed-off-by: Sriram R <srirrama@codeaurora.org>
DP_WBM_RELEASE_RING_SIZE);
--- a/drivers/net/wireless/ath/ath11k/dp.h
+++ b/drivers/net/wireless/ath/ath11k/dp.h
@@ -44,6 +44,8 @@ struct dp_rx_tid {
@@ -46,6 +46,8 @@ struct dp_rx_tid {
#define DP_MON_PURGE_TIMEOUT_MS 100
#define DP_MON_SERVICE_BUDGET 128
@ -121,7 +121,7 @@ Signed-off-by: Sriram R <srirrama@codeaurora.org>
struct dp_reo_cache_flush_elem {
struct list_head list;
struct dp_rx_tid data;
@@ -286,6 +288,10 @@ struct ath11k_dp {
@@ -288,6 +290,10 @@ struct ath11k_dp {
spinlock_t reo_cmd_lock;
struct ath11k_hp_update_timer reo_cmd_timer;
struct ath11k_hp_update_timer tx_ring_timer[DP_TCL_NUM_RING_MAX];
@ -132,7 +132,7 @@ Signed-off-by: Sriram R <srirrama@codeaurora.org>
};
/* HTT definitions */
@@ -1689,5 +1695,6 @@ void ath11k_dp_shadow_init_timer(struct
@@ -1691,5 +1697,6 @@ void ath11k_dp_shadow_init_timer(struct
struct ath11k_hp_update_timer *update_timer,
u32 interval, u32 ring_id);
void ath11k_dp_stop_shadow_timers(struct ath11k_base *ab);

View File

@ -0,0 +1,140 @@
From 64a1ba4072b34af1b76bf15fca5c2075b8cc4d64 Mon Sep 17 00:00:00 2001
From: Aditya Kumar Singh <aditya.kumar.singh@oss.qualcomm.com>
Date: Thu, 23 Jan 2025 21:51:38 +0530
Subject: [PATCH] wifi: ath12k: fix handling of 6 GHz rules
In the US country code, to avoid including 6 GHz rules in the 5 GHz rules
list, the number of 5 GHz rules is set to a default constant value of 4
(REG_US_5G_NUM_REG_RULES). However, if there are more than 4 valid 5 GHz
rules, the current logic will bypass the legitimate 6 GHz rules.
For example, if there are 5 valid 5 GHz rules and 1 valid 6 GHz rule, the
current logic will only consider 4 of the 5 GHz rules, treating the last
valid rule as a 6 GHz rule. Consequently, the actual 6 GHz rule is never
processed, leading to the eventual disabling of 6 GHz channels.
To fix this issue, instead of hardcoding the value to 4, use a helper
function to determine the number of 6 GHz rules present in the 5 GHz rules
list and ignore only those rules.
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.3.1-00173-QCAHKSWPL_SILICONZ-1
Cc: stable@vger.kernel.org
Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 devices")
Signed-off-by: Aditya Kumar Singh <aditya.kumar.singh@oss.qualcomm.com>
Link: https://patch.msgid.link/20250123-fix_6ghz_rules_handling-v1-1-d734bfa58ff4@oss.qualcomm.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
---
drivers/net/wireless/ath/ath12k/wmi.c | 61 ++++++++++++++++++++++++++---------
drivers/net/wireless/ath/ath12k/wmi.h | 1 -
2 files changed, 45 insertions(+), 17 deletions(-)
--- a/drivers/net/wireless/ath/ath12k/wmi.c
+++ b/drivers/net/wireless/ath/ath12k/wmi.c
@@ -4790,6 +4790,22 @@ static struct ath12k_reg_rule
return reg_rule_ptr;
}
+static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule,
+ u32 num_reg_rules)
+{
+ u8 num_invalid_5ghz_rules = 0;
+ u32 count, start_freq;
+
+ for (count = 0; count < num_reg_rules; count++) {
+ start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ);
+
+ if (start_freq >= ATH12K_MIN_6G_FREQ)
+ num_invalid_5ghz_rules++;
+ }
+
+ return num_invalid_5ghz_rules;
+}
+
static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab,
struct sk_buff *skb,
struct ath12k_reg_info *reg_info)
@@ -4800,6 +4816,7 @@ static int ath12k_pull_reg_chan_list_ext
u32 num_2g_reg_rules, num_5g_reg_rules;
u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
+ u8 num_invalid_5ghz_ext_rules;
u32 total_reg_rules = 0;
int ret, i, j;
@@ -4893,20 +4910,6 @@ static int ath12k_pull_reg_chan_list_ext
memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
- /* FIXME: Currently FW includes 6G reg rule also in 5G rule
- * list for country US.
- * Having same 6G reg rule in 5G and 6G rules list causes
- * intersect check to be true, and same rules will be shown
- * multiple times in iw cmd. So added hack below to avoid
- * parsing 6G rule from 5G reg rule list, and this can be
- * removed later, after FW updates to remove 6G reg rule
- * from 5G rules list.
- */
- if (memcmp(reg_info->alpha2, "US", 2) == 0) {
- reg_info->num_5g_reg_rules = REG_US_5G_NUM_REG_RULES;
- num_5g_reg_rules = reg_info->num_5g_reg_rules;
- }
-
reg_info->dfs_region = le32_to_cpu(ev->dfs_region);
reg_info->phybitmap = le32_to_cpu(ev->phybitmap);
reg_info->num_phy = le32_to_cpu(ev->num_phy);
@@ -5009,8 +5012,29 @@ static int ath12k_pull_reg_chan_list_ext
}
}
+ ext_wmi_reg_rule += num_2g_reg_rules;
+
+ /* Firmware might include 6 GHz reg rule in 5 GHz rule list
+ * for few countries along with separate 6 GHz rule.
+ * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
+ * causes intersect check to be true, and same rules will be
+ * shown multiple times in iw cmd.
+ * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
+ */
+ num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule,
+ num_5g_reg_rules);
+
+ if (num_invalid_5ghz_ext_rules) {
+ ath12k_dbg(ab, ATH12K_DBG_WMI,
+ "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
+ reg_info->alpha2, reg_info->num_5g_reg_rules,
+ num_invalid_5ghz_ext_rules);
+
+ num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules;
+ reg_info->num_5g_reg_rules = num_5g_reg_rules;
+ }
+
if (num_5g_reg_rules) {
- ext_wmi_reg_rule += num_2g_reg_rules;
reg_info->reg_rules_5g_ptr =
create_ext_reg_rules_from_wmi(num_5g_reg_rules,
ext_wmi_reg_rule);
@@ -5022,7 +5046,12 @@ static int ath12k_pull_reg_chan_list_ext
}
}
- ext_wmi_reg_rule += num_5g_reg_rules;
+ /* We have adjusted the number of 5 GHz reg rules above. But still those
+ * many rules needs to be adjusted in ext_wmi_reg_rule.
+ *
+ * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
+ */
+ ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules);
for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
reg_info->reg_rules_6g_ap_ptr[i] =
--- a/drivers/net/wireless/ath/ath12k/wmi.h
+++ b/drivers/net/wireless/ath/ath12k/wmi.h
@@ -3965,7 +3965,6 @@ struct ath12k_wmi_eht_rate_set_params {
#define MAX_REG_RULES 10
#define REG_ALPHA2_LEN 2
#define MAX_6G_REG_RULES 5
-#define REG_US_5G_NUM_REG_RULES 4
struct wmi_set_current_country_arg {
u8 alpha2[REG_ALPHA2_LEN];

View File

@ -124,7 +124,7 @@ Best regards,
--- a/drivers/net/wireless/ath/ath12k/mac.c
+++ b/drivers/net/wireless/ath/ath12k/mac.c
@@ -5185,9 +5185,7 @@ static void ath12k_mac_setup_ht_vht_cap(
@@ -5186,9 +5186,7 @@ static void ath12k_mac_setup_ht_vht_cap(
rate_cap_rx_chainmask);
}

View File

@ -284,7 +284,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
ath12k_control_beaconing(arvif, info);
if (arvif->is_up && vif->bss_conf.he_support &&
@@ -5351,11 +5483,14 @@ static void ath12k_mac_copy_he_cap(struc
@@ -5352,11 +5484,14 @@ static void ath12k_mac_copy_he_cap(struc
he_cap_elem->mac_cap_info[1] &=
IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_MASK;
@ -302,7 +302,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
he_cap_elem->phy_cap_info[5] |= num_tx_chains - 1;
switch (iftype) {
@@ -6317,71 +6452,6 @@ static int ath12k_mac_setup_vdev_create_
@@ -6318,71 +6453,6 @@ static int ath12k_mac_setup_vdev_create_
return 0;
}
@ -374,7 +374,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
static void ath12k_mac_update_vif_offload(struct ath12k_vif *arvif)
{
struct ieee80211_vif *vif = arvif->vif;
@@ -7339,7 +7409,6 @@ ath12k_mac_vdev_start_restart(struct ath
@@ -7340,7 +7410,6 @@ ath12k_mac_vdev_start_restart(struct ath
struct ath12k_base *ab = ar->ab;
struct wmi_vdev_start_req_arg arg = {};
const struct cfg80211_chan_def *chandef = &ctx->def;
@ -382,7 +382,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
int ret;
lockdep_assert_held(&ar->conf_mutex);
@@ -7395,14 +7464,6 @@ ath12k_mac_vdev_start_restart(struct ath
@@ -7396,14 +7465,6 @@ ath12k_mac_vdev_start_restart(struct ath
spin_unlock_bh(&ab->base_lock);
/* TODO: Notify if secondary 80Mhz also needs radar detection */

View File

@ -119,7 +119,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
--- a/drivers/net/wireless/ath/ath12k/mac.c
+++ b/drivers/net/wireless/ath/ath12k/mac.c
@@ -5518,12 +5518,24 @@ static __le16 ath12k_mac_setup_he_6ghz_c
@@ -5519,12 +5519,24 @@ static __le16 ath12k_mac_setup_he_6ghz_c
return cpu_to_le16(bcap->he_6ghz_capa);
}
@ -145,7 +145,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
he_cap->has_he = true;
memcpy(he_cap_elem->mac_cap_info, band_cap->he_cap_info,
@@ -5561,13 +5573,7 @@ static void ath12k_mac_copy_he_cap(struc
@@ -5562,13 +5574,7 @@ static void ath12k_mac_copy_he_cap(struc
break;
}

View File

@ -117,7 +117,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
--- a/drivers/net/wireless/ath/ath12k/mac.c
+++ b/drivers/net/wireless/ath/ath12k/mac.c
@@ -5518,20 +5518,40 @@ static __le16 ath12k_mac_setup_he_6ghz_c
@@ -5519,20 +5519,40 @@ static __le16 ath12k_mac_setup_he_6ghz_c
return cpu_to_le16(bcap->he_6ghz_capa);
}
@ -166,7 +166,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
int iftype, u8 num_tx_chains,
struct ieee80211_sta_he_cap *he_cap)
{
@@ -5573,7 +5593,7 @@ static void ath12k_mac_copy_he_cap(struc
@@ -5574,7 +5594,7 @@ static void ath12k_mac_copy_he_cap(struc
break;
}
@ -175,7 +175,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
if (he_cap_elem->phy_cap_info[6] &
IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT)
@@ -5762,7 +5782,7 @@ static int ath12k_mac_copy_sband_iftype_
@@ -5763,7 +5783,7 @@ static int ath12k_mac_copy_sband_iftype_
data[idx].types_mask = BIT(i);

View File

@ -604,7 +604,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
ath12k_peer_assoc_prepare(ar, arvif->vif, sta,
&peer_arg, true);
@@ -7058,10 +7317,13 @@ static int ath12k_mac_op_add_interface(s
@@ -7059,10 +7318,13 @@ static int ath12k_mac_op_add_interface(s
for (i = 0; i < ARRAY_SIZE(arvif->bitrate_mask.control); i++) {
arvif->bitrate_mask.control[i].legacy = 0xffffffff;
@ -618,7 +618,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
}
/* Allocate Default Queue now and reassign during actual vdev create */
@@ -8222,19 +8484,40 @@ ath12k_mac_has_single_legacy_rate(struct
@@ -8223,19 +8485,40 @@ ath12k_mac_has_single_legacy_rate(struct
if (ath12k_mac_bitrate_mask_num_vht_rates(ar, band, mask))
return false;
@ -659,7 +659,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
int i;
/* No need to consider legacy here. Basic rates are always present
@@ -8261,7 +8544,24 @@ ath12k_mac_bitrate_mask_get_single_nss(s
@@ -8262,7 +8545,24 @@ ath12k_mac_bitrate_mask_get_single_nss(s
return false;
}
@ -685,7 +685,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
return false;
if (ht_nss_mask == 0)
@@ -8308,54 +8608,158 @@ ath12k_mac_get_single_legacy_rate(struct
@@ -8309,54 +8609,158 @@ ath12k_mac_get_single_legacy_rate(struct
return 0;
}
@ -864,7 +864,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
return 0;
}
@@ -8384,6 +8788,31 @@ ath12k_mac_vht_mcs_range_present(struct
@@ -8385,6 +8789,31 @@ ath12k_mac_vht_mcs_range_present(struct
return true;
}
@ -896,7 +896,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
static void ath12k_mac_set_bitrate_mask_iter(void *data,
struct ieee80211_sta *sta)
{
@@ -8423,6 +8852,54 @@ static void ath12k_mac_disable_peer_fixe
@@ -8424,6 +8853,54 @@ static void ath12k_mac_disable_peer_fixe
}
static int
@ -951,7 +951,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
ath12k_mac_op_set_bitrate_mask(struct ieee80211_hw *hw,
struct ieee80211_vif *vif,
const struct cfg80211_bitrate_mask *mask)
@@ -8433,13 +8910,17 @@ ath12k_mac_op_set_bitrate_mask(struct ie
@@ -8434,13 +8911,17 @@ ath12k_mac_op_set_bitrate_mask(struct ie
enum nl80211_band band;
const u8 *ht_mcs_mask;
const u16 *vht_mcs_mask;
@ -970,7 +970,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
if (ath12k_mac_vif_chan(vif, &def))
return -EPERM;
@@ -8447,6 +8928,7 @@ ath12k_mac_op_set_bitrate_mask(struct ie
@@ -8448,6 +8929,7 @@ ath12k_mac_op_set_bitrate_mask(struct ie
band = def.chan->band;
ht_mcs_mask = mask->control[band].ht_mcs;
vht_mcs_mask = mask->control[band].vht_mcs;
@ -978,7 +978,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
ldpc = !!(ar->ht_cap_info & WMI_HT_CAP_LDPC);
sgi = mask->control[band].gi;
@@ -8455,6 +8937,9 @@ ath12k_mac_op_set_bitrate_mask(struct ie
@@ -8456,6 +8938,9 @@ ath12k_mac_op_set_bitrate_mask(struct ie
goto out;
}
@ -988,7 +988,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
/* mac80211 doesn't support sending a fixed HT/VHT MCS alone, rather it
* requires passing at least one of used basic rates along with them.
* Fixed rate setting across different preambles(legacy, HT, VHT) is
@@ -8474,15 +8959,27 @@ ath12k_mac_op_set_bitrate_mask(struct ie
@@ -8475,15 +8960,27 @@ ath12k_mac_op_set_bitrate_mask(struct ie
ieee80211_iterate_stations_mtx(hw,
ath12k_mac_disable_peer_fixed_rate,
arvif);
@ -1020,7 +1020,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
/* If multiple rates across different preambles are given
* we can reconfigure this info with all peers using PEER_ASSOC
@@ -8518,12 +9015,22 @@ ath12k_mac_op_set_bitrate_mask(struct ie
@@ -8519,12 +9016,22 @@ ath12k_mac_op_set_bitrate_mask(struct ie
goto out;
}
@ -1045,7 +1045,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
arvif->bitrate_mask = *mask;
ieee80211_iterate_stations_mtx(hw,
ath12k_mac_set_bitrate_mask_iter,
@@ -8534,9 +9041,10 @@ ath12k_mac_op_set_bitrate_mask(struct ie
@@ -8535,9 +9042,10 @@ ath12k_mac_op_set_bitrate_mask(struct ie
mutex_lock(&ar->conf_mutex);

View File

@ -200,7 +200,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
}
if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_80)
@@ -5805,8 +5779,6 @@ static void ath12k_mac_set_hemcsmap(stru
@@ -5806,8 +5780,6 @@ static void ath12k_mac_set_hemcsmap(stru
mcs_nss->tx_mcs_80 = cpu_to_le16(txmcs_map & 0xffff);
mcs_nss->rx_mcs_160 = cpu_to_le16(rxmcs_map & 0xffff);
mcs_nss->tx_mcs_160 = cpu_to_le16(txmcs_map & 0xffff);
@ -209,7 +209,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
}
static void ath12k_mac_copy_he_cap(struct ath12k *ar,
@@ -5828,6 +5800,7 @@ static void ath12k_mac_copy_he_cap(struc
@@ -5829,6 +5801,7 @@ static void ath12k_mac_copy_he_cap(struc
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
@ -217,7 +217,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
he_cap_elem->phy_cap_info[0] &=
~IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G;
he_cap_elem->phy_cap_info[5] &=
@@ -8494,10 +8467,6 @@ static __le16
@@ -8495,10 +8468,6 @@ static __le16
ath12k_mac_get_tx_mcs_map(const struct ieee80211_sta_he_cap *he_cap)
{
if (he_cap->he_cap_elem.phy_cap_info[0] &

View File

@ -263,7 +263,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
ath12k_peer_assoc_h_smps(sta, arg);
/* TODO: amsdu_disable req? */
@@ -5551,10 +5612,8 @@ ath12k_create_vht_cap(struct ath12k *ar,
@@ -5552,10 +5613,8 @@ ath12k_create_vht_cap(struct ath12k *ar,
ath12k_set_vht_txbf_cap(ar, &vht_cap.cap);
@ -276,7 +276,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
rxmcs_map = 0;
txmcs_map = 0;
@@ -9710,7 +9769,8 @@ static int ath12k_mac_setup_iface_combin
@@ -9711,7 +9770,8 @@ static int ath12k_mac_setup_iface_combin
combinations[0].radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
BIT(NL80211_CHAN_WIDTH_20) |
BIT(NL80211_CHAN_WIDTH_40) |
@ -286,7 +286,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
wiphy->iface_combinations = combinations;
wiphy->n_iface_combinations = 1;
@@ -9926,6 +9986,9 @@ static int ath12k_mac_hw_register(struct
@@ -9927,6 +9987,9 @@ static int ath12k_mac_hw_register(struct
ieee80211_hw_set(hw, SUPPORTS_TX_FRAG);
ieee80211_hw_set(hw, REPORTS_LOW_ACK);

View File

@ -133,7 +133,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
arg->peer_bw_rxnss_override = ATH12K_BW_NSS_MAP_ENABLE;
if (!rx_nss) {
@@ -5635,6 +5637,12 @@ ath12k_create_vht_cap(struct ath12k *ar,
@@ -5636,6 +5638,12 @@ ath12k_create_vht_cap(struct ath12k *ar,
vht_cap.vht_mcs.rx_mcs_map = cpu_to_le16(rxmcs_map);
vht_cap.vht_mcs.tx_mcs_map = cpu_to_le16(txmcs_map);
@ -146,7 +146,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
return vht_cap;
}
@@ -5815,11 +5823,12 @@ static void ath12k_mac_set_hemcsmap(stru
@@ -5816,11 +5824,12 @@ static void ath12k_mac_set_hemcsmap(stru
struct ieee80211_sta_he_cap *he_cap)
{
struct ieee80211_he_mcs_nss_supp *mcs_nss = &he_cap->he_mcs_nss_supp;
@ -162,7 +162,7 @@ Acked-by: Jeff Johnson <quic_jjohnson@quicinc.com>
for (i = 0; i < 8; i++) {
if (i < ar->num_tx_chains &&
(ar->cfg_tx_chainmask >> cap->tx_chain_mask_shift) & BIT(i))
@@ -5832,12 +5841,24 @@ static void ath12k_mac_set_hemcsmap(stru
@@ -5833,12 +5842,24 @@ static void ath12k_mac_set_hemcsmap(stru
rxmcs_map |= IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2);
else
rxmcs_map |= IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2);

View File

@ -43,8 +43,8 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+compat-$(CPTCFG_KERNEL_5_15) += backport-5.15.o backport-genetlink.o
+compat-$(CPTCFG_KERNEL_6_1) += backport-genetlink.o
compat-$(CPTCFG_KERNEL_6_4) += backport-6.4.o
compat-$(CPTCFG_KERNEL_6_11) += backport-6.11.o
compat-$(CPTCFG_BPAUTO_BUILD_CRYPTO_LIB_ARC4) += lib-crypto-arc4.o
--- a/compat/backport-genetlink.c
+++ b/compat/backport-genetlink.c
@@ -17,6 +17,7 @@

View File

@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=r8101
PKG_VERSION:=1.039.00
PKG_RELEASE:=2
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8101/releases/download/$(PKG_VERSION)
@ -20,7 +20,7 @@ define KernelPackage/r8101
TITLE:=Realtek RTL8101 PCI Fast Ethernet driver
DEPENDS:=@PCI_SUPPORT +kmod-libphy
FILES:=$(PKG_BUILD_DIR)/src/r8101.ko
AUTOLOAD:=$(call AutoProbe,r8101)
AUTOLOAD:=$(call AutoProbe,r8101,1)
PROVIDES:=kmod-r8169
endef

View File

@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=r8125
PKG_VERSION:=9.015.00
PKG_RELEASE:=1
PKG_RELEASE:=4
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8125/releases/download/$(PKG_VERSION)
@ -20,7 +20,7 @@ define KernelPackage/r8125
TITLE:=Realtek RTL8125 PCI 2.5 Gigabit Ethernet driver
DEPENDS:=@PCI_SUPPORT +kmod-libphy
FILES:=$(PKG_BUILD_DIR)/src/r8125.ko
AUTOLOAD:=$(call AutoProbe,r8125)
AUTOLOAD:=$(call AutoProbe,r8125,1)
PROVIDES:=kmod-r8169 kmod-r8125-rss
endef
@ -28,6 +28,7 @@ define Build/Compile
+$(KERNEL_MAKE) $(PKG_JOBS) \
M="$(PKG_BUILD_DIR)/src" \
CONFIG_ASPM=n \
ENABLE_MULTIPLE_TX_QUEUE=y \
ENABLE_RSS_SUPPORT=y \
modules
endef

View File

@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=r8126
PKG_VERSION:=10.015.00
PKG_RELEASE:=1
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8126/releases/download/$(PKG_VERSION)
@ -20,7 +20,7 @@ define KernelPackage/r8126
TITLE:=Realtek RTL8126 PCI 5 Gigabit Ethernet driver
DEPENDS:=@PCI_SUPPORT +kmod-libphy
FILES:=$(PKG_BUILD_DIR)/src/r8126.ko
AUTOLOAD:=$(call AutoProbe,r8126)
AUTOLOAD:=$(call AutoProbe,r8126,1)
PROVIDES:=kmod-r8169 kmod-r8126-rss
endef
@ -28,6 +28,7 @@ define Build/Compile
+$(KERNEL_MAKE) $(PKG_JOBS) \
M="$(PKG_BUILD_DIR)/src" \
CONFIG_ASPM=n \
ENABLE_MULTIPLE_TX_QUEUE=y \
ENABLE_RSS_SUPPORT=y \
modules
endef

View File

@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=r8127
PKG_VERSION:=11.014.00
PKG_RELEASE:=1
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8127/releases/download/$(PKG_VERSION)
@ -20,13 +20,14 @@ define KernelPackage/r8127
TITLE:=Realtek RTL8127 PCI 10 Gigabit Ethernet driver
DEPENDS:=@PCI_SUPPORT +kmod-libphy
FILES:=$(PKG_BUILD_DIR)/src/r8127.ko
AUTOLOAD:=$(call AutoProbe,r8127)
AUTOLOAD:=$(call AutoProbe,r8127,1)
PROVIDES:=kmod-r8169 kmod-r8127-rss
endef
define Build/Compile
+$(KERNEL_MAKE) $(PKG_JOBS) \
M="$(PKG_BUILD_DIR)/src" \
ENABLE_MULTIPLE_TX_QUEUE=y \
ENABLE_RSS_SUPPORT=y \
modules
endef

View File

@ -27,7 +27,7 @@ define KernelPackage/usb-net-rtl8152-vendor
DEPENDS:=+kmod-usb-core
CONFLICTS:=kmod-usb-net-rtl8152
FILES:=$(PKG_BUILD_DIR)/r8152.ko
AUTOLOAD:=$(call AutoProbe,r8152)
AUTOLOAD:=$(call AutoProbe,r8152,1)
endef
define KernelPackage/usb-net-rtl8152-vendor/description

View File

@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=r8168
PKG_VERSION:=8.055.00
PKG_RELEASE:=1
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/openwrt/rtl8168/releases/download/$(PKG_VERSION)
@ -20,13 +20,14 @@ define KernelPackage/r8168
TITLE:=Realtek RTL8168 PCI Gigabit Ethernet driver
DEPENDS:=@PCI_SUPPORT +kmod-libphy
FILES:=$(PKG_BUILD_DIR)/src/r8168.ko
AUTOLOAD:=$(call AutoProbe,r8168)
PROVIDES:=kmod-r8169
AUTOLOAD:=$(call AutoProbe,r8168,1)
PROVIDES:=kmod-r8169 kmod-r8168-rss
endef
define Build/Compile
+$(KERNEL_MAKE) $(PKG_JOBS) \
M="$(PKG_BUILD_DIR)/src" \
ENABLE_MULTIPLE_TX_QUEUE=y \
ENABLE_RSS_SUPPORT=y \
modules
endef

View File

@ -51,7 +51,7 @@ proto_dhcp_setup() {
[ "$defaultreqopts" = 0 ] && defaultreqopts="-o" || defaultreqopts=
[ "$broadcast" = 1 ] && broadcast="-B" || broadcast=
[ "$norelease" = 1 ] && norelease="" || norelease="-R"
[ -n "$clientid" ] && clientid="-x 0x3d:${clientid//:/}" || clientid="-C"
[ -n "$clientid" ] && clientid="-x 0x3d:${clientid//:/}"
[ -n "$iface6rd" ] && proto_export "IFACE6RD=$iface6rd"
[ "$iface6rd" != 0 -a -f /lib/netifd/proto/6rd.sh ] && append dhcpopts "-O 212"
[ -n "$zone6rd" ] && proto_export "ZONE6RD=$zone6rd"

View File

@ -5,9 +5,9 @@ PKG_RELEASE:=2
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/uqmi.git
PKG_SOURCE_DATE:=2024-08-25
PKG_SOURCE_VERSION:=28b48a10dbcd1177095b73c6d8086d10114f49b8
PKG_MIRROR_HASH:=ca4c07775185b873da572d973b9bbce86198d41d921a8d32b990da34e5ffd65d
PKG_SOURCE_DATE:=2025-04-20
PKG_SOURCE_VERSION:=a933061911aa4c49e953af618c3fb02ce6014142
PKG_MIRROR_HASH:=656d58c02bd7769dc57fae31425cc1d4f5c952500fa5bf20cb4d6434d131e7df
PKG_MAINTAINER:=Matti Laakso <malaakso@elisanet.fi>
PKG_LICENSE:=GPL-2.0

View File

@ -0,0 +1,67 @@
From 55ab583de9a35ea79d63b8058a131ef260d407a9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Timo=20Ter=C3=A4s?= <timo.teras@iki.fi>
Date: Mon, 21 Apr 2025 12:22:04 +0300
Subject: [PATCH] io: fix undefined behaviour in apk_istream_get_delim
Arithmetics on null pointer are undefined, so leave is->ptr
pointing to is->buf always. Rewrite the function to be
a bit more readable.
ref #11064, #11105
---
src/io.c | 38 +++++++++++++++++++++-----------------
1 file changed, 21 insertions(+), 17 deletions(-)
--- a/src/io.c
+++ b/src/io.c
@@ -191,29 +191,33 @@ int apk_istream_get_max(struct apk_istre
int apk_istream_get_delim(struct apk_istream *is, apk_blob_t token, apk_blob_t *data)
{
- apk_blob_t ret = APK_BLOB_NULL, left = APK_BLOB_NULL;
- int r = 0;
+ int r;
+
+ if (is->err && is->ptr == is->end) {
+ *data = APK_BLOB_NULL;
+ return is->err < 0 ? is->err : -APKE_EOF;
+ }
do {
- if (apk_blob_split(APK_BLOB_PTR_LEN((char*)is->ptr, is->end - is->ptr), token, &ret, &left))
- break;
+ apk_blob_t left;
+ if (apk_blob_split(APK_BLOB_PTR_LEN((char*)is->ptr, is->end - is->ptr), token, data, &left)) {
+ is->ptr = (uint8_t*)left.ptr;
+ is->end = (uint8_t*)left.ptr + left.len;
+ return 0;
+ }
r = __apk_istream_fill(is);
} while (r == 0);
- /* Last segment before end-of-file. Return also zero length non-null
- * blob if eof comes immediately after the delimiter. */
- if (is->ptr && r > 0)
- ret = APK_BLOB_PTR_LEN((char*)is->ptr, is->end - is->ptr);
-
- if (!APK_BLOB_IS_NULL(ret)) {
- is->ptr = (uint8_t*)left.ptr;
- is->end = (uint8_t*)left.ptr + left.len;
- *data = ret;
- return 0;
+ if (r < 0) {
+ *data = APK_BLOB_NULL;
+ return apk_istream_error(is, r);
}
- if (r < 0) apk_istream_error(is, r);
- *data = APK_BLOB_NULL;
- return r < 0 ? r : -APKE_EOF;
+
+ /* EOF received. Return the last buffered data or an empty
+ * blob if EOF came directly after last separator. */
+ *data = APK_BLOB_PTR_LEN((char*)is->ptr, is->end - is->ptr);
+ is->ptr = is->end = is->buf;
+ return 0;
}
static void blob_get_meta(struct apk_istream *is, struct apk_file_meta *meta)

View File

@ -16,6 +16,7 @@ define Package/fitblk
SECTION:=base
CATEGORY:=Base system
TITLE:=fitblk firmware release tool
DEPENDS:=+fit-check-sign
endef
define Package/fitblk/description

View File

@ -61,3 +61,13 @@ fit_do_upgrade() {
;;
esac
}
fit_check_image() {
local magic="$(get_magic_long "$1")"
[ "$magic" != "d00dfeed" ] && {
echo "Invalid image type."
return 74
}
fit_check_sign -f "$1" >/dev/null || return 74
}

View File

@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/jsonpath.git
PKG_SOURCE_DATE:=2024-01-23
PKG_SOURCE_VERSION:=594cfa86469c005972ba750614f5b3f1af84d0f6
PKG_MIRROR_HASH:=2f455f04fbfcdb4c81cccd23475b47395f847db44aa4bd9a1007b9aa0ab7fd19
PKG_SOURCE_DATE:=2025-04-18
PKG_SOURCE_VERSION:=8a86fb78235b5d7925b762b7b0934517890cc034
PKG_MIRROR_HASH:=06b763387d00faae0e62af68626588ff2b8f12e0e6821950ae5422033df32757
CMAKE_INSTALL:=1
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>

View File

@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=util-linux
PKG_VERSION:=2.40.2
PKG_VERSION:=2.41
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@KERNEL/linux/utils/$(PKG_NAME)/v2.40
PKG_HASH:=d78b37a66f5922d70edf3bdfb01a6b33d34ed3c3cafd6628203b2a2b67c8e8b3
PKG_SOURCE_URL:=@KERNEL/linux/utils/$(PKG_NAME)/v2.41
PKG_HASH:=81ee93b3cfdfeb7d7c4090cedeba1d7bbce9141fd0b501b686b3fe475ddca4c6
PKG_CPE_ID:=cpe:/a:kernel:util-linux
PKG_LICENSE:=GPL-2.0-only
@ -581,6 +581,7 @@ MESON_ARGS += \
-Dlibuser=disabled \
-Duse-tty-group=false \
-Duse-tls=false \
-Dtranslate-docs=disabled \
-Dbuild-python=disabled \
-Dbuild-zramctl=disabled \
-Dbuild-fsck=disabled \
@ -594,7 +595,6 @@ MESON_ARGS += \
-Dbuild-fdformat=disabled \
-Dbuild-lslogins=disabled \
-Dbuild-wdctl=disabled \
-Dbuild-cal=disabled \
-Dbuild-switch_root=disabled \
-Dbuild-pivot_root=disabled \
-Dbuild-lsmem=disabled \

View File

@ -0,0 +1,38 @@
From cd5038306e6815592fafbd06d406f45af2df3fcc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= <thomas@t-8ch.de>
Date: Mon, 14 Apr 2025 23:32:36 +0200
Subject: [PATCH] meson: add feature for translated documentation
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Translating the documentation is slow.
Add a feature which can be used to disable this step.
Signed-off-by: Thomas Weißschuh <thomas@t-8ch.de>
---
meson_options.txt | 2 ++
po-man/meson.build | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -25,6 +25,8 @@ option('sysvinit', type : 'feature',
option('btrfs', type : 'feature')
option('widechar', type : 'feature',
description : 'compile with wide character support')
+option('translate-docs', type : 'feature',
+ description : 'translate documentation')
# enable building of various programs and features ("build-" prefix)
--- a/po-man/meson.build
+++ b/po-man/meson.build
@@ -1,6 +1,6 @@
po4a = find_program('po4a', required : false)
-if not (asciidoctor.found() and po4a.found())
+if not get_option('translate-docs').require(asciidoctor.found()).require(po4a.found()).allowed()
subdir_done()
endif

View File

@ -0,0 +1,38 @@
From 363e48da01956321fb9337c59d78865c97c711a2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= <thomas@t-8ch.de>
Date: Mon, 14 Apr 2025 23:19:06 +0200
Subject: [PATCH] meson: remove tinfo dependency from 'more'
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The more utility does not need libtinfo and it is not
specified in autotools either.
Signed-off-by: Thomas Weißschuh <thomas@t-8ch.de>
---
meson.build | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
--- a/meson.build
+++ b/meson.build
@@ -1387,8 +1387,7 @@ exe = executable(
more_sources,
link_with : [lib_common],
include_directories : includes,
- dependencies : [lib_tinfo,
- curses_libs,
+ dependencies : [curses_libs,
lib_magic],
install : opt,
build_by_default : opt)
@@ -1398,8 +1397,7 @@ exe2 = executable(
link_with : [lib_common],
include_directories : includes,
c_args : '-DTEST_PROGRAM',
- dependencies : [lib_tinfo,
- curses_libs,
+ dependencies : [curses_libs,
lib_magic],
build_by_default : opt and program_tests)
exes += exe

View File

@ -0,0 +1,33 @@
From 0033f97482a7979e0de71de0a16b583e8d74dbdc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= <thomas@t-8ch.de>
Date: Sat, 19 Apr 2025 22:02:11 +0200
Subject: [PATCH] include/mount-api-utils: include linux/unistd.h
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
If SYS_statmount/SYS_listmount is not provided by the libc,
util-linux will fall back to __NR_statmount/__NR_listmount from the
kernel UAPI headers.
However it is not guaranteed that these symbols are actually visible in
mount-api-utils.
Include linux/unistd.h which provides syscall numbers.
While this header is specific to Linux, the code is already using
linux/mount.h.
Signed-off-by: Thomas Weißschuh <thomas@t-8ch.de>
---
include/mount-api-utils.h | 1 +
1 file changed, 1 insertion(+)
--- a/include/mount-api-utils.h
+++ b/include/mount-api-utils.h
@@ -8,6 +8,7 @@
#ifdef HAVE_LINUX_MOUNT_H
#include <sys/mount.h>
#include <linux/mount.h>
+#include <linux/unistd.h>
#include <sys/syscall.h>
#include <inttypes.h>

View File

@ -15,16 +15,19 @@
#
usage() {
echo "Usage: `basename $0` output img0_name img0_file [[img1_name img1_file] ...]"
echo "Usage: `basename $0` output [[device].bootscript] img0_name img0_file [[img1_name img1_file] ...]"
exit 1
}
# We need at least 3 arguments
[ "$#" -lt 3 ] && usage
[ "$#" -lt 3 ] && usage || node_type="firmware"
# Target output file
OUTPUT="$1"; shift
# check for bootscript
[ "${1##*.}" = "bootscript" ] && has_script=true && node_type="script"
# Create a default, fully populated DTS file
echo "\
/dts-v1/;
@ -35,17 +38,30 @@ echo "\
images {" > ${OUTPUT}
while [ -n "$1" -a -n "$2" ]; do
[ -f "$2" ] || usage
while [ -n "$1" -a -n "$2" ] || [ $has_script ]; do
[ -f "$2" ] || [ $has_script ] && has_script= || usage
name="$1"; shift
file="$1"; shift
case "$node_type" in
script)
name="$node_type"
file="$1"; shift
desc="${file%.*} uboot ${file##*.}"
type="$node_type"
node_type="firmware"
;;
firmware)
name="$1"; shift
file="$1"; shift
desc="$name"
type="$node_type"
;;
esac
echo \
" ${name} {
description = \"${name}\";
description = \"${desc}\";
data = /incbin/(\"${file}\");
type = \"Firmware\";
type = \"${type}\";
arch = \"ARM\";
compression = \"none\";
hash@1 {

View File

@ -1452,7 +1452,7 @@ err_free_buf:
return ret;
}
static int ar934x_nfc_remove(struct platform_device *pdev)
static void ar934x_nfc_remove(struct platform_device *pdev)
{
struct ar934x_nfc *nfc;
@ -1462,8 +1462,6 @@ static int ar934x_nfc_remove(struct platform_device *pdev)
nand_cleanup(&nfc->nand_chip);
ar934x_nfc_free_buf(nfc);
}
return 0;
}
static const struct of_device_id ar934x_nfc_match[] = {
@ -1475,7 +1473,7 @@ MODULE_DEVICE_TABLE(of, ar934x_nfc_match);
static struct platform_driver ar934x_nfc_driver = {
.probe = ar934x_nfc_probe,
.remove = ar934x_nfc_remove,
.remove_new = ar934x_nfc_remove,
.driver = {
.name = AR934X_NFC_DRIVER_NAME,
.of_match_table = ar934x_nfc_match,

View File

@ -214,14 +214,12 @@ static int rb4xx_nand_probe(struct platform_device *pdev)
return 0;
}
static int rb4xx_nand_remove(struct platform_device *pdev)
static void rb4xx_nand_remove(struct platform_device *pdev)
{
struct rb4xx_nand *nand = platform_get_drvdata(pdev);
mtd_device_unregister(nand_to_mtd(&nand->chip));
nand_cleanup(&nand->chip);
return 0;
}
static const struct platform_device_id rb4xx_nand_id_table[] = {
@ -232,7 +230,7 @@ MODULE_DEVICE_TABLE(platform, rb4xx_nand_id_table);
static struct platform_driver rb4xx_nand_driver = {
.probe = rb4xx_nand_probe,
.remove = rb4xx_nand_remove,
.remove_new = rb4xx_nand_remove,
.id_table = rb4xx_nand_id_table,
.driver = {
.name = "rb4xx-nand",

View File

@ -335,13 +335,11 @@ static int rb91x_nand_probe(struct platform_device *pdev)
return 0;
}
static int rb91x_nand_remove(struct platform_device *pdev)
static void rb91x_nand_remove(struct platform_device *pdev)
{
struct rb91x_nand_drvdata *drvdata = platform_get_drvdata(pdev);
rb91x_nand_release(drvdata);
return 0;
}
static const struct of_device_id rb91x_nand_match[] = {
@ -353,7 +351,7 @@ MODULE_DEVICE_TABLE(of, rb91x_nand_match);
static struct platform_driver rb91x_nand_driver = {
.probe = rb91x_nand_probe,
.remove = rb91x_nand_remove,
.remove_new = rb91x_nand_remove,
.driver = {
.name = "rb91x-nand",
.of_match_table = rb91x_nand_match,

View File

@ -221,12 +221,11 @@ static int ag71xx_mdio_probe(struct platform_device *pdev)
return 0;
}
static int ag71xx_mdio_remove(struct platform_device *pdev)
static void ag71xx_mdio_remove(struct platform_device *pdev)
{
struct ag71xx_mdio *am = platform_get_drvdata(pdev);
mdiobus_unregister(am->mii_bus);
return 0;
}
static const struct of_device_id ag71xx_mdio_match[] = {
@ -239,7 +238,7 @@ static const struct of_device_id ag71xx_mdio_match[] = {
static struct platform_driver ag71xx_mdio_driver = {
.probe = ag71xx_mdio_probe,
.remove = ag71xx_mdio_remove,
.remove_new = ag71xx_mdio_remove,
.driver = {
.name = "ag71xx-legacy-mdio",
.of_match_table = ag71xx_mdio_match,

View File

@ -1731,20 +1731,20 @@ err_phy_disconnect:
return err;
}
static int ag71xx_remove(struct platform_device *pdev)
static void ag71xx_remove(struct platform_device *pdev)
{
struct net_device *dev = platform_get_drvdata(pdev);
struct ag71xx *ag;
if (!dev)
return 0;
return;
ag = netdev_priv(dev);
ag71xx_debugfs_exit(ag);
ag71xx_phy_disconnect(ag);
unregister_netdev(dev);
platform_set_drvdata(pdev, NULL);
return 0;
}
static const struct of_device_id ag71xx_match[] = {
@ -1763,7 +1763,7 @@ static const struct of_device_id ag71xx_match[] = {
static struct platform_driver ag71xx_driver = {
.probe = ag71xx_probe,
.remove = ag71xx_remove,
.remove_new = ag71xx_remove,
.driver = {
.name = AG71XX_DRV_NAME,
.of_match_table = ag71xx_match,

View File

@ -1675,7 +1675,7 @@ out_disable_clk:
return ret;
}
static int bcm6348_emac_remove(struct platform_device *pdev)
static void bcm6348_emac_remove(struct platform_device *pdev)
{
struct net_device *ndev = platform_get_drvdata(pdev);
struct bcm6348_emac *emac = netdev_priv(ndev);
@ -1688,8 +1688,6 @@ static int bcm6348_emac_remove(struct platform_device *pdev)
for (i = 0; i < emac->num_clocks; i++)
clk_disable_unprepare(emac->clock[i]);
return 0;
}
static const struct of_device_id bcm6348_emac_of_match[] = {
@ -1706,7 +1704,7 @@ static struct platform_driver bcm6348_emac_driver = {
.of_match_table = of_match_ptr(bcm6348_emac_of_match),
},
.probe = bcm6348_emac_probe,
.remove = bcm6348_emac_remove,
.remove_new = bcm6348_emac_remove,
};
int bcm6348_iudma_drivers_register(struct platform_device *pdev)

View File

@ -1100,7 +1100,7 @@ out_disable_clk:
return ret;
}
static int bcm6368_enetsw_remove(struct platform_device *pdev)
static void bcm6368_enetsw_remove(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct net_device *ndev = platform_get_drvdata(pdev);
@ -1118,8 +1118,6 @@ static int bcm6368_enetsw_remove(struct platform_device *pdev)
for (i = 0; i < priv->num_clocks; i++)
clk_disable_unprepare(priv->clock[i]);
return 0;
}
static const struct of_device_id bcm6368_enetsw_of_match[] = {
@ -1138,7 +1136,7 @@ static struct platform_driver bcm6368_enetsw_driver = {
.of_match_table = of_match_ptr(bcm6368_enetsw_of_match),
},
.probe = bcm6368_enetsw_probe,
.remove = bcm6368_enetsw_remove,
.remove_new = bcm6368_enetsw_remove,
};
module_platform_driver(bcm6368_enetsw_driver);

View File

@ -0,0 +1,28 @@
From 135c3c86a7cef4ba3d368da15b16c275b74582d3 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 3 Feb 2025 21:35:24 +0100
Subject: [PATCH] r8169: make Kconfig option for LED support user-visible
Make config option R8169_LEDS user-visible, so that users can remove
support if not needed.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/d29f0cdb-32bf-435f-b59d-dc96bca1e3ab@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/realtek/Kconfig
+++ b/drivers/net/ethernet/realtek/Kconfig
@@ -114,7 +114,8 @@ config R8169
will be called r8169. This is recommended.
config R8169_LEDS
- def_bool R8169 && LEDS_TRIGGER_NETDEV
+ bool "Support for controlling the NIC LEDs"
+ depends on R8169 && LEDS_TRIGGER_NETDEV
depends on !(R8169=y && LEDS_CLASS=m)
help
Optional support for controlling the NIC LED's with the netdev

View File

@ -0,0 +1,26 @@
From faac69a4ae5abb49e62c79c66b51bb905c9aa5ec Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Tue, 4 Feb 2025 07:58:17 +0100
Subject: [PATCH] r8169: don't scan PHY addresses > 0
The PHY address is a dummy, because r8169 PHY access registers
don't support a PHY address. Therefore scan address 0 only.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/830637dd-4016-4a68-92b3-618fcac6589d@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -5230,6 +5230,7 @@ static int r8169_mdio_register(struct rt
new_bus->priv = tp;
new_bus->parent = &pdev->dev;
new_bus->irq[0] = PHY_MAC_INTERRUPT;
+ new_bus->phy_mask = GENMASK(31, 1);
snprintf(new_bus->id, MII_BUS_ID_SIZE, "r8169-%x-%x",
pci_domain_nr(pdev->bus), pci_dev_id(pdev));

View File

@ -0,0 +1,25 @@
From d30460f42675fef5cd4b44ffbc49b545524555e3 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Wed, 12 Feb 2025 08:03:56 +0100
Subject: [PATCH] r8169: add support for Intel Killer E5000
This adds support for the Intel Killer E5000 which seems to be a
rebranded RTL8126. Copied from r8126 vendor driver.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/9db73e9b-e2e8-45de-97a5-041c5f71d774@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -169,6 +169,7 @@ static const struct pci_device_id rtl816
{ PCI_VDEVICE(REALTEK, 0x8125) },
{ PCI_VDEVICE(REALTEK, 0x8126) },
{ PCI_VDEVICE(REALTEK, 0x3000) },
+ { PCI_VDEVICE(REALTEK, 0x5000) },
{}
};

View File

@ -0,0 +1,67 @@
From 853e80369cfceb2331bf34f251ba11c6602cc67f Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Thu, 13 Feb 2025 20:15:42 +0100
Subject: [PATCH] r8169: add PHY c45 ops for MDIO_MMD_VENDOR2 registers
The integrated PHYs on chip versions from RTL8168g allow to address
MDIO_MMD_VEND2 registers. All c22 standard registers are mapped to
MDIO_MMD_VEND2 registers. So far the paging mechanism is used to
address PHY registers. Add support for c45 ops to address MDIO_MMD_VEND2
registers directly, w/o the paging.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/d6f97eaa-0f13-468f-89cb-75a41087bc4a@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 32 +++++++++++++++++++++++
1 file changed, 32 insertions(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -5208,6 +5208,33 @@ static int r8169_mdio_write_reg(struct m
return 0;
}
+static int r8169_mdio_read_reg_c45(struct mii_bus *mii_bus, int addr,
+ int devnum, int regnum)
+{
+ struct rtl8169_private *tp = mii_bus->priv;
+
+ if (addr > 0)
+ return -ENODEV;
+
+ if (devnum == MDIO_MMD_VEND2 && regnum > MDIO_STAT2)
+ return r8168_phy_ocp_read(tp, regnum);
+
+ return 0;
+}
+
+static int r8169_mdio_write_reg_c45(struct mii_bus *mii_bus, int addr,
+ int devnum, int regnum, u16 val)
+{
+ struct rtl8169_private *tp = mii_bus->priv;
+
+ if (addr > 0 || devnum != MDIO_MMD_VEND2 || regnum <= MDIO_STAT2)
+ return -ENODEV;
+
+ r8168_phy_ocp_write(tp, regnum, val);
+
+ return 0;
+}
+
static int r8169_mdio_register(struct rtl8169_private *tp)
{
struct pci_dev *pdev = tp->pci_dev;
@@ -5238,6 +5265,11 @@ static int r8169_mdio_register(struct rt
new_bus->read = r8169_mdio_read_reg;
new_bus->write = r8169_mdio_write_reg;
+ if (tp->mac_version >= RTL_GIGA_MAC_VER_40) {
+ new_bus->read_c45 = r8169_mdio_read_reg_c45;
+ new_bus->write_c45 = r8169_mdio_write_reg_c45;
+ }
+
ret = devm_mdiobus_register(&pdev->dev, new_bus);
if (ret)
return ret;

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@ -0,0 +1,40 @@
From 473367a5ffe1607a61be481e2feda684eb5faea9 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Fri, 7 Mar 2025 08:29:47 +0100
Subject: [PATCH] r8169: increase max jumbo packet size on RTL8125/RTL8126
Realtek confirmed that all RTL8125/RTL8126 chip versions support up to
16K jumbo packets. Reflect this in the driver.
Tested by Rui on RTL8125B with 12K jumbo packets.
Suggested-by: Rui Salvaterra <rsalvaterra@gmail.com>
Tested-by: Rui Salvaterra <rsalvaterra@gmail.com>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/396762ad-cc65-4e60-b01e-8847db89e98b@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -89,6 +89,7 @@
#define JUMBO_6K (6 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
#define JUMBO_7K (7 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
#define JUMBO_9K (9 * SZ_1K - VLAN_ETH_HLEN - ETH_FCS_LEN)
+#define JUMBO_16K (SZ_16K - VLAN_ETH_HLEN - ETH_FCS_LEN)
static const struct {
const char *name;
@@ -5368,6 +5369,9 @@ static int rtl_jumbo_max(struct rtl8169_
/* RTL8168c */
case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_24:
return JUMBO_6K;
+ /* RTL8125/8126 */
+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
+ return JUMBO_16K;
default:
return JUMBO_9K;
}

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@ -0,0 +1,27 @@
From 3d9b8ac5341269d31e59fd5d58d47266ac78bc32 Mon Sep 17 00:00:00 2001
From: ChunHao Lin <hau@realtek.com>
Date: Tue, 18 Mar 2025 16:37:20 +0800
Subject: [PATCH] r8169: enable RTL8168H/RTL8168EP/RTL8168FP ASPM support
This patch will enable RTL8168H/RTL8168EP/RTL8168FP ASPM support on
the platforms that have tested with ASPM enabled.
Signed-off-by: ChunHao Lin <hau@realtek.com>
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/20250318083721.4127-2-hau@realtek.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -5406,7 +5406,7 @@ done:
/* register is set if system vendor successfully tested ASPM 1.2 */
static bool rtl_aspm_is_safe(struct rtl8169_private *tp)
{
- if (tp->mac_version >= RTL_GIGA_MAC_VER_61 &&
+ if (tp->mac_version >= RTL_GIGA_MAC_VER_46 &&
r8168_mac_ocp_read(tp, 0xc0b2) & 0xf)
return true;

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@ -0,0 +1,60 @@
From b48688ea3c9ac8d5d910c6e91fb7f80d846581f0 Mon Sep 17 00:00:00 2001
From: ChunHao Lin <hau@realtek.com>
Date: Tue, 18 Mar 2025 16:37:21 +0800
Subject: [PATCH] r8169: disable RTL8126 ZRX-DC timeout
Disable it due to it dose not meet ZRX-DC specification. If it is enabled,
device will exit L1 substate every 100ms. Disable it for saving more power
in L1 substate.
Signed-off-by: ChunHao Lin <hau@realtek.com>
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://patch.msgid.link/20250318083721.4127-3-hau@realtek.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/realtek/r8169_main.c | 27 +++++++++++++++++++++++
1 file changed, 27 insertions(+)
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2856,6 +2856,32 @@ static u32 rtl_csi_read(struct rtl8169_p
RTL_R32(tp, CSIDR) : ~0;
}
+static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp)
+{
+ struct pci_dev *pdev = tp->pci_dev;
+ u32 csi;
+ int rc;
+ u8 val;
+
+#define RTL_GEN3_RELATED_OFF 0x0890
+#define RTL_GEN3_ZRXDC_NONCOMPL 0x1
+ if (pdev->cfg_size > RTL_GEN3_RELATED_OFF) {
+ rc = pci_read_config_byte(pdev, RTL_GEN3_RELATED_OFF, &val);
+ if (rc == PCIBIOS_SUCCESSFUL) {
+ val &= ~RTL_GEN3_ZRXDC_NONCOMPL;
+ rc = pci_write_config_byte(pdev, RTL_GEN3_RELATED_OFF,
+ val);
+ if (rc == PCIBIOS_SUCCESSFUL)
+ return;
+ }
+ }
+
+ netdev_notice_once(tp->dev,
+ "No native access to PCI extended config space, falling back to CSI\n");
+ csi = rtl_csi_read(tp, RTL_GEN3_RELATED_OFF);
+ rtl_csi_write(tp, RTL_GEN3_RELATED_OFF, csi & ~RTL_GEN3_ZRXDC_NONCOMPL);
+}
+
static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)
{
struct pci_dev *pdev = tp->pci_dev;
@@ -3828,6 +3854,7 @@ static void rtl_hw_start_8125d(struct rt
static void rtl_hw_start_8126a(struct rtl8169_private *tp)
{
+ rtl_disable_zrxdc_timeout(tp);
rtl_set_def_aspm_entry_latency(tp);
rtl_hw_start_8125_common(tp);
}

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@ -0,0 +1,35 @@
From 51773846fab24a353bed4ebb660997ced4bc32d7 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 3 Feb 2025 21:33:39 +0100
Subject: [PATCH] net: phy: realtek: make HWMON support a user-visible Kconfig
symbol
Make config symbol REALTEK_PHY_HWMON user-visible, so that users can
remove support if not needed.
Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/3466ee92-166a-4b0f-9ae7-42b9e046f333@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek/Kconfig | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
--- a/drivers/net/phy/realtek/Kconfig
+++ b/drivers/net/phy/realtek/Kconfig
@@ -4,8 +4,12 @@ config REALTEK_PHY
help
Currently supports RTL821x/RTL822x and fast ethernet PHYs
+if REALTEK_PHY
+
config REALTEK_PHY_HWMON
- def_bool REALTEK_PHY && HWMON
- depends on !(REALTEK_PHY=y && HWMON=m)
+ bool "HWMON support for Realtek PHYs"
+ depends on HWMON && !(REALTEK_PHY=y && HWMON=m)
help
Optional hwmon support for the temperature sensor
+
+endif # REALTEK_PHY

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@ -0,0 +1,54 @@
From 0bea93fdbaf8675b7e8124bdcaf51497dcc8bcfa Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 3 Feb 2025 21:41:36 +0100
Subject: [PATCH] net: phy: realtek: use string choices helpers
Use string choices helpers to simplify the code.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202501190707.qQS8PGHW-lkp@intel.com/
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/realtek/realtek_main.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -13,6 +13,7 @@
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/clk.h>
+#include <linux/string_choices.h>
#include "realtek.h"
@@ -422,11 +423,11 @@ static int rtl8211f_config_init(struct p
} else if (ret) {
dev_dbg(dev,
"%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n",
- val_txdly ? "Enabling" : "Disabling");
+ str_enable_disable(val_txdly));
} else {
dev_dbg(dev,
"2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n",
- val_txdly ? "enabled" : "disabled");
+ str_enabled_disabled(val_txdly));
}
ret = phy_modify_paged_changed(phydev, 0xd08, 0x15, RTL8211F_RX_DELAY,
@@ -437,11 +438,11 @@ static int rtl8211f_config_init(struct p
} else if (ret) {
dev_dbg(dev,
"%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n",
- val_rxdly ? "Enabling" : "Disabling");
+ str_enable_disable(val_rxdly));
} else {
dev_dbg(dev,
"2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n",
- val_rxdly ? "enabled" : "disabled");
+ str_enabled_disabled(val_rxdly));
}
if (priv->has_phycr2) {

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@ -0,0 +1,134 @@
From da681ed73fb980286fc29de707b35d76bb33e123 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Thu, 13 Feb 2025 20:18:17 +0100
Subject: [PATCH] net: phy: realtek: improve mmd register access for internal
PHY's
r8169 provides the MDIO bus for the internal PHY's. It has been extended
with c45 access functions for addressing MDIO_MMD_VEND2 registers.
So we can switch from paged access to directly addressing the
MDIO_MMD_VEND2 registers.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/a5f2333c-dda9-48ad-9801-77049766e632@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek/realtek_main.c | 79 +++++++++++---------------
1 file changed, 33 insertions(+), 46 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -735,29 +735,31 @@ static int rtlgen_read_status(struct phy
return 0;
}
+static int rtlgen_read_vend2(struct phy_device *phydev, int regnum)
+{
+ return __mdiobus_c45_read(phydev->mdio.bus, 0, MDIO_MMD_VEND2, regnum);
+}
+
+static int rtlgen_write_vend2(struct phy_device *phydev, int regnum, u16 val)
+{
+ return __mdiobus_c45_write(phydev->mdio.bus, 0, MDIO_MMD_VEND2, regnum,
+ val);
+}
+
static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
{
int ret;
- if (devnum == MDIO_MMD_VEND2) {
- rtl821x_write_page(phydev, regnum >> 4);
- ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
- rtl821x_write_page(phydev, 0xa5c);
- ret = __phy_read(phydev, 0x12);
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
- rtl821x_write_page(phydev, 0xa5d);
- ret = __phy_read(phydev, 0x10);
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) {
- rtl821x_write_page(phydev, 0xa5d);
- ret = __phy_read(phydev, 0x11);
- rtl821x_write_page(phydev, 0);
- } else {
+ if (devnum == MDIO_MMD_VEND2)
+ ret = rtlgen_read_vend2(phydev, regnum);
+ else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE)
+ ret = rtlgen_read_vend2(phydev, 0xa5c4);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
+ ret = rtlgen_read_vend2(phydev, 0xa5d0);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE)
+ ret = rtlgen_read_vend2(phydev, 0xa5d2);
+ else
ret = -EOPNOTSUPP;
- }
return ret;
}
@@ -767,17 +769,12 @@ static int rtlgen_write_mmd(struct phy_d
{
int ret;
- if (devnum == MDIO_MMD_VEND2) {
- rtl821x_write_page(phydev, regnum >> 4);
- ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
- rtl821x_write_page(phydev, 0xa5d);
- ret = __phy_write(phydev, 0x10, val);
- rtl821x_write_page(phydev, 0);
- } else {
+ if (devnum == MDIO_MMD_VEND2)
+ ret = rtlgen_write_vend2(phydev, regnum, val);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
+ ret = rtlgen_write_vend2(phydev, regnum, 0xa5d0);
+ else
ret = -EOPNOTSUPP;
- }
return ret;
}
@@ -789,19 +786,12 @@ static int rtl822x_read_mmd(struct phy_d
if (ret != -EOPNOTSUPP)
return ret;
- if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2) {
- rtl821x_write_page(phydev, 0xa6e);
- ret = __phy_read(phydev, 0x16);
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
- rtl821x_write_page(phydev, 0xa6d);
- ret = __phy_read(phydev, 0x12);
- rtl821x_write_page(phydev, 0);
- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2) {
- rtl821x_write_page(phydev, 0xa6d);
- ret = __phy_read(phydev, 0x10);
- rtl821x_write_page(phydev, 0);
- }
+ if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2)
+ ret = rtlgen_read_vend2(phydev, 0xa6ec);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
+ ret = rtlgen_read_vend2(phydev, 0xa6d4);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2)
+ ret = rtlgen_read_vend2(phydev, 0xa6d0);
return ret;
}
@@ -814,11 +804,8 @@ static int rtl822x_write_mmd(struct phy_
if (ret != -EOPNOTSUPP)
return ret;
- if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
- rtl821x_write_page(phydev, 0xa6d);
- ret = __phy_write(phydev, 0x12, val);
- rtl821x_write_page(phydev, 0);
- }
+ if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
+ ret = rtlgen_write_vend2(phydev, 0xa6d4, val);
return ret;
}

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@ -0,0 +1,52 @@
From 02d3b306ac2f0b174753d1c5b9e4e5fb8ec5057e Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Thu, 13 Feb 2025 20:19:14 +0100
Subject: [PATCH] net: phy: realtek: switch from paged to MMD ops in rtl822x
functions
The MDIO bus provided by r8169 for the internal PHY's now supports
c45 ops for the MDIO_MMD_VEND2 device. So we can switch to standard
MMD ops here.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/81416f95-0fac-4225-87b4-828e3738b8ed@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek/realtek_main.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -901,7 +901,7 @@ static int rtl822x_get_features(struct p
{
int val;
- val = phy_read_paged(phydev, 0xa61, 0x13);
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa616);
if (val < 0)
return val;
@@ -922,10 +922,9 @@ static int rtl822x_config_aneg(struct ph
if (phydev->autoneg == AUTONEG_ENABLE) {
u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
- ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
- MDIO_AN_10GBT_CTRL_ADV2_5G |
- MDIO_AN_10GBT_CTRL_ADV5G,
- adv);
+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, 0xa5d4,
+ MDIO_AN_10GBT_CTRL_ADV2_5G |
+ MDIO_AN_10GBT_CTRL_ADV5G, adv);
if (ret < 0)
return ret;
}
@@ -969,7 +968,7 @@ static int rtl822x_read_status(struct ph
!phydev->autoneg_complete)
return 0;
- lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
+ lpadv = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa5d6);
if (lpadv < 0)
return lpadv;

View File

@ -0,0 +1,48 @@
From 8af2136e77989a64fae0284bf76fd584e32edd3a Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Fri, 14 Feb 2025 21:31:14 +0100
Subject: [PATCH] net: phy: realtek: add helper RTL822X_VND2_C22_REG
C22 register space is mapped to 0xa400 in MMD VEND2 register space.
Add a helper to access mapped C22 registers.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/6344277b-c5c7-449b-ac89-d5425306ca76@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek/realtek_main.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -79,9 +79,7 @@
/* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
* is set, they cannot be accessed by C45-over-C22.
*/
-#define RTL822X_VND2_GBCR 0xa412
-
-#define RTL822X_VND2_GANLPAR 0xa414
+#define RTL822X_VND2_C22_REG(reg) (0xa400 + 2 * (reg))
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -1015,7 +1013,8 @@ static int rtl822x_c45_config_aneg(struc
val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
/* Vendor register as C45 has no standardized support for 1000BaseT */
- ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,
+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2,
+ RTL822X_VND2_C22_REG(MII_CTRL1000),
ADVERTISE_1000FULL, val);
if (ret < 0)
return ret;
@@ -1032,7 +1031,7 @@ static int rtl822x_c45_read_status(struc
/* Vendor register as C45 has no standardized support for 1000BaseT */
if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
- RTL822X_VND2_GANLPAR);
+ RTL822X_VND2_C22_REG(MII_STAT1000));
if (val < 0)
return val;
} else {

View File

@ -0,0 +1,113 @@
From fabcfd6d10999024a721ae1b965b57eb8a305ace Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Sat, 15 Feb 2025 14:29:15 +0100
Subject: [PATCH] net: phy: realtek: add defines for shadowed c45 standard
registers
Realtek shadows standard c45 registers in VEND2 device register space.
Add defines for these VEND2 registers, based on the names of the
standard c45 registers.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/c90bdf76-f8b8-4d06-9656-7a52d5658ee6@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek/realtek_main.c | 33 +++++++++++++++++---------
1 file changed, 22 insertions(+), 11 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -94,6 +94,16 @@
#define RTL_VND2_PHYSR_MASTER BIT(11)
#define RTL_VND2_PHYSR_SPEED_MASK (RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
+#define RTL_MDIO_PCS_EEE_ABLE 0xa5c4
+#define RTL_MDIO_AN_EEE_ADV 0xa5d0
+#define RTL_MDIO_AN_EEE_LPABLE 0xa5d2
+#define RTL_MDIO_AN_10GBT_CTRL 0xa5d4
+#define RTL_MDIO_AN_10GBT_STAT 0xa5d6
+#define RTL_MDIO_PMA_SPEED 0xa616
+#define RTL_MDIO_AN_EEE_LPABLE2 0xa6d0
+#define RTL_MDIO_AN_EEE_ADV2 0xa6d4
+#define RTL_MDIO_PCS_EEE_ABLE2 0xa6ec
+
#define RTL_GENERIC_PHYID 0x001cc800
#define RTL_8211FVD_PHYID 0x001cc878
#define RTL_8221B 0x001cc840
@@ -751,11 +761,11 @@ static int rtlgen_read_mmd(struct phy_de
if (devnum == MDIO_MMD_VEND2)
ret = rtlgen_read_vend2(phydev, regnum);
else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE)
- ret = rtlgen_read_vend2(phydev, 0xa5c4);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_PCS_EEE_ABLE);
else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
- ret = rtlgen_read_vend2(phydev, 0xa5d0);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_ADV);
else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE)
- ret = rtlgen_read_vend2(phydev, 0xa5d2);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_LPABLE);
else
ret = -EOPNOTSUPP;
@@ -770,7 +780,7 @@ static int rtlgen_write_mmd(struct phy_d
if (devnum == MDIO_MMD_VEND2)
ret = rtlgen_write_vend2(phydev, regnum, val);
else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
- ret = rtlgen_write_vend2(phydev, regnum, 0xa5d0);
+ ret = rtlgen_write_vend2(phydev, regnum, RTL_MDIO_AN_EEE_ADV);
else
ret = -EOPNOTSUPP;
@@ -785,11 +795,11 @@ static int rtl822x_read_mmd(struct phy_d
return ret;
if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2)
- ret = rtlgen_read_vend2(phydev, 0xa6ec);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_PCS_EEE_ABLE2);
else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
- ret = rtlgen_read_vend2(phydev, 0xa6d4);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_ADV2);
else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2)
- ret = rtlgen_read_vend2(phydev, 0xa6d0);
+ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_LPABLE2);
return ret;
}
@@ -803,7 +813,7 @@ static int rtl822x_write_mmd(struct phy_
return ret;
if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
- ret = rtlgen_write_vend2(phydev, 0xa6d4, val);
+ ret = rtlgen_write_vend2(phydev, RTL_MDIO_AN_EEE_ADV2, val);
return ret;
}
@@ -899,7 +909,7 @@ static int rtl822x_get_features(struct p
{
int val;
- val = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa616);
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_MDIO_PMA_SPEED);
if (val < 0)
return val;
@@ -920,7 +930,8 @@ static int rtl822x_config_aneg(struct ph
if (phydev->autoneg == AUTONEG_ENABLE) {
u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
- ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, 0xa5d4,
+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2,
+ RTL_MDIO_AN_10GBT_CTRL,
MDIO_AN_10GBT_CTRL_ADV2_5G |
MDIO_AN_10GBT_CTRL_ADV5G, adv);
if (ret < 0)
@@ -966,7 +977,7 @@ static int rtl822x_read_status(struct ph
!phydev->autoneg_complete)
return 0;
- lpadv = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa5d6);
+ lpadv = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_MDIO_AN_10GBT_STAT);
if (lpadv < 0)
return lpadv;

View File

@ -0,0 +1,54 @@
From bfc17c1658353f22843c7c13e27c2d31950f1887 Mon Sep 17 00:00:00 2001
From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
Date: Sun, 16 Mar 2025 12:39:54 +0000
Subject: [PATCH] net: phy: realtek: disable PHY-mode EEE
Realtek RTL8211F has a "PHY-mode" EEE support which interferes with an
IEEE 802.3 compliant implementation. This mode defaults to enabled, and
results in the MAC receive path not seeing the link transition to LPI
state.
Fix this by disabling PHY-mode EEE.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/E1ttnHW-00785s-Uq@rmk-PC.armlinux.org.uk
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/phy/realtek/realtek_main.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -33,6 +33,9 @@
#define RTL8211F_PHYCR1 0x18
#define RTL8211F_PHYCR2 0x19
+#define RTL8211F_CLKOUT_EN BIT(0)
+#define RTL8211F_PHYCR2_PHY_EEE_ENABLE BIT(5)
+
#define RTL8211F_INSR 0x1d
#define RTL8211F_LEDCR 0x10
@@ -55,8 +58,6 @@
#define RTL8211E_TX_DELAY BIT(12)
#define RTL8211E_RX_DELAY BIT(11)
-#define RTL8211F_CLKOUT_EN BIT(0)
-
#define RTL8201F_ISR 0x1e
#define RTL8201F_ISR_ANERR BIT(15)
#define RTL8201F_ISR_DUPLEX BIT(13)
@@ -453,6 +454,12 @@ static int rtl8211f_config_init(struct p
str_enabled_disabled(val_rxdly));
}
+ /* Disable PHY-mode EEE so LPI is passed to the MAC */
+ ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
+ RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
+ if (ret)
+ return ret;
+
if (priv->has_phycr2) {
ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
RTL8211F_CLKOUT_EN, priv->phycr2);

View File

@ -0,0 +1,46 @@
From f64f610ec6ab59dd0391b03842cea3a4cd8ee34f Mon Sep 17 00:00:00 2001
From: Lucas Stach <l.stach@pengutronix.de>
Date: Wed, 18 Dec 2024 19:44:33 +0100
Subject: [PATCH] pmdomain: core: add dummy release function to genpd device
The genpd device, which is really only used as a handle to lookup
OPP, but not even registered to the device core otherwise and thus
lifetime linked to the genpd struct it is contained in, is missing
a release function. After b8f7bbd1f4ec ("pmdomain: core: Add
missing put_device()") the device will be cleaned up going through
the driver core device_release() function, which will warn when no
release callback is present for the device. Add a dummy release
function to shut up the warning.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Fixes: b8f7bbd1f4ec ("pmdomain: core: Add missing put_device()")
Cc: stable@vger.kernel.org
Message-ID: <20241218184433.1930532-1-l.stach@pengutronix.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
---
drivers/base/power/domain.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -2040,6 +2040,11 @@ static void genpd_lock_init(struct gener
}
}
+static void genpd_provider_release(struct device *dev)
+{
+ /* nothing to be done here */
+}
+
/**
* pm_genpd_init - Initialize a generic I/O PM domain object.
* @genpd: PM domain object to initialize.
@@ -2106,6 +2111,7 @@ int pm_genpd_init(struct generic_pm_doma
return ret;
device_initialize(&genpd->dev);
+ genpd->dev.release = genpd_provider_release;
dev_set_name(&genpd->dev, "%s", genpd->name);
mutex_lock(&gpd_list_lock);

View File

@ -0,0 +1,26 @@
From 4498f0aa561092bc656bfabe7c4bdae41bc4a5b4 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd@nbd.name>
Date: Tue, 7 May 2024 11:24:50 +0200
Subject: [PATCH] net: add missing check for TCP fraglist GRO
It turns out that the existing checks do not guarantee that the skb can be
pulled up to the GRO offset. When using the usb r8152 network driver with
GRO fraglist, the BUG() in __skb_pull is often triggered.
Fix the crash by adding the missing check.
Fixes: 8d95dc474f85 ("net: add code for TCP fraglist GRO")
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
net/ipv4/tcp_offload.c | 1 +
1 file changed, 1 insertion(+)
--- a/net/ipv4/tcp_offload.c
+++ b/net/ipv4/tcp_offload.c
@@ -367,6 +367,7 @@ struct sk_buff *tcp_gro_receive(struct l
flush |= (__force int)(flags ^ tcp_flag_word(th2));
flush |= skb->ip_summed != p->ip_summed;
flush |= skb->csum_level != p->csum_level;
+ flush |= !pskb_may_pull(skb, skb_gro_offset(skb));
flush |= NAPI_GRO_CB(p)->count >= 64;
if (flush || skb_gro_receive_list(p, skb))

View File

@ -55,6 +55,12 @@
default-state = "keep";
};
fon {
function = "fon"
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
};
led_power_red: power_red {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_RED>;
@ -62,7 +68,8 @@
};
led_info_green: info_green {
label = "green:info";
function = "info"
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
};
@ -73,12 +80,14 @@
};
info_red {
label = "red:info";
function = "info"
color = <LED_COLOR_ID_RED
gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
};
dect {
label = "green:dect";
function = "dect"
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
};
};

View File

@ -283,17 +283,15 @@ static int rtk_gsw_probe(struct platform_device *pdev)
}
static int rtk_gsw_remove(struct platform_device *pdev)
static void rtk_gsw_remove(struct platform_device *pdev)
{
platform_set_drvdata(pdev, NULL);
gsw_debug_proc_exit();
return 0;
}
static struct platform_driver gsw_driver = {
.probe = rtk_gsw_probe,
.remove = rtk_gsw_remove,
.remove_new = rtk_gsw_remove,
.driver = {
.name = "rtk-gsw",
.of_match_table = rtk_gsw_match,

View File

@ -1,5 +1,5 @@
REQUIRE_IMAGE_METADATA=1
RAMFS_COPY_BIN='fitblk'
RAMFS_COPY_BIN='fitblk fit_check_sign'
asus_initial_setup()
{
@ -198,23 +198,47 @@ PART_NAME=firmware
platform_check_image() {
local board=$(board_name)
local magic="$(get_magic_long "$1")"
[ "$#" -gt 1 ] && return 1
case "$board" in
abt,asr3000|\
asus,zenwifi-bt8-ubootmod|\
bananapi,bpi-r3|\
bananapi,bpi-r3-mini|\
bananapi,bpi-r4|\
bananapi,bpi-r4-poe|\
cetron,ct3003-ubootmod|\
cmcc,a10-ubootmod|\
cmcc,rax3000m|\
cmcc,rax3000me)
[ "$magic" != "d00dfeed" ] && {
echo "Invalid image type."
return 1
}
return 0
cmcc,rax3000me|\
cudy,tr3000-v1-ubootmod|\
gatonetworks,gdsp|\
h3c,magic-nx30-pro|\
imou,lc-hx3001|\
jcg,q30-pro|\
jdcloud,re-cp-03|\
konka,komi-a31|\
livinet,zr-3020-ubootmod|\
mediatek,mt7981-rfb|\
mediatek,mt7988a-rfb|\
mercusys,mr90x-v1-ubi|\
nokia,ea0326gmp|\
openwrt,one|\
netcore,n60|\
netcore,n60-pro|\
qihoo,360t7|\
routerich,ax3000-ubootmod|\
tplink,tl-xdr4288|\
tplink,tl-xdr6086|\
tplink,tl-xdr6088|\
tplink,tl-xtr8488|\
xiaomi,mi-router-ax3000t-ubootmod|\
xiaomi,redmi-router-ax6000-ubootmod|\
xiaomi,mi-router-wr30u-ubootmod|\
zyxel,ex5601-t0-ubootmod)
fit_check_image "$1"
return $?
;;
nradio,c8-668gl)
# tar magic `ustar`

View File

@ -1,5 +1,5 @@
REQUIRE_IMAGE_METADATA=1
RAMFS_COPY_BIN='fitblk'
RAMFS_COPY_BIN='fitblk fit_check_sign'
platform_do_upgrade() {
local board=$(board_name)
@ -70,11 +70,8 @@ platform_check_image() {
return $?
;;
*)
[ "$magic" != "d00dfeed" ] && {
echo "Invalid image type."
return 1
}
return 0
fit_check_image "$1"
return $?
;;
esac

View File

@ -1,5 +1,5 @@
REQUIRE_IMAGE_METADATA=1
RAMFS_COPY_BIN='fitblk'
RAMFS_COPY_BIN='fitblk fit_check_sign'
# Legacy full system upgrade including preloader for MediaTek SoCs on eMMC or SD
legacy_mtk_mmc_full_upgrade() {
@ -123,10 +123,8 @@ platform_check_image() {
case "$(board_name)" in
bananapi,bpi-r2|\
unielec,u7623-02)
[ "$magic" != "d00dfeed" ] && {
echo "Invalid image type."
return 1
}
fit_check_image "$1"
return $?
;;
unielec,u7623-02-emmc-512m)
# Can always upgrade to the new-style full image

View File

@ -31,7 +31,7 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -835,6 +841,45 @@ static int rtl822x_probe(struct phy_devi
@@ -838,6 +844,45 @@ static int rtl822x_probe(struct phy_devi
return 0;
}
@ -77,7 +77,7 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
static int rtl822xb_config_init(struct phy_device *phydev)
{
bool has_2500, has_sgmii;
@@ -925,7 +970,7 @@ static int rtl822xb_config_init(struct p
@@ -928,7 +973,7 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;

View File

@ -0,0 +1,436 @@
/dts-v1/;
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "GL.iNet GL-B3000";
compatible ="glinet,gl-b3000", "qcom,ipq5018";
aliases {
ethernet1 = &dp2;
label-mac-device = &dp2;
led-boot = &led_system_blue;
led-failsafe = &led_status_white;
led-running = &led_status_white;
led-upgrade = &led_system_blue;
serial0 = &blsp1_uart1;
};
chosen {
bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1 coherent_pool=2M";
stdout-path = "serial0:115200n8";
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button_reset {
label = "reset";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_system_blue: led_system_blue {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
gpio = <&tlmm 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led_status_white: led_status_white {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_POWER;
gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
reserved-memory {
q6_mem_regions: q6_mem_regions@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x3000000>;
};
};
};
&switch {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
// MAC0 -> GE Phy -> QCA8337 Phy2
port@0 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
// MAC1 ---SGMII---> QCA8337 SerDes
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
};
// MAC1 ---SGMII---> QCA8337 SerDes
&dp2 {
status = "okay";
nvmem-cells = <&macaddr_dp2>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&mdio0 {
status = "okay";
};
&mdio1 {
status = "okay";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
// QCA8337 Phy0 -> WAN
qca8337_0: ethernet-phy@0 {
reg = <0>;
};
// QCA8337 Phy1 -> LAN1
qca8337_1: ethernet-phy@1 {
reg = <1>;
};
// QCA8337 Phy3 -> LAN2
qca8337_2: ethernet-phy@2 {
reg = <2>;
};
// QCA8337 switch
switch0: ethernet-switch@17 {
compatible = "qca,qca8337";
reg = <17>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
switch0cpu: port@0 {
reg = <0>;
label = "cpu";
phy-mode = "sgmii";
ethernet = <&dp2>;
qca,sgmii-enable-pll;
fixed-link {
speed = <1000>;
full-duplex;
};
};
// QCA8337 Phy0 -> WAN
port@1 {
reg = <1>;
label = "wan";
phy-handle = <&qca8337_0>;
};
// QCA8337 Phy1 -> LAN1
port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&qca8337_1>;
nvmem-cells = <&macaddr_dp2 2>;
nvmem-cell-names = "mac-address";
};
// QCA8337 Phy3 -> LAN2
port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&qca8337_2>;
nvmem-cells = <&macaddr_dp2 2>;
nvmem-cell-names = "mac-address";
};
};
};
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo_board_clk {
clock-frequency = <24000000>;
};
&blsp1_uart1 {
status = "okay";
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
};
&crypto {
status = "okay";
};
&cryptobam {
status = "okay";
};
&prng {
status = "okay";
};
&qfprom {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
compatible = "spi-nand";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-engine = <&qpic_nand>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {
compatible = "qcom,smem-part";
partition-0-art {
compatible = "fixed-partitions";
label = "0:ART";
read-only;
#address-cells = <1>;
#size-cells = <1>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_dp2: macaddr@0 {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
reg = <0x0 0x6>;
};
};
};
};
};
};
&tlmm {
mdio1_pins: mdio-state {
mdc-pins {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio-pins {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds-pins {
pins = "gpio23", "gpio24";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
button_pins: button-pins {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
qpic_pins: qpic-state {
clock-pins {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
cs-pins {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
data-pins {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
serial_0_pins: uart0-state {
pins =
"gpio20", // RX
"gpio21"; // TX
function = "blsp0_uart0";
drive-strength = <8>;
bias-disable;
};
};
&tsens {
status = "okay ";
};
&q6v5_wcss {
status = "okay";
memory-region = <&q6_mem_regions>;
firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt",
"ath11k/IPQ5018/hw1.0/m3_fw.mdt",
"ath11k/QCN6122/hw1.0/m3_fw.mdt";
/* B3000 currently doesn't support passing bootargs */
/*boot-args = < */
/* type: 0x1 PCIE0 */
/* length: 4 */
/* PD id: 3 */
/* reset GPIO: 15 */
/* reserved: 0 0>; */
// IPQ5018
q6_wcss_pd1: pd-1 {
firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt";
resets =
<&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names =
"wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks =
<&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names =
"gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
// qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
interrupts-extended =
<&wcss_smp2p_in 8 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 9 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 12 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 11 IRQ_TYPE_NONE>;
interrupt-names =
"fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states =
<&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names =
"shutdown",
"stop",
"spawn";
};
// QCN6102 5G
q6_wcss_pd3: pd-3 {
firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt";
interrupts-extended =
<&wcss_smp2p_in 24 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 25 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 28 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 27 IRQ_TYPE_NONE>;
interrupt-names =
"fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states =
<&wcss_smp2p_out 24>,
<&wcss_smp2p_out 25>,
<&wcss_smp2p_out 26>;
qcom,smem-state-names =
"shutdown",
"stop",
"spawn";
};
};
&wifi0 {
// IPQ5018
status = "okay";
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,ath11k-calibration-variant = "GL-iNet-GL-B3000";
qcom,ath11k-fw-memory-mode = <2>;
qcom,bdf-addr = <0x4c400000>;
};
&wifi1 {
// QCN6102 5G
status = "okay";
qcom,rproc = <&q6_wcss_pd3>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,ath11k-calibration-variant = "GL-iNet-GL-B3000";
qcom,ath11k-fw-memory-mode = <2>;
qcom,bdf-addr = <0x4d100000>;
qcom,m3-dump-addr = <0x4df00000>;
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "ELECOM WRC-X3000GS2";
compatible = "elecom,wrc-x3000gs2", "qcom,ipq5018";
aliases {
serial0 = &blsp1_uart1;
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_green;
label-mac-device = <&dp1>;
};
chosen {
bootargs-append = " root=/dev/ubiblock0_1 coherent_pool=2M";
stdout-path = "serial0:115200n8";
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
switch-router {
label = "router";
gpios = <&tlmm 14 GPIO_ACTIVE_HIGH>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
};
reset-button {
label = "reset";
gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps-button {
label = "wps";
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led-0 {
gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WPS;
};
led_power_green: led-1 {
gpios = <&tlmm 13 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
};
led_power_red: led-2 {
gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
};
led-3 {
gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN_5GHZ;
linux,default-trigger = "phy1radio";
};
led-4 {
gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN_5GHZ;
};
led-5 {
gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN_2GHZ;
linux,default-trigger = "phy0radio";
};
led-6 {
gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN_2GHZ;
};
led-7 {
gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
};
};
reserved-memory {
q6_mem_regions: q6_mem_regions@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x3000000>;
status = "disabled";
};
};
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo_board_clk {
clock-frequency = <24000000>;
};
&blsp1_uart1 {
status = "okay";
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
};
&crypto {
status = "okay";
};
&cryptobam {
status = "okay";
};
&prng {
status = "okay";
};
&qfprom {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-engine = <&qpic_nand>;
/* strength=8 breaks NAND I/O, use 4 instead */
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {
compatible = "qcom,smem-part";
partition-0-appsblenv {
compatible = "fixed-partitions";
label = "0:appsblenv";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "env-data";
reg = <0x0 0x40000>;
nvmem-layout {
compatible = "u-boot,env";
macaddr_appsblenv_ethaddr: ethaddr {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
};
};
};
};
};
};
&switch {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
};
&dp1 {
status = "okay";
label = "wan";
nvmem-cells = <&macaddr_appsblenv_ethaddr 3>;
nvmem-cell-names = "mac-address";
};
&dp2 {
status = "okay";
nvmem-cells = <&macaddr_appsblenv_ethaddr 0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&mdio0 {
status = "okay";
};
&mdio1 {
status = "okay";
pinctrl-0 = <&mdio1_pins>, <&switch_reset_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
qca8337_0: ethernet-phy@0 {
reg = <0>;
};
qca8337_1: ethernet-phy@1 {
reg = <1>;
};
qca8337_2: ethernet-phy@2 {
reg = <2>;
};
qca8337_3: ethernet-phy@3 {
reg = <3>;
};
ethernet-switch@18 {
compatible = "qca,qca8337";
reg = <0x18>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&qca8337_0>;
};
port@2 {
reg = <2>;
label = "lan2";
phy-handle = <&qca8337_1>;
};
port@3 {
reg = <3>;
label = "lan3";
phy-handle = <&qca8337_2>;
};
port@4 {
reg = <4>;
label = "lan4";
phy-handle = <&qca8337_3>;
};
port@6 {
reg = <6>;
phy-mode = "sgmii";
ethernet = <&dp2>;
qca,sgmii-enable-pll;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
&tlmm {
button_pins: button-state {
button-pins {
pins = "gpio22", "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
switch-pins {
pins = "gpio14";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
led_pins: led-state {
pins = "gpio12", "gpio13", "gpio16", "gpio24",
"gpio25", "gpio26", "gpio28", "gpio46";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
mdio1_pins: mdio-state {
mdc-pins {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio-pins {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
qpic_pins: qpic-state {
clock-pins {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
cs-pins {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
data-pins {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
serial_0_pins: uart0-state {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
switch_reset_pins: switch-reset-state {
pins = "gpio39";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
&tsens {
status = "okay";
};
/*
* ath11k Wi-Fi consumes too large memory spaces and too few spaces are
* available for users. To prevent OOM when using LuCI or other softwares,
* disable Wi-Fi related peripherals at the moment.
*/
&q6v5_wcss {
status = "disabled";
memory-region = <&q6_mem_regions>;
firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt",
"ath11k/IPQ5018/hw1.0/m3_fw.mdt",
"ath11k/QCN6122/hw1.0/m3_fw.mdt";
boot-args = <0x2 4 2 18 0 0>; /* pcie:1, len:4, updid:2, reset:gpio18 */
q6_wcss_pd1: pd-1 {
firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt";
resets =
<&gcc GCC_WCSSAON_RESET>,
<&gcc GCC_WCSS_BCR>,
<&gcc GCC_CE_BCR>;
reset-names =
"wcss_aon_reset",
"wcss_reset",
"ce_reset";
clocks =
<&gcc GCC_WCSS_AHB_S_CLK>,
<&gcc GCC_WCSS_ACMT_CLK>,
<&gcc GCC_WCSS_AXI_M_CLK>;
clock-names =
"gcc_wcss_ahb_s_clk",
"gcc_wcss_acmt_clk",
"gcc_wcss_axi_m_clk";
interrupts-extended =
<&wcss_smp2p_in 8 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 9 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 12 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 11 IRQ_TYPE_NONE>;
interrupt-names =
"fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states =
<&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names =
"shutdown",
"stop",
"spawn";
};
q6_wcss_pd2: pd-2 {
firmware-name = "ath11k/IPQ5018/hw1.0/q6_fw.mdt";
interrupts-extended =
<&wcss_smp2p_in 16 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 17 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 20 IRQ_TYPE_NONE>,
<&wcss_smp2p_in 19 IRQ_TYPE_NONE>;
interrupt-names =
"fatal",
"ready",
"spawn-ack",
"stop-ack";
qcom,smem-states =
<&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names =
"shutdown",
"stop",
"spawn";
};
};
&wifi0 {
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,ath11k-calibration-variant = "ELECOM-WRC-X3000GS2";
qcom,ath11k-fw-memory-mode = <2>;
qcom,bdf-addr = <0x4c400000>;
ieee80211-freq-limit = <2400000 2483000>;
status = "disabled";
};
&wifi1 {
qcom,rproc = <&q6_wcss_pd2>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,ath11k-calibration-variant = "ELECOM-WRC-X3000GS2";
qcom,ath11k-fw-memory-mode = <2>;
qcom,bdf-addr = <0x4d100000>;
qcom,m3-dump-addr = <0x4df00000>;
ieee80211-freq-limit = <5150000 5730000>;
status = "disabled";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2022, Robert Marko <robimarko@gmail.com>
altered by Jonathan Brophy <professor_jonny@hotmail.com>
to suit the TP-Link Deco X80-5G target */
/dts-v1/;
#include "ipq8074.dtsi"
#include "ipq8074-hk-cpu.dtsi"
#include "ipq8074-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "TP-Link Deco X80-5G";
compatible = "tplink,deco-x80-5g", "qcom,ipq8074";
aliases {
serial0 = &blsp1_uart5;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-append = " root=/dev/ubiblock0_1";
};
modem {
compatible = "gpio-export";
pinctrl-names = "default";
pinctrl-0 = <&modem_pins>;
pinctrl-1 = <&antenna_pins>;
w_disable {
gpio-export,name = "w_disable";
gpio-export,output = <1>;
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; /* wwan disable output */
};
modem-reset {
gpio-export,name = "modem_reset";
gpio-export,output = <0>;
gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>; /* reset modem output */
};
ext_antenna_en {
gpio-export,name = "ext_antenna_en";
gpio-export,output = <0>;
gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>; /* select external sma antennas for wwan output */
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
reset_button {
label = "reset";
gpios = <&tlmm 27 GPIO_ACTIVE_LOW>; /*reset button output*/
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
/*note the LED's defined here are not individual they are a single combined RGB element used for status functions.
To mimic the OEM default behaviour green and red are switched on from boot to indicate yellow (power on).*/
led_system_green: green {
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
default-state = "on";
};
led_system_red: red {
gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
default-state = "on";
};
led_system_blue: blue {
gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
};
};
gpio_fan: gpio-fan {
compatible = "gpio-fan";
pinctrl-0 = <&fan_pins>;
pinctrl-names = "default";
gpios = <&tlmm 42 GPIO_ACTIVE_LOW>, /* fan gpio MSB */
<&tlmm 41 GPIO_ACTIVE_LOW>,
<&tlmm 40 GPIO_ACTIVE_LOW>; /* fan gpio LSB */
/* stock fan is a Sunnon EF40201BX-Q18C-F99
6800 rpm
gpio68 seemed to be the feedback rpm of the fan.
no support for fan speed in kernel saved for future use.*/
/*rpm-gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>; */
gpio-fan,speed-map = <0 0>, /* speed 0 binary drive bits 0,0,0 (idle state) */
<971 1>, /* speed 1 binary drive bits 0,0,1 ▼ */
<1942 2>, /* speed 3 binary drive bits 0,1,0 (active state) */
<2913 3>, /* speed 4 binary drive bits 0,1,1 ▼ */
<3884 4>, /* speed 5 binary drive bits 1,0,0 ▼ */
<4855 5>, /* speed 6 binary drive bits 1,0,1 (high state) */
<5826 6>, /* speed 7 binary drive bits 1,1,0 ▼ */
<6800 7>; /* speed 8 binary drive bits 1,1,1 ▼ */
#cooling-cells = <2>; /* min followed by max */
};
};
&cpu0_thermal {
trips {
cpu0_high: cpu-high {
temperature = <70000>;
hysteresis = <2000>;
type = "active";
};
cpu0_active: cpu-active {
temperature = <50000>;
hysteresis = <2000>;
type = "active";
};
cpu0_idle: cpu-idle {
temperature = <25000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
map2 {
trip = <&cpu0_high>;
cooling-device = <&gpio_fan 5 THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cpu0_active>;
cooling-device = <&gpio_fan 2 4>;
};
map4 {
trip = <&cpu0_idle>;
cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>;
};
};
};
&cpu1_thermal {
trips {
cpu1_high: cpu-high {
temperature = <70000>;
hysteresis = <2000>;
type = "active";
};
cpu1_active: cpu-active {
temperature = <50000>;
hysteresis = <2000>;
type = "active";
};
cpu1_idle: cpu-idle {
temperature = <25000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
map2 {
trip = <&cpu1_high>;
cooling-device = <&gpio_fan 5 THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cpu1_active>;
cooling-device = <&gpio_fan 2 4>;
};
map4 {
trip = <&cpu1_idle>;
cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>;
};
};
};
&cpu2_thermal {
trips {
cpu2_high: cpu-high {
temperature = <70000>;
hysteresis = <2000>;
type = "active";
};
cpu2_active: cpu-active {
temperature = <50000>;
hysteresis = <2000>;
type = "active";
};
cpu2_idle: cpu-idle {
temperature = <25000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
map2 {
trip = <&cpu2_high>;
cooling-device = <&gpio_fan 5 THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cpu2_active>;
cooling-device = <&gpio_fan 2 4>;
};
map4 {
trip = <&cpu2_idle>;
cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>;
};
};
};
&cpu3_thermal {
trips {
cpu3_high: cpu-high {
temperature = <70000>;
hysteresis = <2000>;
type = "active";
};
cpu3_active: cpu-active {
temperature = <50000>;
hysteresis = <2000>;
type = "active";
};
cpu3_idle: cpu-idle {
temperature = <25000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
map2 {
trip = <&cpu3_high>;
cooling-device = <&gpio_fan 5 THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cpu3_active>;
cooling-device = <&gpio_fan 2 4>;
};
map4 {
trip = <&cpu3_idle>;
cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>;
};
};
};
&cluster_thermal {
trips {
cluster_high: cluster-high {
temperature = <70000>;
hysteresis = <2000>;
type = "active";
};
cluster_active: cluster-active {
temperature = <50000>;
hysteresis = <2000>;
type = "active";
};
cluster_idle: cluster-idle {
temperature = <25000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
map2 {
trip = <&cluster_high>;
cooling-device = <&gpio_fan 5 THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cluster_active>;
cooling-device = <&gpio_fan 2 4>;
};
map4 {
trip = <&cluster_idle>;
cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>;
};
};
};
&tlmm {
button_pins: button-state {
pins = "gpio27";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
fan_pins: fan-state {
pins = "gpio40", "gpio41", "gpio42";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
antenna_pins: antenna-state {
pins = "gpio56";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
modem_pins: modem-state {
pins = "gpio29", "gpio55";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
led_pins: led-state {
pins = "gpio50", "gpio51", "gpio52";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
mdio_pins: mdio-pins {
mdc {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
};
&blsp1_uart5 {
status = "okay";
};
&cryptobam {
status = "okay";
};
&crypto {
status = "okay";
};
&prng {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
status = "okay";
nand@0 {
reg = <0>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {
compatible = "qcom,smem-part"; /* define SMEM partition table */
};
};
};
&qusb_phy_0 {
status = "okay";
};
&ssphy_0 {
status = "okay";
};
&usb_0 {
status = "okay";
};
&mdio {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
qca8033: ethernet-phy@4 {
compatible = "ethernet-phy-ieee802.3-c22"; /* lan phy */
reg = <4>;
};
qca8081: ethernet-phy@28 {
compatible = "ethernet-phy-id004d.d101"; /* wan phy */
reg = <28>;
reset-deassert-us = <10000>;
reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
};
};
&switch {
status = "okay";
switch_wan_bmp = <ESS_PORT5>; /* wan port bitmap */
switch_lan_bmp = <ESS_PORT6>; /* lan port bitmap */
switch_mac_mode1 = <MAC_MODE_SGMII_PLUS>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance2*/
qcom,port_phyinfo {
port@5 {
port_id = <5>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";
};
port@6 {
port_id = <6>;
phy_address = <4>;
};
};
};
&edma {
status = "okay";
};
&dp5 {
status = "okay";
phy-handle = <&qca8081>;
label = "wan";
};
&dp6_syn {
status = "okay";
phy-handle = <&qca8033>;
label = "lan";
};
&wifi {
status = "okay";
qcom,ath11k-calibration-variant = "tplink_deco-x80-5g";
};

View File

@ -0,0 +1,47 @@
if test "x$verbose" = "x"; then
failedmsg=\'[failed]\'
else
failedmsg='######################################## Failed'
fi
if test -n $soc_hw_version; then
if test "$soc_hw_version" = "20180100" || test "$soc_hw_version" = "20180101" ; then
echo 'soc_hw_version : Validation success'
else
echo 'soc_hw_version : did not match, aborting upgrade'
exit 1
fi
else
echo 'soc_hw_version : unknown, skipping validation'
fi
if test "$machid" = "8040004" ; then
echo 'machid : Validation success'
else
echo 'machid : unknown, aborting upgrade'
exit 1
fi
if test "x$verbose" = "x"; then
echo \\c'Flashing ubi: '
setenv stdout nulldev
else
echo '######################################## Flashing ubi: Started'
fi
failreason='error: failed on image extraction'
imxtract $imgaddr ubi || setenv stdout serial && echo "$failedmsg" && echo "$failreason" && exit 1
failreason='error: failed on partition erase'
nand device 0 && nand erase 0x00800000 0x07800000 || setenv stdout serial && echo "$failedmsg" && echo "$failreason" && exit 1
failreason='error: failed on partition write'
nand write $fileaddr 0x00800000 rootfs_size || setenv stdout serial && echo "$failedmsg" && echo "$failreason" && exit 1
if test "x$verbose" = "x"; then
setenv stdout serial
echo '[ done ]'
setenv stdout nulldev
setenv stdout serial
else
echo '######################################## Flashing ubi: Done'
fi
exit 0

View File

@ -1,3 +1,62 @@
DEVICE_VARS += BOOT_SCRIPT
define Build/mstc-header
$(eval version=$(1))
gzip -c $@ | tail -c8 > $@.crclen
( \
printf "CMOC"; \
tail -c+5 $@.crclen; head -c4 $@.crclen; \
printf '$(call toupper,$(LINUX_KARCH)) $(VERSION_DIST) Linux-$(LINUX_VERSION)' | \
dd bs=64 count=1 conv=sync 2>/dev/null; \
printf "$(version)" | \
dd bs=64 count=1 conv=sync 2>/dev/null; \
dd if=/dev/zero bs=884 count=1 2>/dev/null; \
cat $@; \
) > $@.new
mv $@.new $@
rm -f $@.crclen
endef
define Device/elecom_wrc-x3000gs2
$(call Device/FitImageLzma)
$(call Device/UbiFit)
DEVICE_VENDOR := ELECOM
DEVICE_MODEL := WRC-X3000GS2
DEVICE_DTS_CONFIG := config@mp03.3
SOC := ipq5018
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 52480k
NAND_SIZE := 128m
IMAGES += factory.bin
IMAGE/factory.bin := append-ubi | qsdk-ipq-factory-nand | \
mstc-header 4.04(XZF.0)b90 | elecom-product-header WRC-X3000GS2
DEVICE_PACKAGES := ath11k-firmware-qcn6122 ipq-wifi-elecom_wrc-x3000gs2
endef
TARGET_DEVICES += elecom_wrc-x3000gs2
define Device/glinet_gl-b3000
$(call Device/FitImage)
DEVICE_VENDOR := GL.iNet
DEVICE_MODEL := GL-B3000
SOC := ipq5018
KERNEL_LOADADDR := 0x41080000
KERNEL_IN_UBI := 1
BLOCKSIZE := 128k
PAGESIZE := 2048
NAND_SIZE := 128m
DEVICE_DTS_CONFIG := config@mp03.5-c1
SUPPORTED_DEVICES += b3000
BOOT_SCRIPT:= glinet_gl-b3000.bootscript
IMAGES := factory.img sysupgrade.bin
IMAGE/factory.img := append-ubi | gl-qsdk-factory | append-metadata
DEVICE_PACKAGES := \
ath11k-firmware-qcn6122 \
ipq-wifi-glinet_gl-b3000 \
dumpimage
endef
TARGET_DEVICES += glinet_gl-b3000
define Device/linksys_ipq50xx_mx_base
$(call Device/FitImageLzma)
DEVICE_VENDOR := Linksys

View File

@ -403,6 +403,21 @@ define Device/spectrum_sax1v1k
endef
TARGET_DEVICES += spectrum_sax1v1k
define Device/tplink_deco-x80-5g
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := TP-Link
DEVICE_MODEL := Deco X80-5G
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_DTS_CONFIG := config@hk01.c5
SOC := ipq8074
DEVICE_PACKAGES := kmod-hwmon-gpiofan ipq-wifi-tplink_deco-x80-5g \
kmod-usb-serial-option kmod-usb-net-qmi-wwan
endef
TARGET_DEVICES += tplink_deco-x80-5g
define Device/tplink_eap620hd-v1
$(call Device/FitImage)
$(call Device/UbiFit)

View File

@ -9,6 +9,9 @@ board_config_update
board=$(board_name)
case "$board" in
elecom,wrc-x3000gs2)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "wan" "tx rx link_10 link_100 link_1000"
;;
linksys,mr5500)
ucidef_set_led_netdev "lan1-port-link" "LAN1-PORT-LINK" "qca8k-0.0:00:green:lan" "lan1" "link_10 link_100 link_1000"
ucidef_set_led_netdev "lan1-port-activity" "LAN1-PORT-ACTIVITY" "qca8k-0.0:00:amber:lan" "lan1" "tx rx"

View File

@ -7,9 +7,13 @@ ipq50xx_setup_interfaces()
{
local board="$1"
case $board in
elecom,wrc-x3000gs2|\
linksys,mr5500)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
;;
glinet,gl-b3000)
ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
;;
linksys,mx2000|\
linksys,mx5500|\
linksys,spnmx56)

View File

@ -9,6 +9,17 @@ board=$(board_name)
case "$FIRMWARE" in
"ath11k/IPQ5018/hw1.0/cal-ahb-c000000.wifi.bin")
case "$board" in
elecom,wrc-x3000gs2)
caldata_extract "0:art" 0x1000 0x20000
wlan_mac=$(mtd_get_mac_ascii 0:appsblenv wifi0)
ath11k_patch_mac $wlan_mac 0
ath11k_set_macflag
;;
glinet,gl-b3000)
caldata_extract "0:art" 0x1000 0x20000
ath11k_patch_mac $(macaddr_add $(get_mac_label_dt) 3) 0
ath11k_set_macflag
;;
linksys,mr5500|\
linksys,mx2000|\
linksys,mx5500|\
@ -23,6 +34,17 @@ case "$FIRMWARE" in
;;
"ath11k/QCN6122/hw1.0/cal-ahb-b00a040.wifi1.bin")
case "$board" in
elecom,wrc-x3000gs2)
caldata_extract "0:art" 0x26800 0x20000
wlan_mac=$(mtd_get_mac_ascii 0:appsblenv wifi1)
ath11k_patch_mac $wlan_mac 0
ath11k_set_macflag
;;
glinet,gl-b3000)
caldata_extract "0:art" 0x26800 0x20000
ath11k_patch_mac $(macaddr_add $(get_mac_label_dt) 4) 0
ath11k_set_macflag
;;
linksys,mx2000)
caldata_extract "0:ART" 0x26800 0x20000
label_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)

View File

@ -0,0 +1,119 @@
. /lib/functions.sh
bootconfig_find_entry() {
local cfgbin="$1"
local partname="$2"
local i part parts offset
parts=$(hexdump -n 4 -s 8 -e '1/4 "%d"' "$cfgbin")
# partition count: <= 10
[ -z "$parts" ] || [ "$parts" = "0" ] || [ "$parts" -gt "10" ] && \
return 1
for i in $(seq 1 $parts); do
offset=$((0xc + 0x14 * (i - 1)))
part=$(dd if="$cfgbin" iflag=skip_bytes \
skip=$offset bs=16 count=1 2>/dev/null)
if [ "$part" = "$partname" ]; then
printf "0x%08x" $offset
return
fi
done
return 1
}
# Read or update an entry in Qualcomm bootconfig partition
#
# parameters:
# $1: partition name of bootconfig (ex.: "0:bootconfig", "0:bootconfig1", etc)
# $2: entry name in bootconfig (ex.: "0:hlos", "rootfs", etc)
# $3: index to set for the entry (0/1)
#
# operations:
# read : bootconfig_rw_index <bootconfig> <entry>
# write: bootconfig_rw_index <bootconfig> <entry> <index>
bootconfig_rw_index() {
local bootcfg="$1"
local partname="$2"
local index="$3"
local mtddev
local offset
local current
if [ -z "$bootcfg" ] || [ -z "$partname" ]; then
echo "no value specified for bootconfig or partition entry"
return 1
fi
case "$index" in
0|1|"") ;;
*) echo "invalid bootconfig index specified \"$index\""; return 1 ;;
esac
mtddev="$(find_mtd_part $bootcfg)"
[ -z "$mtddev" ] && \
return 1
dd if=$mtddev of=/tmp/${mtddev##*/} bs=1k
offset=$(bootconfig_find_entry "/tmp/${mtddev##*/}" $partname) || return 1
current=$(hexdump -n 4 -s $((offset + 0x10)) -e '1/4 "%d"' /tmp/${mtddev##*/})
[ -z "$index" ] && \
echo "$current" && return 0
if [ "$current" != "$index" ]; then
printf "\x$index" | \
dd of=$mtddev conv=notrunc bs=1 seek=$((offset + 0x10))
fi
}
# Qcom U-Boot always sets a name of current active partition to "rootfs" and
# inactive partition is named as "rootfs_1", in the smem partition table.
# When the second partition is active, "rootfs" and "rootfs_1" are swapped.
smempart_next_root() {
local index="$1"
local root_idx="$(find_mtd_index rootfs)"
local root1_idx="$(find_mtd_index rootfs_1)"
local root_offset root1_offset
[ -z "$root_idx" ] || [ -z "$root1_idx" ] && \
return 1
root_offset=$(cat /sys/block/mtdblock$root_idx/device/offset)
root1_offset=$(cat /sys/block/mtdblock$root1_idx/device/offset)
case "$index" in
0)
[ "$root_offset" -lt "$root1_offset" ] && \
echo "rootfs" || \
echo "rootfs_1"
;;
1)
[ "$root_offset" -lt "$root1_offset" ] && \
echo "rootfs_1" || \
echo "rootfs"
;;
*)
echo "invalid index specified..."
return 1
;;
esac
}
elecom_upgrade_prepare() {
local index
if ! index=$(bootconfig_rw_index "0:bootconfig" rootfs); then
v "failed to read bootconfig index..."
nand_do_upgrade_failed
fi
if ! CI_UBIPART=$(smempart_next_root $index); then
v "failed to get next root..."
nand_do_upgrade_failed
fi
v "next rootfs: $index (current: $CI_UBIPART)"
}

View File

@ -0,0 +1,53 @@
. /lib/upgrade/common.sh
glinet_do_fit_upgrade() {
echo -n "fit: Extract [ FIT IMAGE ] -x-x-> [ ubi.bin ] ... "
local ubi=/tmp/ubi.bin
local part=$(dumpimage -l "$1" | grep -o "Image [0-9] (ubi)" | cut -f2 -d" ")
local ubibin=$( dumpimage -T flat_dt -p ${part} -o "$ubi" "$1" )
if [ -s "$ubi" ]; then
echo "[ OK ]"
local ubiMd5=$(md5sum "$ubi" | cut -f1 -d" ")
echo -n "fit-copy: [ ubi.bin ] -c-c-> [ firmware.bin ] ... "
mv "$ubi" "$1"
echo "[ OK ]"
local firmMd5=$(md5sum "$1" | cut -f1 -d" ")
echo -n "fit-copy: MD5 CHECK: "
if [ "$ubiMd5" = "$firmMd5" ]; then
echo "[ OK ]"
echo "$ubiMd5 <=> $firmMd5"
echo "fit: Successfully Extracted UBI from FIT IMAGE"
echo "fit: Proceeding with sysupgrade .."
nand_do_upgrade "$1"
return
fi
echo "[ FAILED ] !!"
echo "ERROR: Failed to Copy UBI into firmware.bin !!"
echo "fit: Terminating sysupgrade .."
exit 1
fi
echo "[ FAILED ] !!"
echo "ERROR: Failed to Extract UBI from FIT IMAGE !!"
echo "fit: Terminating sysupgrade .."
exit 1
}
glinet_do_upgrade() {
CI_UBIPART="rootfs"
echo -n "Validating GL.iNet Image ... "
case "$(identify_magic_long $(get_magic_long "$1"))" in
fit)
echo "[ OK ]"
echo "fit-main: Firmware is Valid: fit"
echo "fit-main: Upgrading Firmware via [ FIT IMAGE ]"
glinet_do_fit_upgrade "$1"
;;
*)
echo "[ FAILED ] !!"
echo "main: GL.iNet Image Validation Failed !!"
echo "main: Attempting default sysupgrade"
nand_do_upgrade "$1"
;;
esac
}

View File

@ -1,7 +1,7 @@
PART_NAME=firmware
REQUIRE_IMAGE_METADATA=1
RAMFS_COPY_BIN='fw_printenv fw_setenv head'
RAMFS_COPY_BIN='dumpimage fw_printenv fw_setenv head seq'
RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
remove_oem_ubi_volume() {
@ -71,6 +71,22 @@ platform_check_image() {
platform_do_upgrade() {
case "$(board_name)" in
elecom,wrc-x3000gs2)
local delay index
delay=$(fw_printenv bootdelay)
[ -z "$delay" ] || [ "$delay" -eq "0" ] && \
fw_setenv bootdelay 3
elecom_upgrade_prepare
remove_oem_ubi_volume ubi_rootfs
remove_oem_ubi_volume wifi_fw
nand_do_upgrade "$1"
;;
glinet,gl-b3000)
glinet_do_upgrade "$1"
;;
linksys,mr5500|\
linksys,mx2000|\
linksys,mx5500|\

View File

@ -13,6 +13,7 @@ ipq807x_setup_interfaces()
case "$board" in
aliyun,ap8220|\
edgecore,eap102|\
tplink,deco-x80-5g|\
yuncore,ax880|\
zte,mf269|\
zte,mf269-stock)
@ -103,6 +104,11 @@ ipq807x_setup_macs()
lan_mac=$(macaddr_add $label_mac 1)
wan_mac=$label_mac
;;
tplink,deco-x80-5g)
label_mac=$(get_mac_binary /tmp/factory_data/default-mac 0)
lan_mac=$(macaddr_add $label_mac 1)
wan_mac=$label_mac
;;
tplink,eap620hd-v1|\
tplink,eap660hd-v1)
label_mac=$(get_mac_binary /tmp/factory_data/default-mac 0)

View File

@ -99,6 +99,13 @@ case "$FIRMWARE" in
spectrum,sax1v1k)
caldata_extract_mmc "0:ART" 0x1000 0x20000
;;
tplink,deco-x80-5g)
caldata_extract "0:art" 0x1000 0x20000
label_mac=$(get_mac_binary /tmp/factory_data/default-mac 0)
ath11k_patch_mac $(macaddr_add $label_mac -1) 0
ath11k_patch_mac $(macaddr_add $label_mac -2) 1
ath11k_set_macflag
;;
tplink,eap620hd-v1|\
tplink,eap660hd-v1)
caldata_from_file "/tmp/factory_data/radio" 0 0x20000

View File

@ -1,20 +1,32 @@
#!/bin/sh
preinit_mount_factory_data() {
local mtd_path
. /lib/functions.sh
. /lib/functions/system.sh
. /lib/functions.sh
. /lib/functions/system.sh
preinit_mount_factory_data() {
local part_name="$1"
local mtd_path
local ubi_num
mtd_path=$(find_mtd_chardev "$part_name")
ubi_num=$(grep $part_name /proc/mtd | cut -c 1-5 | grep -o '[0-9]*')
ubiattach --dev-path="$mtd_path" --devn=$ubi_num
mkdir /tmp/$part_name
mount -o ro,noatime -t ubifs ubi$ubi_num:ubi_$part_name /tmp/$part_name
}
preinit_mount_factory_partitions() {
case $(board_name) in
tplink,deco-x80-5g)
preinit_mount_factory_data "factory_data"
preinit_mount_factory_data "runtime_data"
;;
tplink,eap620hd-v1|\
tplink,eap660hd-v1)
mtd_path=$(find_mtd_chardev "factory_data")
ubiattach --dev-path="$mtd_path" --devn=1
mkdir /tmp/factory_data
mount -o ro,noatime -t ubifs ubi1:ubi_factory_data /tmp/factory_data
preinit_mount_factory_data "tp_data"
;;
esac
}
boot_hook_add preinit_main preinit_mount_factory_data
boot_hook_add preinit_main preinit_mount_factory_partitions

View File

@ -289,6 +289,7 @@ platform_do_upgrade() {
CI_DATAPART="rootfs_data"
emmc_do_upgrade "$1"
;;
tplink,deco-x80-5g|\
tplink,eap620hd-v1|\
tplink,eap660hd-v1)
tplink_do_upgrade "$1"

View File

@ -0,0 +1,35 @@
From 589b7e9600b1e50574ce91e4d6fc903ef81d957f Mon Sep 17 00:00:00 2001
From: INAGAKI Hiroshi <musashino.open@gmail.com>
Date: Fri, 14 Feb 2025 18:19:58 +0900
Subject: [PATCH] spi: spi-qpic-snand: add user_config support for ECC
Make the ECC strength in the qpic-snand driver configurable via device
tree to use the device-specific ECC strength value.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
---
--- a/drivers/spi/spi-qpic-snand.c
+++ b/drivers/spi/spi-qpic-snand.c
@@ -274,8 +274,20 @@ static int qcom_spi_ecc_init_ctx_pipelin
nand->ecc.ctx.priv = ecc_cfg;
snandc->qspi->mtd = mtd;
- /* BCH8 or BCH4 */
- ecc_mode = mtd->oobsize > 64 ? 1 : 0;
+ /* BCH4 or BCH8 */
+ switch (nand->ecc.user_conf.strength) {
+ case 4:
+ ecc_mode = 0;
+ break;
+ case 8:
+ ecc_mode = 1;
+ break;
+ default:
+ ecc_mode = mtd->oobsize > 64 ? 1 : 0;
+ dev_warn(snandc->dev,
+ "invalid ECC strength detected, configured from mtd oobsize\n");
+ break;
+ }
ecc_cfg->ecc_bytes_hw = ecc_mode ? 13 : 7;
ecc_cfg->spare_bytes = ecc_mode ? 2 : 4;

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