Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2025-11-19 22:17:25 +08:00
commit f847612aa7
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
107 changed files with 5688 additions and 1254 deletions

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@ -383,6 +383,15 @@ menu "Global build settings"
bool "Full"
endchoice
config PKG_DT_RELR
bool "Link with relative relocations (RELR)"
depends on (aarch64 || i386 || loongarch64 || x86_64)
default y
help
Link all applications with -Wl,-z,pack-relative-relocs.
This will reduce the size of many applications.
This is only supported on a limited number of architectures.
config TARGET_ROOTFS_SECURITY_LABELS
bool
select KERNEL_SQUASHFS_XATTR

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@ -8,6 +8,7 @@ PKG_ASLR_PIE_REGULAR ?= 0
PKG_SSP ?= 1
PKG_FORTIFY_SOURCE ?= 1
PKG_RELRO ?= 1
PKG_DT_RELR ?= 1
ifdef CONFIG_PKG_CHECK_FORMAT_SECURITY
ifeq ($(strip $(PKG_CHECK_FORMAT_SECURITY)),1)
@ -69,3 +70,10 @@ ifdef CONFIG_PKG_RELRO_FULL
endif
endif
ifdef CONFIG_PKG_DT_RELR
ifeq ($(strip $(PKG_DT_RELR)),1)
TARGET_CFLAGS += -Wl,-z,pack-relative-relocs
TARGET_LDFLAGS += -zpack-relative-relocs
endif
endif

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@ -78,6 +78,7 @@ define prepare_rootfs
cd $(1); \
if [ -n "$(CONFIG_USE_APK)" ]; then \
IPKG_POSTINST_PATH=./lib/apk/db/*.post-install; \
$(STAGING_DIR_HOST)/bin/gzip -d ./lib/apk/db/scripts.tar; \
$(STAGING_DIR_HOST)/bin/tar -C ./lib/apk/db/ -xf ./lib/apk/db/scripts.tar --wildcards "*.post-install"; \
else \
IPKG_POSTINST_PATH=./usr/lib/opkg/info/*.postinst; \
@ -91,6 +92,7 @@ define prepare_rootfs
fi; \
[ -n "$(CONFIG_USE_APK)" ] && $(STAGING_DIR_HOST)/bin/tar --delete -f ./lib/apk/db/scripts.tar $$(basename $$script); \
done; \
[ -n "$(CONFIG_USE_APK)" ] && $(STAGING_DIR_HOST)/bin/gzip -f -9n -S ".gz" ./lib/apk/db/scripts.tar; \
if [ -z "$(CONFIG_USE_APK)" ]; then \
$(if $(IB),,awk -i inplace \
'/^Status:/ { \

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@ -498,6 +498,12 @@ ifdef CONFIG_PACKAGE_kmod-mt7921e
endif
ifdef CONFIG_PACKAGE_kmod-mt7996e
PKG_MAKE_FLAGS += CONFIG_MT7996E=m
ifdef CONFIG_TARGET_airoha_an7581
PKG_MAKE_FLAGS += CONFIG_MT76_NPU=y
PKG_MAKE_FLAGS += CONFIG_MT7996_NPU=y
NOSTDINC_FLAGS += -DCONFIG_MT76_NPU
NOSTDINC_FLAGS += -DCONFIG_MT7996_NPU
endif
endif
ifdef CONFIG_PACKAGE_kmod-mt7925-common
PKG_MAKE_FLAGS += CONFIG_MT7925_COMMON=m

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@ -587,6 +587,13 @@
"type": "number",
"default": 0
},
"rssi_reject_assoc_timeout": {
"description": "Association retry delay in seconds allowed by the STA if RSSI has not met the threshold",
"type": "number",
"default": 30,
"minimum": 0,
"maximum": 255
},
"rts": {
"description": "Override the RTS/CTS threshold",
"type": "number"

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@ -489,7 +489,7 @@ function generate(config) {
append_vars(config, [ 'airtime_mode' ]);
/* assoc/thresholds */
append_vars(config, [ 'rssi_reject_assoc_rssi', 'rssi_ignore_probe_request', 'iface_max_num_sta', 'no_probe_resp_if_max_sta' ]);
append_vars(config, [ 'rssi_reject_assoc_rssi', 'rssi_reject_assoc_timeout', 'rssi_ignore_probe_request', 'iface_max_num_sta', 'no_probe_resp_if_max_sta' ]);
/* ACS / Radar*/
if (!phy_features.radar_background || config.band != '5g')

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@ -126,6 +126,7 @@ hostapd_common_add_device_config() {
config_add_int cell_density
config_add_int rts_threshold
config_add_int rssi_reject_assoc_rssi
config_add_int rssi_reject_assoc_timeout
config_add_int rssi_ignore_probe_request
config_add_int maxassoc
config_add_int reg_power_type
@ -149,8 +150,8 @@ hostapd_prepare_device_config() {
json_get_vars country country3 country_ie beacon_int:100 doth require_mode legacy_rates \
acs_chan_bias local_pwr_constraint spectrum_mgmt_required airtime_mode cell_density \
rts_threshold beacon_rate rssi_reject_assoc_rssi rssi_ignore_probe_request maxassoc \
mbssid:0 band reg_power_type stationary_ap vendor_vht
rts_threshold beacon_rate rssi_reject_assoc_rssi rssi_reject_assoc_timeout rssi_ignore_probe_request \
maxassoc mbssid:0 band reg_power_type stationary_ap vendor_vht
hostapd_set_log_options base_cfg
@ -244,6 +245,7 @@ hostapd_prepare_device_config() {
done
[ -n "$rssi_reject_assoc_rssi" ] && append base_cfg "rssi_reject_assoc_rssi=$rssi_reject_assoc_rssi" "$N"
[ -n "$rssi_reject_assoc_timeout" ] && append base_cfg "rssi_reject_assoc_timeout=$rssi_reject_assoc_timeout" "$N"
[ -n "$rssi_ignore_probe_request" ] && append base_cfg "rssi_ignore_probe_request=$rssi_ignore_probe_request" "$N"
[ -n "$beacon_rate" ] && append base_cfg "beacon_rate=$beacon_rate" "$N"
[ -n "$rlist" ] && append base_cfg "supported_rates=$rlist" "$N"

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@ -44,7 +44,8 @@ MAKE_FLAGS += \
CONFIGURE_ARGS="$(CONFIGURE_ARGS)" \
LIBS_EADCLIENT="$(PKG_BUILD_DIR)/tinysrp/libtinysrp.a" \
LIBS_EAD="$(PKG_BUILD_DIR)/tinysrp/libtinysrp.a $(STAGING_DIR)/usr/lib/libpcap.a" \
CFLAGS="$(TARGET_CFLAGS)"
CFLAGS="$(TARGET_CFLAGS)" \
LDFLAGS="$(TARGET_LDFLAGS)"
define Package/ead/install
$(INSTALL_DIR) $(1)/sbin

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@ -60,7 +60,7 @@ define Build/Compile
$(MAKE) -C $(PKG_BUILD_DIR) \
$(TARGET_CONFIGURE_OPTS) \
CFLAGS="$(TARGET_CFLAGS)" \
LDFLAGS="" \
LDFLAGS="$(TARGET_LDFLAGS)" \
comgt
endef

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@ -29,7 +29,7 @@ define Package/resolveip/description
endef
define Build/Compile
$(TARGET_CC) $(TARGET_CFLAGS) -Wall \
$(TARGET_CC) $(TARGET_CFLAGS) $(TARGET_LDFLAGS) -Wall \
-o $(PKG_BUILD_DIR)/resolveip $(PKG_BUILD_DIR)/resolveip.c
endef

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@ -60,6 +60,7 @@ define Build/Compile
$(MAKE) -C $(PKG_BUILD_DIR) \
$(TARGET_CONFIGURE_OPTS) \
CFLAGS="$(TARGET_CFLAGS) -I." \
LDFLAGS="$(TARGET_LDFLAGS)" \
BUILD_WE_ESSENTIAL=y \
LIBS="-lm -Wl,--gc-sections" \
libiw.so.$(PKG_VERSION) iwmulticall

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@ -1,7 +1,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=apk
PKG_RELEASE:=1
PKG_RELEASE:=2
PKG_SOURCE_URL=https://gitlab.alpinelinux.org/alpine/apk-tools.git
PKG_SOURCE_PROTO:=git

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@ -0,0 +1,55 @@
diff --git a/doc/apk.8.scd b/doc/apk.8.scd
index bd15fe75d7a4..cbac8c6c8b7b 100644
--- a/doc/apk.8.scd
+++ b/doc/apk.8.scd
@@ -461,7 +461,8 @@ timeout 120
*/lib/apk/db/installed*
Database of installed packages and their contents.
-*/lib/apk/db/scripts.tar*
+*/lib/apk/db/scripts.tar*++
+*/lib/apk/db/scripts.tar.gz*
Collection of all package scripts from currently installed packages.
*/lib/apk/db/triggers*
diff --git a/src/apk_database.h b/src/apk_database.h
index 9f8670ac8ebb..10f1414c9e06 100644
--- a/src/apk_database.h
+++ b/src/apk_database.h
@@ -202,6 +202,7 @@ struct apk_database {
unsigned int compat_depversions : 1;
unsigned int sorted_names : 1;
unsigned int sorted_installed_packages : 1;
+ unsigned int scripts_tar : 1;
struct apk_dependency_array *world;
struct apk_id_cache *id_cache;
diff --git a/src/database.c b/src/database.c
index cbe58ebbf885..cb1b709140af 100644
--- a/src/database.c
+++ b/src/database.c
@@ -1255,8 +1255,11 @@ static int apk_db_read_layer(struct apk_database *db, unsigned layer)
}
if (!(flags & APK_OPENF_NO_SCRIPTS)) {
- r = apk_tar_parse(apk_istream_from_file(fd, "scripts.tar"),
- apk_read_script_archive_entry, db, db->id_cache);
+ struct apk_istream *is = apk_istream_from_file(fd, "scripts.tar");
+ if (!IS_ERR(is) || PTR_ERR(is) != -ENOENT) db->scripts_tar = 1;
+ else is = apk_istream_gunzip(apk_istream_from_file(fd, "scripts.tar.gz"));
+
+ r = apk_tar_parse(is, apk_read_script_archive_entry, db, db->id_cache);
if (!ret && r != -ENOENT) ret = r;
}
@@ -2128,8 +2131,9 @@ static int apk_db_write_layers(struct apk_database *db)
continue;
}
ld->installed = apk_ostream_to_file(ld->fd, "installed", 0644);
- ld->scripts = apk_ostream_to_file(ld->fd, "scripts.tar", 0644);
ld->triggers = apk_ostream_to_file(ld->fd, "triggers", 0644);
+ if (db->scripts_tar) ld->scripts = apk_ostream_to_file(ld->fd, "scripts.tar", 0644);
+ else ld->scripts = apk_ostream_gzip(apk_ostream_to_file(ld->fd, "scripts.tar.gz", 0644));
if (i == APK_DB_LAYER_ROOT)
os = apk_ostream_to_file(db->root_fd, apk_world_file, 0644);

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@ -1,11 +1,13 @@
--- a/Makefile-libbz2_so
+++ b/Makefile-libbz2_so
@@ -35,7 +35,7 @@ OBJS= blocksort.o \
@@ -35,8 +35,8 @@ OBJS= blocksort.o \
bzlib.o
all: $(OBJS)
- $(CC) -shared -Wl,-soname -Wl,libbz2.so.1.0 -o libbz2.so.1.0.8 $(OBJS)
- $(CC) $(CFLAGS) -o bzip2-shared bzip2.c libbz2.so.1.0.8
+ $(CC) -shared -Wl,-soname -Wl,libbz2.so.1.0 $(LDFLAGS) -o libbz2.so.1.0.8 $(OBJS)
$(CC) $(CFLAGS) -o bzip2-shared bzip2.c libbz2.so.1.0.8
+ $(CC) $(CFLAGS) $(LDFLAGS) -o bzip2-shared bzip2.c libbz2.so.1.0.8
rm -f libbz2.so.1.0
ln -s libbz2.so.1.0.8 libbz2.so.1.0

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@ -304,7 +304,7 @@
-$(LUA_T): $(LUA_O) $(LUA_A)
- $(CC) -o $@ $(LDFLAGS) $(LUA_O) $(LUA_A) $(LIBS)
+$(LUA_SO): $(CORE_O) $(LIB_O)
+ $(CC) -o $@ -Wl,-Bsymbolic-functions -shared -Wl,-soname="$@" $?
+ $(CC) -o $@ $(MYLDFLAGS) -Wl,-Bsymbolic-functions -shared -Wl,-soname="$@" $?
+ ln -fs $@ liblua$V.so.0.0
+ ln -fs $@ liblua$V.so.0
+ ln -fs $@ liblua$V.so

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@ -26,7 +26,8 @@ endef
define Build/Compile
$(MAKE) -C $(PKG_BUILD_DIR) \
CC="$(TARGET_CC)" \
CFLAGS="$(TARGET_CFLAGS) -Wall"
CFLAGS="$(TARGET_CFLAGS) -Wall" \
LDFLAGS="$(TARGET_LDFLAGS)"
endef
define Package/zyxel-bootconfig/install

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@ -1,7 +1,7 @@
all: zyxel-bootconfig
zyxel-bootconfig:
$(CC) $(CFLAGS) -Wall zyxel-bootconfig.c -o zyxel-bootconfig
$(CC) $(CFLAGS) $(LDFLAGS) -Wall zyxel-bootconfig.c -o zyxel-bootconfig
clean:
rm -f zyxel-bootconfig

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@ -0,0 +1,31 @@
From 8e0a754b0836d996802713bbebc87bc1cc17925c Mon Sep 17 00:00:00 2001
From: Lorenzo Bianconi <lorenzo@kernel.org>
Date: Thu, 13 Nov 2025 18:19:38 +0100
Subject: [PATCH] net: airoha: Do not loopback traffic to GDM2 if it is
available on the device
Airoha_eth driver forwards offloaded uplink traffic (packets received
on GDM1 and forwarded to GDM{3,4}) to GDM2 in order to apply hw QoS.
This is correct if the device does not support a dedicated GDM2 port.
In this case, in order to enable hw offloading for uplink traffic,
the packets should be sent to GDM{3,4} directly.
Fixes: 9cd451d414f6 ("net: airoha: Add loopback support for GDM2")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20251113-airoha-hw-offload-gdm2-fix-v1-1-7e4ca300872f@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/airoha/airoha_ppe.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/airoha/airoha_ppe.c
+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
@@ -308,7 +308,7 @@ static int airoha_ppe_foe_entry_prepare(
if (!airoha_is_valid_gdm_port(eth, port))
return -EINVAL;
- if (dsa_port >= 0)
+ if (dsa_port >= 0 || eth->ports[1])
pse_port = port->id == 4 ? FE_PSE_PORT_GDM4
: port->id;
else

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@ -0,0 +1,34 @@
From 62f1347fa5bf6e6c9c054aedb9e87e7205fa12ac Mon Sep 17 00:00:00 2001
From: Lorenzo Bianconi <lorenzo@kernel.org>
Date: Fri, 17 Oct 2025 10:50:32 +0200
Subject: [PATCH] wifi: mt76: Introduce the NPU generic layer
Add the NPU generic layer in mt76 module. NPU will be used to enable
traffic forward offloading between the MT76 NIC and the Airoha ethernet one
available on the Airoha EN7581 SoC using Netfilter Flowtable APIs.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20251017-mt76-npu-devel-v2-4-ddaa90901723@kernel.org
Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
drivers/net/wireless/mediatek/mt76/Kconfig | 4 +
drivers/net/wireless/mediatek/mt76/Makefile | 1 +
drivers/net/wireless/mediatek/mt76/dma.c | 41 +-
drivers/net/wireless/mediatek/mt76/dma.h | 36 ++
drivers/net/wireless/mediatek/mt76/mac80211.c | 6 +-
drivers/net/wireless/mediatek/mt76/mt76.h | 135 +++++
drivers/net/wireless/mediatek/mt76/npu.c | 494 ++++++++++++++++++
include/linux/soc/airoha/airoha_offload.h | 1 +
8 files changed, 711 insertions(+), 7 deletions(-)
create mode 100644 drivers/net/wireless/mediatek/mt76/npu.c
--- a/include/linux/soc/airoha/airoha_offload.h
+++ b/include/linux/soc/airoha/airoha_offload.h
@@ -6,6 +6,7 @@
#ifndef AIROHA_OFFLOAD_H
#define AIROHA_OFFLOAD_H
+#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>

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@ -0,0 +1,47 @@
#!/bin/sh
# This must run before 10-wifi-detect
[ "${ACTION}" = "add" ] || return
. /lib/functions.sh
. /lib/functions/system.sh
do_migrate_radio()
{
local config="$1"
config_get from "$config" path
to=${from/pciex\//pcie\/}
# Checks if kernel version is less than 6.12.0, if it is and the path is
# using the new format, then path should be migrated to the old format.
[ "$(get_linux_version)" -lt "612000" ] && to=${from/pcie\//pciex\/}
[ "$from" = "$to" ] && return
uci set "wireless.${config}.path=${to}"
WIRELESS_CHANGED=true
logger -t wifi-migrate "Updated path of wireless.${config} from '${from}' to '${to}'"
}
migrate_radio()
{
config_load wireless
config_foreach do_migrate_radio wifi-device
}
WIRELESS_CHANGED=false
case "$(board_name)" in
*)
migrate_radio
;;
esac
$WIRELESS_CHANGED && uci commit wireless
exit 0

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@ -418,7 +418,7 @@
#size-cells = <0>;
};
PCIE0: pciex@d00000000 {
PCIE0: pcie@d00000000 {
device_type = "pci"; /* see ppc4xx_pci_find_bridge */
#interrupt-cells = <1>;
#size-cells = <2>;

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@ -227,13 +227,13 @@
*
*/
bridge@64,0 {
bridge@0,0 {
reg = <0x00400000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
bridge@65,0 {
bridge@0,0 {
/* IDT PES3T3 PCI Express Switch */
compatible = "pci111d,8039";
reg = <0x00410000 0 0 0 0>;
@ -241,14 +241,14 @@
#size-cells = <2>;
ranges;
bridge@66,2 {
bridge@2,0 {
compatible = "pci111d,8039";
reg = <0x00421000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi0: wifi@67,0 {
wifi0: wifi@0,0 {
/* Atheros AR9380 2.4GHz */
compatible = "pci168c,0030";
reg = <0x00430000 0 0 0 0>;
@ -256,14 +256,14 @@
};
};
bridge@66,3 {
bridge@3,0 {
compatible = "pci111d,8039";
reg = <0x00421800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi1: wifi@68,0 {
wifi1: wifi@0,0 {
/* Atheros AR9380 5GHz */
compatible = "pci168c,0030";
reg = <0x00440000 0 0 0 0>;

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@ -443,13 +443,13 @@
* -+-[0000:40]---00.0-[41-7f]----00.0
*/
bridge@64,0 {
bridge@0,0 {
reg = <0x00400000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi0: wifi@65,0 {
wifi0: wifi@0,0 {
/* Atheros AR9380 2.4/5GHz */
compatible = "pci168c,0030";
reg = <0x00410000 0 0 0 0>;

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@ -31,13 +31,13 @@
* -+-[0000:40]---00.0-[41-7f]----00.0
*/
bridge@64,0 {
bridge@0,0 {
reg = <0x00400000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi0: wifi@65,0 {
wifi0: wifi@0,0 {
/* Atheros AR9380 5GHz */
compatible = "pci168c,0030";
reg = <0x00410000 0 0 0 0>;

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@ -48,13 +48,13 @@
*
*/
bridge@64,0 {
bridge@0,0 {
reg = <0x00400000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
bridge@65,0 {
bridge@0,0 {
/* IDT PES3T3 PCI Express Switch */
compatible = "pci111d,8039";
reg = <0x00410000 0 0 0 0>;
@ -62,14 +62,14 @@
#size-cells = <2>;
ranges;
bridge@66,2 {
bridge@2,0 {
compatible = "pci111d,8039";
reg = <0x00421000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi0: wifi@67,0 {
wifi0: wifi@0,0 {
/* Atheros AR9380 2.4/5GHz */
compatible = "pci168c,0030";
reg = <0x00430000 0 0 0 0>;
@ -77,14 +77,14 @@
};
};
bridge@66,3 {
bridge@3,0 {
compatible = "pci111d,8039";
reg = <0x00421800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi1: wifi@68,0 {
wifi1: wifi@0,0 {
/* Atheros AR9380 2.4/5GHz */
compatible = "pci168c,0030";
reg = <0x00440000 0 0 0 0>;

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@ -568,13 +568,13 @@
*
*/
bridge@64,0 {
bridge@0,0 {
reg = <0x00400000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
bridge@65,0 {
bridge@0,0 {
/* IDT PES4T4 PCI Express Switch */
compatible = "pci111d,803a";
reg = <0x00410000 0 0 0 0>;
@ -582,14 +582,14 @@
#size-cells = <2>;
ranges;
bridge@66,2 {
bridge@2,0 {
compatible = "pci111d,803a";
reg = <0x00421000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi0: wifi@67,0 {
wifi0: wifi@0,0 {
/* Atheros AR9380 5GHz */
compatible = "pci168c,0030";
reg = <0x00430000 0 0 0 0>;
@ -605,14 +605,14 @@
};
};
bridge@66,3 {
bridge@3,0 {
compatible = "pci111d,803a";
reg = <0x00421800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi1: wifi@68,0 {
wifi1: wifi@0,0 {
/* Atheros AR9381 2.4GHz */
compatible = "pci168c,0033";
reg = <0x00440000 0 0 0 0>;
@ -622,14 +622,14 @@
};
};
bridge@66,4 {
bridge@4,0 {
compatible = "pci111d,803a";
reg = <0x00422000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
usb1: usb@69,0 {
usb1: usb@0,0 {
/* Renesas uPD720202 */
compatible = "pci1912,0015";
reg = <0x00450000 0 0 0 0>;

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@ -11,6 +11,7 @@ FEATURES:=squashfs usb
SUBTARGETS:=generic mips74k legacy
KERNEL_PATCHVER:=6.6
KERNEL_TESTING_PATCHVER:=6.12
define Target/Description
Build firmware images for Broadcom based BCM47xx/53xx routers with MIPS CPU, *not* ARM.

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@ -0,0 +1,196 @@
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BCM47XX=y
CONFIG_BCM47XX_BCMA=y
CONFIG_BCM47XX_NVRAM=y
CONFIG_BCM47XX_SPROM=y
CONFIG_BCM47XX_SSB=y
CONFIG_BCM47XX_WDT=y
CONFIG_BCMA=y
CONFIG_BCMA_BLOCKIO=y
CONFIG_BCMA_DEBUG=y
CONFIG_BCMA_DRIVER_GMAC_CMN=y
CONFIG_BCMA_DRIVER_GPIO=y
CONFIG_BCMA_DRIVER_MIPS=y
CONFIG_BCMA_DRIVER_PCI=y
CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y
CONFIG_BCMA_FALLBACK_SPROM=y
CONFIG_BCMA_HOST_PCI=y
CONFIG_BCMA_HOST_PCI_POSSIBLE=y
CONFIG_BCMA_HOST_SOC=y
CONFIG_BCMA_NFLASH=y
CONFIG_BCMA_PFLASH=y
CONFIG_BCMA_SFLASH=y
# CONFIG_BGMAC_BCMA is not set
CONFIG_BLK_MQ_PCI=y
CONFIG_CEVT_R4K=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="noinitrd console=ttyS0,115200"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
# CONFIG_COMMON_CLK is not set
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
# CONFIG_CPU_BMIPS is not set
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
CONFIG_CPU_MIPSR1=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_EARLY_PRINTK is not set
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FIXED_PHY=y
CONFIG_FORCE_NR_CPUS=y
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_WDT=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HW_RANDOM=y
CONFIG_HZ_PERIODIC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_GPIO_REGISTER=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_BCM47XXSFLASH=y
CONFIG_MTD_BCM47XX_PARTS=y
CONFIG_MTD_NAND_BCM47XXNFLASH=y
CONFIG_MTD_NAND_BRCMNAND=y
CONFIG_MTD_NAND_BRCMNAND_BCMA=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_PARSER_TRX=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_RAW_NAND=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_EGRESS=y
CONFIG_NET_INGRESS=y
CONFIG_NET_SELFTESTS=y
# CONFIG_NET_SWITCHDEV is not set
CONFIG_NET_XGRESS=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
# CONFIG_OF is not set
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SSB=y
CONFIG_SSB_B43_PCI_BRIDGE=y
CONFIG_SSB_BLOCKIO=y
CONFIG_SSB_DRIVER_EXTIF=y
CONFIG_SSB_DRIVER_GIGE=y
CONFIG_SSB_DRIVER_GPIO=y
CONFIG_SSB_DRIVER_MIPS=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_EMBEDDED=y
CONFIG_SSB_FALLBACK_SPROM=y
CONFIG_SSB_HOST_SOC=y
CONFIG_SSB_PCICORE_HOSTMODE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_SERIAL=y
CONFIG_SSB_SFLASH=y
CONFIG_SSB_SPROM=y
CONFIG_SWCONFIG=y
CONFIG_SWCONFIG_B53=y
CONFIG_SWCONFIG_B53_PHY_DRIVER=y
CONFIG_SWCONFIG_B53_PHY_FIXUP=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_BMIPS=y
CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_HIGHMEM=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_TARGET_ISA_REV=1
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y
CONFIG_WATCHDOG_CORE=y
CONFIG_ZBOOT_LOAD_ADDRESS=0xffffffff80400000

View File

@ -0,0 +1,484 @@
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -31,6 +31,38 @@ extern int mips_sc_init(void);
extern void (*r4k_blast_dcache)(void);
extern void (*r4k_blast_icache)(void);
+#if defined(CONFIG_BCM47XX) && !defined(CONFIG_CPU_MIPS32_R2)
+#include <asm/paccess.h>
+#include <linux/ssb/ssb.h>
+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg()
+
+static inline unsigned long bcm4710_dummy_rreg(void)
+{
+ return *(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE));
+}
+
+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void *)(addr))
+
+static inline unsigned long bcm4710_fill_tlb(void *addr)
+{
+ return *(unsigned long *)addr;
+}
+
+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void *)(addr))
+
+static inline void bcm4710_protected_fill_tlb(void *addr)
+{
+ unsigned long x;
+ get_dbe(x, (unsigned long *)addr);;
+}
+
+#else
+#define BCM4710_DUMMY_RREG()
+
+#define BCM4710_FILL_TLB(addr)
+#define BCM4710_PROTECTED_FILL_TLB(addr)
+#endif
+
/*
* This macro return a properly sign-extended address suitable as base address
* for indexed cache operations. Two issues here:
@@ -64,6 +96,7 @@ static inline void flush_icache_line_ind
static inline void flush_dcache_line_indexed(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
cache_op(Index_Writeback_Inv_D, addr);
}
@@ -87,11 +120,13 @@ static inline void flush_icache_line(uns
static inline void flush_dcache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
cache_op(Hit_Writeback_Inv_D, addr);
}
static inline void invalidate_dcache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
cache_op(Hit_Invalidate_D, addr);
}
@@ -164,6 +199,7 @@ static inline int protected_flush_icache
return protected_cache_op(Hit_Invalidate_I_Loongson2, addr);
default:
+ BCM4710_DUMMY_RREG();
return protected_cache_op(Hit_Invalidate_I, addr);
}
}
@@ -176,6 +212,7 @@ static inline int protected_flush_icache
*/
static inline int protected_writeback_dcache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
return protected_cache_op(Hit_Writeback_Inv_D, addr);
}
@@ -197,8 +234,51 @@ static inline void invalidate_tcache_pag
unroll(times, _cache_op, insn, op, (addr) + (i++ * (lsize))); \
} while (0)
+static inline void blast_dcache(void)
+{
+ unsigned long start = KSEG0;
+ unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways;
+ unsigned long end = (start + dcache_size);
+
+ do {
+ BCM4710_DUMMY_RREG();
+ cache_op(Index_Writeback_Inv_D, start);
+ start += current_cpu_data.dcache.linesz;
+ } while(start < end);
+}
+
+static inline void blast_dcache_page(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = start + PAGE_SIZE;
+
+ BCM4710_FILL_TLB(start);
+ do {
+ BCM4710_DUMMY_RREG();
+ cache_op(Hit_Writeback_Inv_D, start);
+ start += current_cpu_data.dcache.linesz;
+ } while(start < end);
+}
+
+static inline void blast_dcache_page_indexed(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = start + PAGE_SIZE;
+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
+ unsigned long ws_end = current_cpu_data.dcache.ways <<
+ current_cpu_data.dcache.waybit;
+ unsigned long ws, addr;
+ for (ws = 0; ws < ws_end; ws += ws_inc) {
+ start = page + ws;
+ for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) {
+ BCM4710_DUMMY_RREG();
+ cache_op(Index_Writeback_Inv_D, addr);
+ }
+ }
+}
+
/* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */
-#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra) \
+#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra, war) \
static inline void extra##blast_##pfx##cache##lsize(void) \
{ \
unsigned long start = INDEX_BASE; \
@@ -208,6 +288,7 @@ static inline void extra##blast_##pfx##c
current_cpu_data.desc.waybit; \
unsigned long ws, addr; \
\
+ war \
for (ws = 0; ws < ws_end; ws += ws_inc) \
for (addr = start; addr < end; addr += lsize * 32) \
cache_unroll(32, kernel_cache, indexop, \
@@ -219,6 +300,7 @@ static inline void extra##blast_##pfx##c
unsigned long start = page; \
unsigned long end = page + PAGE_SIZE; \
\
+ war \
do { \
cache_unroll(32, kernel_cache, hitop, start, lsize); \
start += lsize * 32; \
@@ -235,32 +317,33 @@ static inline void extra##blast_##pfx##c
current_cpu_data.desc.waybit; \
unsigned long ws, addr; \
\
+ war \
for (ws = 0; ws < ws_end; ws += ws_inc) \
for (addr = start; addr < end; addr += lsize * 32) \
cache_unroll(32, kernel_cache, indexop, \
addr | ws, lsize); \
}
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, )
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, )
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_)
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, )
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, )
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, )
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, )
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, )
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, )
-
-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, )
-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, )
-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, , BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, , )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, , BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_, BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, , )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, , BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, , )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, , )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, , )
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, , )
+
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, , )
+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, , )
+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, , )
#define __BUILD_BLAST_USER_CACHE(pfx, desc, indexop, hitop, lsize) \
static inline void blast_##pfx##cache##lsize##_user_page(unsigned long page) \
@@ -285,65 +368,36 @@ __BUILD_BLAST_USER_CACHE(d, dcache, Inde
__BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
/* build blast_xxx_range, protected_blast_xxx_range */
-#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra) \
+#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra, war, war2) \
static inline void prot##extra##blast_##pfx##cache##_range(unsigned long start, \
unsigned long end) \
{ \
unsigned long lsize = cpu_##desc##_line_size(); \
- unsigned long lsize_2 = lsize * 2; \
- unsigned long lsize_3 = lsize * 3; \
- unsigned long lsize_4 = lsize * 4; \
- unsigned long lsize_5 = lsize * 5; \
- unsigned long lsize_6 = lsize * 6; \
- unsigned long lsize_7 = lsize * 7; \
- unsigned long lsize_8 = lsize * 8; \
unsigned long addr = start & ~(lsize - 1); \
- unsigned long aend = (end + lsize - 1) & ~(lsize - 1); \
- int lines = (aend - addr) / lsize; \
- \
- while (lines >= 8) { \
- prot##cache_op(hitop, addr); \
- prot##cache_op(hitop, addr + lsize); \
- prot##cache_op(hitop, addr + lsize_2); \
- prot##cache_op(hitop, addr + lsize_3); \
- prot##cache_op(hitop, addr + lsize_4); \
- prot##cache_op(hitop, addr + lsize_5); \
- prot##cache_op(hitop, addr + lsize_6); \
- prot##cache_op(hitop, addr + lsize_7); \
- addr += lsize_8; \
- lines -= 8; \
- } \
+ unsigned long aend = (end - 1) & ~(lsize - 1); \
\
- if (lines & 0x4) { \
- prot##cache_op(hitop, addr); \
- prot##cache_op(hitop, addr + lsize); \
- prot##cache_op(hitop, addr + lsize_2); \
- prot##cache_op(hitop, addr + lsize_3); \
- addr += lsize_4; \
- } \
- \
- if (lines & 0x2) { \
- prot##cache_op(hitop, addr); \
- prot##cache_op(hitop, addr + lsize); \
- addr += lsize_2; \
- } \
+ war \
\
- if (lines & 0x1) { \
+ while (1) { \
+ war2 \
prot##cache_op(hitop, addr); \
+ if (addr == aend) \
+ break; \
+ addr += lsize; \
} \
}
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, )
-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, )
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, )
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, , BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, , , )
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, , , )
__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I_Loongson2, \
- protected_, loongson2_)
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , )
-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , )
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , )
+ protected_, loongson2_, , )
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , , BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , , , )
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , , , )
/* blast_inv_dcache_range */
-__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , )
-__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , )
+__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , , , BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , , , )
/* Currently, this is very specific to Loongson-3 */
#define __BUILD_BLAST_CACHE_NODE(pfx, desc, indexop, hitop, lsize) \
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -432,6 +432,10 @@
#else
.set push
.set arch=r4000
+#ifdef CONFIG_BCM47XX
+ nop
+ nop
+#endif
eret
.set pop
#endif
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -21,6 +21,19 @@
#include <asm/sync.h>
#include <asm/thread_info.h>
+#ifdef CONFIG_BCM47XX
+# ifdef eret
+# undef eret
+# endif
+# define eret \
+ .set push; \
+ .set noreorder; \
+ nop; \
+ nop; \
+ eret; \
+ .set pop;
+#endif
+
__INIT
/*
@@ -32,6 +45,9 @@
NESTED(except_vec3_generic, 0, sp)
.set push
.set noat
+#ifdef CONFIG_BCM47XX
+ nop
+#endif
mfc0 k1, CP0_CAUSE
andi k1, k1, 0x7c
#ifdef CONFIG_64BIT
@@ -52,6 +68,9 @@ NESTED(except_vec3_r4000, 0, sp)
.set push
.set arch=r4000
.set noat
+#ifdef CONFIG_BCM47XX
+ nop
+#endif
mfc0 k1, CP0_CAUSE
li k0, 31<<2
andi k1, k1, 0x7c
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -37,6 +37,9 @@
#include <asm/traps.h>
#include <asm/mips-cps.h>
+/* For enabling BCM4710 cache workarounds */
+static int bcm4710 = 0;
+
/*
* Bits describing what cache ops an SMP callback function may perform.
*
@@ -144,6 +147,9 @@ static void r4k_blast_dcache_page_setup(
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache_page = blast_dcache_page;
+ else
switch (dc_lsize) {
case 0:
r4k_blast_dcache_page = (void *)cache_noop;
@@ -175,6 +181,9 @@ static void r4k_blast_dcache_user_page_s
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache_user_page = blast_dcache_user_page;
+ else
if (dc_lsize == 0)
r4k_blast_dcache_user_page = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -194,6 +203,9 @@ static void r4k_blast_dcache_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache = blast_dcache;
+ else
if (dc_lsize == 0)
r4k_blast_dcache = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -1665,6 +1677,17 @@ static void coherency_setup(void)
* silly idea of putting something else there ...
*/
switch (current_cpu_type()) {
+ case CPU_BMIPS3300:
+ {
+ u32 cm;
+ cm = read_c0_diag();
+ /* Enable icache */
+ cm |= (1 << 31);
+ /* Enable dcache */
+ cm |= (1 << 30);
+ write_c0_diag(cm);
+ }
+ break;
case CPU_R4000PC:
case CPU_R4000SC:
case CPU_R4000MC:
@@ -1711,6 +1734,15 @@ void r4k_cache_init(void)
extern void build_copy_page(void);
struct cpuinfo_mips *c = &current_cpu_data;
+ /* Check if special workarounds are required */
+#if defined(CONFIG_BCM47XX) && !defined(CONFIG_CPU_MIPS32_R2)
+ if (current_cpu_data.cputype == CPU_BMIPS32 && (current_cpu_data.processor_id & 0xff) == 0) {
+ printk("Enabling BCM4710A0 cache workarounds.\n");
+ bcm4710 = 1;
+ } else
+#endif
+ bcm4710 = 0;
+
probe_pcache();
probe_vcache();
setup_scache();
@@ -1773,7 +1805,15 @@ void r4k_cache_init(void)
*/
local_r4k___flush_cache_all(NULL);
+#ifdef CONFIG_BCM47XX
+ {
+ static void (*_coherency_setup)(void);
+ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup);
+ _coherency_setup();
+ }
+#else
coherency_setup();
+#endif
board_cache_error_setup = r4k_cache_error_setup;
/*
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -939,6 +939,9 @@ void build_get_pgde32(u32 **p, unsigned
uasm_i_srl(p, ptr, ptr, SMP_CPUID_PTRSHIFT);
uasm_i_addu(p, ptr, tmp, ptr);
#else
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+#endif
UASM_i_LA_mostly(p, ptr, pgdc);
#endif
uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
@@ -1285,6 +1288,9 @@ static void build_r4000_tlb_refill_handl
#ifdef CONFIG_64BIT
build_get_pmde64(&p, &l, &r, GPR_K0, GPR_K1); /* get pmd in GPR_K1 */
#else
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(&p);
+#endif
build_get_pgde32(&p, GPR_K0, GPR_K1); /* get pgd in GPR_K1 */
#endif
@@ -1296,6 +1302,9 @@ static void build_r4000_tlb_refill_handl
build_update_entries(&p, GPR_K0, GPR_K1);
build_tlb_write_entry(&p, &l, &r, tlb_random);
uasm_l_leave(&l, p);
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(&p);
+#endif
uasm_i_eret(&p); /* return from trap */
}
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
@@ -1998,6 +2007,9 @@ build_r4000_tlbchange_handler_head(u32 *
#ifdef CONFIG_64BIT
build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */
#else
+# ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+# endif
build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */
#endif
@@ -2044,6 +2056,9 @@ build_r4000_tlbchange_handler_tail(u32 *
build_tlb_write_entry(p, l, r, tlb_indexed);
uasm_l_leave(l, *p);
build_restore_work_registers(p);
+#ifdef CONFIG_BCM47XX
+ uasm_i_nop(p);
+#endif
uasm_i_eret(p); /* return from trap */
#ifdef CONFIG_64BIT

View File

@ -0,0 +1,121 @@
From b36f694256f41bc71571f467646d015dda128d14 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 9 Nov 2013 17:03:59 +0100
Subject: [PATCH 210/210] b44: register adm switch
---
drivers/net/ethernet/broadcom/b44.c | 57 +++++++++++++++++++++++++++++++++++
drivers/net/ethernet/broadcom/b44.h | 3 ++
2 files changed, 60 insertions(+)
--- a/drivers/net/ethernet/broadcom/b44.c
+++ b/drivers/net/ethernet/broadcom/b44.c
@@ -31,6 +31,8 @@
#include <linux/ssb/ssb.h>
#include <linux/slab.h>
#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/adm6996-gpio.h>
#include <linux/uaccess.h>
#include <asm/io.h>
@@ -2227,6 +2229,69 @@ static void b44_adjust_link(struct net_d
}
}
+#ifdef CONFIG_BCM47XX
+static int b44_register_adm_switch(struct b44 *bp)
+{
+ int gpio;
+ struct platform_device *pdev;
+ struct adm6996_gpio_platform_data adm_data = {0};
+ struct platform_device_info info = {0};
+
+ adm_data.model = ADM6996L;
+ gpio = bcm47xx_nvram_gpio_pin("adm_eecs");
+ if (gpio >= 0)
+ adm_data.eecs = gpio;
+ else
+ adm_data.eecs = 2;
+
+ gpio = bcm47xx_nvram_gpio_pin("adm_eesk");
+ if (gpio >= 0)
+ adm_data.eesk = gpio;
+ else
+ adm_data.eesk = 3;
+
+ gpio = bcm47xx_nvram_gpio_pin("adm_eedi");
+ if (gpio >= 0)
+ adm_data.eedi = gpio;
+ else
+ adm_data.eedi = 4;
+
+ /*
+ * We ignore the "adm_rc" GPIO here. The driver does not use it,
+ * and it conflicts with the Reset button GPIO on the Linksys WRT54GSv1.
+ */
+
+ info.parent = bp->sdev->dev;
+ info.name = "adm6996_gpio";
+ info.id = -1;
+ info.data = &adm_data;
+ info.size_data = sizeof(adm_data);
+
+ if (!bp->adm_switch) {
+ pdev = platform_device_register_full(&info);
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ bp->adm_switch = pdev;
+ }
+ return 0;
+}
+static void b44_unregister_adm_switch(struct b44 *bp)
+{
+ if (bp->adm_switch)
+ platform_device_unregister(bp->adm_switch);
+}
+#else
+static int b44_register_adm_switch(struct b44 *bp)
+{
+ return 0;
+}
+static void b44_unregister_adm_switch(struct b44 *bp)
+{
+
+}
+#endif /* CONFIG_BCM47XX */
+
static int b44_register_phy_one(struct b44 *bp)
{
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
@@ -2263,6 +2328,9 @@ static int b44_register_phy_one(struct b
if (!mdiobus_is_registered_device(bp->mii_bus, bp->phy_addr) &&
(sprom->boardflags_lo & (B44_BOARDFLAG_ROBO | B44_BOARDFLAG_ADM))) {
+ if (sprom->boardflags_lo & B44_BOARDFLAG_ADM)
+ b44_register_adm_switch(bp);
+
dev_info(sdev->dev,
"could not find PHY at %i, use fixed one\n",
bp->phy_addr);
@@ -2457,6 +2525,7 @@ static void b44_remove_one(struct ssb_de
unregister_netdev(dev);
if (bp->flags & B44_FLAG_EXTERNAL_PHY)
b44_unregister_phy_one(bp);
+ b44_unregister_adm_switch(bp);
ssb_device_disable(sdev, 0);
ssb_bus_may_powerdown(sdev->bus);
netif_napi_del(&bp->napi);
--- a/drivers/net/ethernet/broadcom/b44.h
+++ b/drivers/net/ethernet/broadcom/b44.h
@@ -408,6 +408,9 @@ struct b44 {
struct mii_bus *mii_bus;
int old_link;
struct mii_if_info mii_if;
+
+ /* platform device for associated switch */
+ struct platform_device *adm_switch;
};
#endif /* _B44_H */

View File

@ -0,0 +1,54 @@
--- a/drivers/net/ethernet/broadcom/b44.c
+++ b/drivers/net/ethernet/broadcom/b44.c
@@ -408,10 +408,34 @@ static void b44_wap54g10_workaround(stru
error:
pr_warn("PHY: cannot reset MII transceiver isolate bit\n");
}
+
+static void b44_bcm47xx_workarounds(struct b44 *bp)
+{
+ char buf[20];
+ struct ssb_device *sdev = bp->sdev;
+
+ /* Toshiba WRC-1000, Siemens SE505 v1, Askey RT-210W, RT-220W */
+ if (sdev->bus->sprom.board_num == 100) {
+ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY;
+ } else {
+ /* WL-HDD */
+ if (bcm47xx_nvram_getenv("hardware_version", buf, sizeof(buf)) >= 0 &&
+ !strncmp(buf, "WL300-", strlen("WL300-"))) {
+ if (sdev->bus->sprom.et0phyaddr == 0 &&
+ sdev->bus->sprom.et1phyaddr == 1)
+ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY;
+ }
+ }
+ return;
+}
#else
static inline void b44_wap54g10_workaround(struct b44 *bp)
{
}
+
+static inline void b44_bcm47xx_workarounds(struct b44 *bp)
+{
+}
#endif
static int b44_setup_phy(struct b44 *bp)
@@ -420,6 +444,7 @@ static int b44_setup_phy(struct b44 *bp)
int err;
b44_wap54g10_workaround(bp);
+ b44_bcm47xx_workarounds(bp);
if (bp->flags & B44_FLAG_EXTERNAL_PHY)
return 0;
@@ -2157,6 +2182,8 @@ static int b44_get_invariants(struct b44
* valid PHY address. */
bp->phy_addr &= 0x1F;
+ b44_bcm47xx_workarounds(bp);
+
eth_hw_addr_set(bp->dev, addr);
if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){

View File

@ -0,0 +1,25 @@
This prevents the options from being delete with make kernel_oldconfig.
---
drivers/ssb/Kconfig | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/bcma/Kconfig
+++ b/drivers/bcma/Kconfig
@@ -36,6 +36,7 @@ config BCMA_HOST_PCI
config BCMA_HOST_SOC
bool "Support for BCMA in a SoC"
depends on HAS_IOMEM
+ select USB_HCD_BCMA if USB_EHCI_HCD || USB_OHCI_HCD
help
Host interface for a Broadcom AIX bus directly mapped into
the memory. This only works with the Broadcom SoCs from the
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -142,6 +142,7 @@ config SSB_EMBEDDED
bool
depends on SSB_DRIVER_MIPS
depends on PCI=n || SSB_PCICORE_HOSTMODE
+ select USB_HCD_SSB if USB_EHCI_HCD || USB_OHCI_HCD
default y
config SSB_DRIVER_EXTIF

View File

@ -0,0 +1,34 @@
--- a/drivers/mtd/parsers/bcm47xxpart.c
+++ b/drivers/mtd/parsers/bcm47xxpart.c
@@ -98,6 +98,7 @@ static int bcm47xxpart_parse(struct mtd_
int trx_num = 0; /* Number of found TRX partitions */
static const int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, };
int err;
+ bool found_nvram = false;
/*
* Some really old flashes (like AT45DB*) had smaller erasesize-s, but
@@ -279,12 +280,23 @@ static int bcm47xxpart_parse(struct mtd_
if (buf[0] == NVRAM_HEADER) {
bcm47xxpart_add_part(&parts[curr_part++], "nvram",
master->size - blocksize, 0);
+ found_nvram = true;
break;
}
}
kfree(buf);
+ if (!found_nvram) {
+ pr_err("can not find a nvram partition reserve last block\n");
+ bcm47xxpart_add_part(&parts[curr_part++], "nvram_guess",
+ master->size - blocksize * 2, MTD_WRITEABLE);
+ for (i = 0; i < curr_part; i++) {
+ if (parts[i].size + parts[i].offset == master->size)
+ parts[i].offset -= blocksize * 2;
+ }
+ }
+
/*
* Assume that partitions end at the beginning of the one they are
* followed by.

View File

@ -0,0 +1,42 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 7 Nov 2021 14:20:40 +0100
Subject: [PATCH] net: bgmac: connect to PHY even if it is BGMAC_PHY_NOREGS
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Recent bgmac change was meant to just fix a race between "Generic PHY"
and "bcm53xx" drivers after -EPROBE_DEFER. It modified bgmac to use
phy_connect() only if there is a real PHY device connected.
That change broke bgmac on bcm47xx. bcma_phy_connect() now registers a
fixed PHY with the bgmac_phy_connect_direct(). That fails as another
fixed PHY (also using address 0) is already registered - by bcm47xx arch
code bcm47xx_register_bus_complete().
This change brings origial behaviour. It connects Ethernet interface
with pseudo-PHY (switch device) and adjusts Ethernet interface link to
match connected switch.
This fixes:
[ 2.548098] bgmac_bcma bcma0:1: Failed to register fixed PHY device
[ 2.554584] bgmac_bcma bcma0:1: Cannot connect to phy
Fixes: b5375509184d ("net: bgmac: improve handling PHY")
Link: https://lore.kernel.org/netdev/3639116e-9292-03ca-b9d9-d741118a4541@gmail.com/T/#u
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/net/ethernet/broadcom/bgmac-bcma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/broadcom/bgmac-bcma.c
+++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c
@@ -94,7 +94,7 @@ static int bcma_phy_connect(struct bgmac
return 0;
/* Connect to the PHY */
- if (bgmac->mii_bus && bgmac->phyaddr != BGMAC_PHY_NOREGS) {
+ if (bgmac->mii_bus) {
snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, bgmac->mii_bus->id,
bgmac->phyaddr);
phy_dev = phy_connect(bgmac->net_dev, bus_id, bgmac_adjust_link,

View File

@ -0,0 +1,17 @@
When the Ethernet controller is powered down and someone wants to
access the mdio bus like the witch driver (b53) the system crashed if
PCI_D3hot was set before. This patch deactivates this power sawing mode
when a switch driver is in use.
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -4270,7 +4270,8 @@ static void tg3_power_down_prepare(struc
static void tg3_power_down(struct tg3 *tp)
{
pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE));
- pci_set_power_state(tp->pdev, PCI_D3hot);
+ if (!tg3_flag(tp, ROBOSWITCH))
+ pci_set_power_state(tp->pdev, PCI_D3hot);
}
static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u32 *speed, u8 *duplex)

View File

@ -0,0 +1,73 @@
From 597715c61ae75a05ab3310a34ff3857a006f0f63 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Thu, 20 Nov 2014 21:32:42 +0100
Subject: [PATCH] bcma: add table of serial flashes with smaller blocks
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/bcma/driver_chipcommon_sflash.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
--- a/drivers/bcma/driver_chipcommon_sflash.c
+++ b/drivers/bcma/driver_chipcommon_sflash.c
@@ -9,6 +9,7 @@
#include <linux/platform_device.h>
#include <linux/bcma/bcma.h>
+#include <bcm47xx_board.h>
static struct resource bcma_sflash_resource = {
.name = "bcma_sflash",
@@ -42,6 +43,13 @@ static const struct bcma_sflash_tbl_e bc
{ NULL },
};
+/* Some devices use smaller blocks (and have more of them) */
+static const struct bcma_sflash_tbl_e bcma_sflash_st_shrink_tbl[] = {
+ { "M25P16", 0x14, 0x1000, 512, },
+ { "M25P32", 0x15, 0x1000, 1024, },
+ { NULL },
+};
+
static const struct bcma_sflash_tbl_e bcma_sflash_sst_tbl[] = {
{ "SST25WF512", 1, 0x1000, 16, },
{ "SST25VF512", 0x48, 0x1000, 16, },
@@ -85,6 +93,24 @@ static void bcma_sflash_cmd(struct bcma_
bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n");
}
+const struct bcma_sflash_tbl_e *bcma_sflash_shrink_flash(u32 id)
+{
+ enum bcm47xx_board board = bcm47xx_board_get();
+ const struct bcma_sflash_tbl_e *e;
+
+ switch (board) {
+ case BCM47XX_BOARD_NETGEAR_WGR614_V10:
+ case BCM47XX_BOARD_NETGEAR_WNR1000_V3:
+ for (e = bcma_sflash_st_shrink_tbl; e->name; e++) {
+ if (e->id == id)
+ return e;
+ }
+ return NULL;
+ default:
+ return NULL;
+ }
+}
+
/* Initialize serial flash access */
int bcma_sflash_init(struct bcma_drv_cc *cc)
{
@@ -115,6 +141,10 @@ int bcma_sflash_init(struct bcma_drv_cc
case 0x13:
return -ENOTSUPP;
default:
+ e = bcma_sflash_shrink_flash(id);
+ if (e)
+ break;
+
for (e = bcma_sflash_st_tbl; e->name; e++) {
if (e->id == id)
break;

View File

@ -0,0 +1,296 @@
The Netgear wgt634u uses a different format for storing the
configuration. This patch is needed to read out the correct
configuration. The cfe_env.c file uses a different method way to read
out the configuration than the in kernel cfe config reader.
--- a/drivers/firmware/broadcom/Makefile
+++ b/drivers/firmware/broadcom/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-only
-obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o
+obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o cfe_env.o
obj-$(CONFIG_BCM47XX_SPROM) += bcm47xx_sprom.o
obj-$(CONFIG_TEE_BNXT_FW) += tee_bnxt_fw.o
--- /dev/null
+++ b/drivers/firmware/broadcom/cfe_env.c
@@ -0,0 +1,228 @@
+/*
+ * CFE environment variable access
+ *
+ * Copyright 2001-2003, Broadcom Corporation
+ * Copyright 2006, Felix Fietkau <nbd@nbd.name>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <asm/io.h>
+#include <linux/uaccess.h>
+
+#define NVRAM_SIZE (0x1ff0)
+static char _nvdata[NVRAM_SIZE];
+static char _valuestr[256];
+
+/*
+ * TLV types. These codes are used in the "type-length-value"
+ * encoding of the items stored in the NVRAM device (flash or EEPROM)
+ *
+ * The layout of the flash/nvram is as follows:
+ *
+ * <type> <length> <data ...> <type> <length> <data ...> <type_end>
+ *
+ * The type code of "ENV_TLV_TYPE_END" marks the end of the list.
+ * The "length" field marks the length of the data section, not
+ * including the type and length fields.
+ *
+ * Environment variables are stored as follows:
+ *
+ * <type_env> <length> <flags> <name> = <value>
+ *
+ * If bit 0 (low bit) is set, the length is an 8-bit value.
+ * If bit 0 (low bit) is clear, the length is a 16-bit value
+ *
+ * Bit 7 set indicates "user" TLVs. In this case, bit 0 still
+ * indicates the size of the length field.
+ *
+ * Flags are from the constants below:
+ *
+ */
+#define ENV_LENGTH_16BITS 0x00 /* for low bit */
+#define ENV_LENGTH_8BITS 0x01
+
+#define ENV_TYPE_USER 0x80
+
+#define ENV_CODE_SYS(n,l) (((n)<<1)|(l))
+#define ENV_CODE_USER(n,l) ((((n)<<1)|(l)) | ENV_TYPE_USER)
+
+/*
+ * The actual TLV types we support
+ */
+
+#define ENV_TLV_TYPE_END 0x00
+#define ENV_TLV_TYPE_ENV ENV_CODE_SYS(0,ENV_LENGTH_8BITS)
+
+/*
+ * Environment variable flags
+ */
+
+#define ENV_FLG_NORMAL 0x00 /* normal read/write */
+#define ENV_FLG_BUILTIN 0x01 /* builtin - not stored in flash */
+#define ENV_FLG_READONLY 0x02 /* read-only - cannot be changed */
+
+#define ENV_FLG_MASK 0xFF /* mask of attributes we keep */
+#define ENV_FLG_ADMIN 0x100 /* lets us internally override permissions */
+
+
+/* *********************************************************************
+ * _nvram_read(buffer,offset,length)
+ *
+ * Read data from the NVRAM device
+ *
+ * Input parameters:
+ * buffer - destination buffer
+ * offset - offset of data to read
+ * length - number of bytes to read
+ *
+ * Return value:
+ * number of bytes read, or <0 if error occured
+ ********************************************************************* */
+static int
+_nvram_read(unsigned char *nv_buf, unsigned char *buffer, int offset, int length)
+{
+ int i;
+ if (offset > NVRAM_SIZE)
+ return -1;
+
+ for ( i = 0; i < length; i++) {
+ buffer[i] = ((volatile unsigned char*)nv_buf)[offset + i];
+ }
+ return length;
+}
+
+
+static char*
+_strnchr(const char *dest,int c,size_t cnt)
+{
+ while (*dest && (cnt > 0)) {
+ if (*dest == c) return (char *) dest;
+ dest++;
+ cnt--;
+ }
+ return NULL;
+}
+
+
+
+/*
+ * Core support API: Externally visible.
+ */
+
+/*
+ * Get the value of an NVRAM variable
+ * @param name name of variable to get
+ * @return value of variable or NULL if undefined
+ */
+
+char *cfe_env_get(unsigned char *nv_buf, const char *name)
+{
+ int size;
+ unsigned char *buffer;
+ unsigned char *ptr;
+ unsigned char *envval;
+ unsigned int reclen;
+ unsigned int rectype;
+ int offset;
+ int flg;
+
+ if (!strcmp(name, "nvram_type"))
+ return "cfe";
+
+ size = NVRAM_SIZE;
+ buffer = &_nvdata[0];
+
+ ptr = buffer;
+ offset = 0;
+
+ /* Read the record type and length */
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
+ goto error;
+ }
+
+ while ((*ptr != ENV_TLV_TYPE_END) && (size > 1)) {
+
+ /* Adjust pointer for TLV type */
+ rectype = *(ptr);
+ offset++;
+ size--;
+
+ /*
+ * Read the length. It can be either 1 or 2 bytes
+ * depending on the code
+ */
+ if (rectype & ENV_LENGTH_8BITS) {
+ /* Read the record type and length - 8 bits */
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
+ goto error;
+ }
+ reclen = *(ptr);
+ size--;
+ offset++;
+ }
+ else {
+ /* Read the record type and length - 16 bits, MSB first */
+ if (_nvram_read(nv_buf, ptr,offset,2) != 2) {
+ goto error;
+ }
+ reclen = (((unsigned int) *(ptr)) << 8) + (unsigned int) *(ptr+1);
+ size -= 2;
+ offset += 2;
+ }
+
+ if (reclen > size)
+ break; /* should not happen, bad NVRAM */
+
+ switch (rectype) {
+ case ENV_TLV_TYPE_ENV:
+ /* Read the TLV data */
+ if (_nvram_read(nv_buf, ptr,offset,reclen) != reclen)
+ goto error;
+ flg = *ptr++;
+ envval = (unsigned char *) _strnchr(ptr,'=',(reclen-1));
+ if (envval) {
+ *envval++ = '\0';
+ memcpy(_valuestr,envval,(reclen-1)-(envval-ptr));
+ _valuestr[(reclen-1)-(envval-ptr)] = '\0';
+#if 0
+ printk(KERN_INFO "NVRAM:%s=%s\n", ptr, _valuestr);
+#endif
+ if(!strcmp(ptr, name)){
+ return _valuestr;
+ }
+ if((strlen(ptr) > 1) && !strcmp(&ptr[1], name))
+ return _valuestr;
+ }
+ break;
+
+ default:
+ /* Unknown TLV type, skip it. */
+ break;
+ }
+
+ /*
+ * Advance to next TLV
+ */
+
+ size -= (int)reclen;
+ offset += reclen;
+
+ /* Read the next record type */
+ ptr = buffer;
+ if (_nvram_read(nv_buf, ptr,offset,1) != 1)
+ goto error;
+ }
+
+error:
+ return NULL;
+
+}
+
--- a/drivers/firmware/broadcom/bcm47xx_nvram.c
+++ b/drivers/firmware/broadcom/bcm47xx_nvram.c
@@ -33,6 +33,8 @@ struct nvram_header {
static char nvram_buf[NVRAM_SPACE];
static size_t nvram_len;
static const u32 nvram_sizes[] = {0x6000, 0x8000, 0xF000, 0x10000};
+static int cfe_env;
+extern char *cfe_env_get(char *nv_buf, const char *name);
/**
* bcm47xx_nvram_is_valid - check for a valid NVRAM at specified memory
@@ -80,6 +82,26 @@ static int bcm47xx_nvram_find_and_copy(v
return -EEXIST;
}
+ cfe_env = 0;
+
+ /* XXX: hack for supporting the CFE environment stuff on WGT634U */
+ if (res_size >= 8 * 1024 * 1024) {
+ u32 *src = (u32 *)(flash_start + 8 * 1024 * 1024 - 0x2000);
+ u32 *dst = (u32 *)nvram_buf;
+
+ if ((*src & 0xff00ff) == 0x000001) {
+ printk("early_nvram_init: WGT634U NVRAM found.\n");
+
+ for (i = 0; i < 0x1ff0; i++) {
+ if (*src == 0xFFFFFFFF)
+ break;
+ *dst++ = *src++;
+ }
+ cfe_env = 1;
+ return 0;
+ }
+ }
+
/* TODO: when nvram is on nand flash check for bad blocks first. */
/* Try every possible flash size and check for NVRAM at its end */
@@ -190,6 +212,13 @@ int bcm47xx_nvram_getenv(const char *nam
if (!name)
return -EINVAL;
+ if (cfe_env) {
+ value = cfe_env_get(nvram_buf, name);
+ if (!value)
+ return -ENOENT;
+ return snprintf(val, val_len, "%s", value);
+ }
+
if (!nvram_len) {
err = nvram_init();
if (err)

View File

@ -0,0 +1,101 @@
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -38,6 +38,7 @@
#include <linux/ssb/ssb_embedded.h>
#include <linux/bcma/bcma_soc.h>
#include <asm/bmips.h>
+#include <linux/old_gpio_wdt.h>
#include <asm/bootinfo.h>
#include <asm/idle.h>
#include <asm/prom.h>
@@ -262,6 +263,33 @@ static struct fixed_phy_status bcm47xx_f
.duplex = DUPLEX_FULL,
};
+static struct gpio_wdt_platform_data gpio_wdt_data;
+
+static struct platform_device gpio_wdt_device = {
+ .name = "gpio-wdt",
+ .id = 0,
+ .dev = {
+ .platform_data = &gpio_wdt_data,
+ },
+};
+
+static int __init bcm47xx_register_gpio_watchdog(void)
+{
+ enum bcm47xx_board board = bcm47xx_board_get();
+
+ switch (board) {
+ case BCM47XX_BOARD_HUAWEI_E970:
+ pr_info("bcm47xx: detected Huawei E970 or similar, starting early gpio_wdt timer\n");
+ gpio_wdt_data.gpio = 7;
+ gpio_wdt_data.interval = HZ;
+ gpio_wdt_data.first_interval = HZ / 5;
+ return platform_device_register(&gpio_wdt_device);
+ default:
+ /* Nothing to do */
+ return 0;
+ }
+}
+
static int __init bcm47xx_register_bus_complete(void)
{
switch (bcm47xx_bus_type) {
@@ -283,6 +311,7 @@ static int __init bcm47xx_register_bus_c
bcm47xx_workarounds();
fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status);
+ bcm47xx_register_gpio_watchdog();
return 0;
}
device_initcall(bcm47xx_register_bus_complete);
--- a/arch/mips/configs/bcm47xx_defconfig
+++ b/arch/mips/configs/bcm47xx_defconfig
@@ -62,6 +62,7 @@ CONFIG_HW_RANDOM=y
CONFIG_GPIO_SYSFS=y
CONFIG_WATCHDOG=y
CONFIG_BCM47XX_WDT=y
+CONFIG_GPIO_WDT=y
CONFIG_SSB_DRIVER_GIGE=y
CONFIG_BCMA_DRIVER_GMAC_CMN=y
CONFIG_USB=y
--- a/drivers/ssb/embedded.c
+++ b/drivers/ssb/embedded.c
@@ -34,11 +34,36 @@ int ssb_watchdog_timer_set(struct ssb_bu
}
EXPORT_SYMBOL(ssb_watchdog_timer_set);
+#ifdef CONFIG_BCM47XX
+#include <bcm47xx_board.h>
+
+static bool ssb_watchdog_supported(void)
+{
+ enum bcm47xx_board board = bcm47xx_board_get();
+
+ /* The Huawei E970 has a hardware watchdog using a GPIO */
+ switch (board) {
+ case BCM47XX_BOARD_HUAWEI_E970:
+ return false;
+ default:
+ return true;
+ }
+}
+#else
+static bool ssb_watchdog_supported(void)
+{
+ return true;
+}
+#endif
+
int ssb_watchdog_register(struct ssb_bus *bus)
{
struct bcm47xx_wdt wdt = {};
struct platform_device *pdev;
+ if (!ssb_watchdog_supported())
+ return 0;
+
if (ssb_chipco_available(&bus->chipco)) {
wdt.driver_data = &bus->chipco;
wdt.timer_set = ssb_chipco_watchdog_timer_set_wdt;

View File

@ -0,0 +1,357 @@
This generic GPIO watchdog is used on Huawei E970 (bcm47xx)
Signed-off-by: Mathias Adam <m.adam--openwrt@adamis.de>
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -1803,6 +1803,15 @@ config WDT_MTX1
Hardware driver for the MTX-1 boards. This is a watchdog timer that
will reboot the machine after a 100 seconds timer expired.
+config GPIO_WDT
+ tristate "GPIO Hardware Watchdog"
+ help
+ Hardware driver for GPIO-controlled watchdogs. GPIO pin and
+ toggle interval settings are platform-specific. The driver
+ will stop toggling the GPIO (i.e. machine reboots) after a
+ 100 second timer expired and no process has written to
+ /dev/watchdog during that time.
+
config SIBYTE_WDOG
tristate "Sibyte SoC hardware watchdog"
depends on CPU_SB1
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -169,6 +169,7 @@ obj-$(CONFIG_RC32434_WDT) += rc32434_wdt
obj-$(CONFIG_INDYDOG) += indydog.o
obj-$(CONFIG_JZ4740_WDT) += jz4740_wdt.o
obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
+obj-$(CONFIG_GPIO_WDT) += old_gpio_wdt.o
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
--- /dev/null
+++ b/drivers/watchdog/old_gpio_wdt.c
@@ -0,0 +1,298 @@
+/*
+ * Driver for GPIO-controlled Hardware Watchdogs.
+ *
+ * Copyright (C) 2013 Mathias Adam <m.adam--linux@adamis.de>
+ *
+ * Replaces mtx1_wdt (driver for the MTX-1 Watchdog):
+ *
+ * (C) Copyright 2005 4G Systems <info@4g-systems.biz>,
+ * All Rights Reserved.
+ * http://www.4g-systems.biz
+ *
+ * (C) Copyright 2007 OpenWrt.org, Florian Fainelli <florian@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * Neither Michael Stickel nor 4G Systems admit liability nor provide
+ * warranty for any of this software. This material is provided
+ * "AS-IS" and at no charge.
+ *
+ * (c) Copyright 2005 4G Systems <info@4g-systems.biz>
+ *
+ * Release 0.01.
+ * Author: Michael Stickel michael.stickel@4g-systems.biz
+ *
+ * Release 0.02.
+ * Author: Florian Fainelli florian@openwrt.org
+ * use the Linux watchdog/timer APIs
+ *
+ * Release 0.03.
+ * Author: Mathias Adam <m.adam--linux@adamis.de>
+ * make it a generic gpio watchdog driver
+ *
+ * The Watchdog is configured to reset the MTX-1
+ * if it is not triggered for 100 seconds.
+ * It should not be triggered more often than 1.6 seconds.
+ *
+ * A timer triggers the watchdog every 5 seconds, until
+ * it is opened for the first time. After the first open
+ * it MUST be triggered every 2..95 seconds.
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/miscdevice.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/timer.h>
+#include <linux/completion.h>
+#include <linux/jiffies.h>
+#include <linux/watchdog.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <linux/gpio.h>
+#include <linux/old_gpio_wdt.h>
+
+static int ticks = 100 * HZ;
+
+static struct {
+ struct completion stop;
+ spinlock_t lock;
+ int running;
+ struct timer_list timer;
+ int queue;
+ int default_ticks;
+ unsigned long inuse;
+ unsigned gpio;
+ unsigned int gstate;
+ int interval;
+ int first_interval;
+} gpio_wdt_device;
+
+static void gpio_wdt_trigger(struct timer_list *unused)
+{
+ spin_lock(&gpio_wdt_device.lock);
+ if (gpio_wdt_device.running && ticks > 0)
+ ticks -= gpio_wdt_device.interval;
+
+ /* toggle wdt gpio */
+ gpio_wdt_device.gstate = !gpio_wdt_device.gstate;
+ gpio_set_value(gpio_wdt_device.gpio, gpio_wdt_device.gstate);
+
+ if (gpio_wdt_device.queue && ticks > 0)
+ mod_timer(&gpio_wdt_device.timer, jiffies + gpio_wdt_device.interval);
+ else
+ complete(&gpio_wdt_device.stop);
+ spin_unlock(&gpio_wdt_device.lock);
+}
+
+static void gpio_wdt_reset(void)
+{
+ ticks = gpio_wdt_device.default_ticks;
+}
+
+
+static void gpio_wdt_start(void)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_wdt_device.lock, flags);
+ if (!gpio_wdt_device.queue) {
+ gpio_wdt_device.queue = 1;
+ gpio_wdt_device.gstate = 1;
+ gpio_set_value(gpio_wdt_device.gpio, 1);
+ mod_timer(&gpio_wdt_device.timer, jiffies + gpio_wdt_device.first_interval);
+ }
+ gpio_wdt_device.running++;
+ spin_unlock_irqrestore(&gpio_wdt_device.lock, flags);
+}
+
+static int gpio_wdt_stop(void)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&gpio_wdt_device.lock, flags);
+ if (gpio_wdt_device.queue) {
+ gpio_wdt_device.queue = 0;
+ gpio_wdt_device.gstate = 0;
+ gpio_set_value(gpio_wdt_device.gpio, 0);
+ }
+ ticks = gpio_wdt_device.default_ticks;
+ spin_unlock_irqrestore(&gpio_wdt_device.lock, flags);
+ return 0;
+}
+
+/* Filesystem functions */
+
+static int gpio_wdt_open(struct inode *inode, struct file *file)
+{
+ if (test_and_set_bit(0, &gpio_wdt_device.inuse))
+ return -EBUSY;
+ return nonseekable_open(inode, file);
+}
+
+
+static int gpio_wdt_release(struct inode *inode, struct file *file)
+{
+ clear_bit(0, &gpio_wdt_device.inuse);
+ return 0;
+}
+
+static long gpio_wdt_ioctl(struct file *file, unsigned int cmd,
+ unsigned long arg)
+{
+ void __user *argp = (void __user *)arg;
+ int __user *p = (int __user *)argp;
+ unsigned int value;
+ static const struct watchdog_info ident = {
+ .options = WDIOF_CARDRESET,
+ .identity = "GPIO WDT",
+ };
+
+ switch (cmd) {
+ case WDIOC_GETSUPPORT:
+ if (copy_to_user(argp, &ident, sizeof(ident)))
+ return -EFAULT;
+ break;
+ case WDIOC_GETSTATUS:
+ case WDIOC_GETBOOTSTATUS:
+ put_user(0, p);
+ break;
+ case WDIOC_SETOPTIONS:
+ if (get_user(value, p))
+ return -EFAULT;
+ if (value & WDIOS_ENABLECARD)
+ gpio_wdt_start();
+ else if (value & WDIOS_DISABLECARD)
+ gpio_wdt_stop();
+ else
+ return -EINVAL;
+ return 0;
+ case WDIOC_KEEPALIVE:
+ gpio_wdt_reset();
+ break;
+ default:
+ return -ENOTTY;
+ }
+ return 0;
+}
+
+
+static ssize_t gpio_wdt_write(struct file *file, const char *buf,
+ size_t count, loff_t *ppos)
+{
+ if (!count)
+ return -EIO;
+ gpio_wdt_reset();
+ return count;
+}
+
+static const struct file_operations gpio_wdt_fops = {
+ .owner = THIS_MODULE,
+ .unlocked_ioctl = gpio_wdt_ioctl,
+ .open = gpio_wdt_open,
+ .write = gpio_wdt_write,
+ .release = gpio_wdt_release,
+};
+
+
+static struct miscdevice gpio_wdt_misc = {
+ .minor = WATCHDOG_MINOR,
+ .name = "watchdog",
+ .fops = &gpio_wdt_fops,
+};
+
+
+static int gpio_wdt_probe(struct platform_device *pdev)
+{
+ int ret;
+ struct gpio_wdt_platform_data *gpio_wdt_data = pdev->dev.platform_data;
+
+ gpio_wdt_device.gpio = gpio_wdt_data->gpio;
+ gpio_wdt_device.interval = gpio_wdt_data->interval;
+ gpio_wdt_device.first_interval = gpio_wdt_data->first_interval;
+ if (gpio_wdt_device.first_interval <= 0) {
+ gpio_wdt_device.first_interval = gpio_wdt_device.interval;
+ }
+
+ ret = gpio_request(gpio_wdt_device.gpio, "gpio-wdt");
+ if (ret < 0) {
+ dev_err(&pdev->dev, "failed to request gpio");
+ return ret;
+ }
+
+ spin_lock_init(&gpio_wdt_device.lock);
+ init_completion(&gpio_wdt_device.stop);
+ gpio_wdt_device.queue = 0;
+ clear_bit(0, &gpio_wdt_device.inuse);
+ timer_setup(&gpio_wdt_device.timer, gpio_wdt_trigger, 0L);
+ gpio_wdt_device.default_ticks = ticks;
+
+ gpio_wdt_start();
+ dev_info(&pdev->dev, "GPIO Hardware Watchdog driver (gpio=%i interval=%i/%i)\n",
+ gpio_wdt_data->gpio, gpio_wdt_data->first_interval, gpio_wdt_data->interval);
+ return 0;
+}
+
+static void gpio_wdt_remove(struct platform_device *pdev)
+{
+ /* FIXME: do we need to lock this test ? */
+ if (gpio_wdt_device.queue) {
+ gpio_wdt_device.queue = 0;
+ wait_for_completion(&gpio_wdt_device.stop);
+ }
+
+ gpio_free(gpio_wdt_device.gpio);
+ misc_deregister(&gpio_wdt_misc);
+}
+
+static struct platform_driver gpio_wdt_driver = {
+ .probe = gpio_wdt_probe,
+ .remove_new = gpio_wdt_remove,
+ .driver.name = "gpio-wdt",
+};
+
+static int __init gpio_wdt_init(void)
+{
+ return platform_driver_register(&gpio_wdt_driver);
+}
+arch_initcall(gpio_wdt_init);
+
+/*
+ * We do wdt initialization in two steps: arch_initcall probes the wdt
+ * very early to start pinging the watchdog (misc devices are not yet
+ * available), and later module_init() just registers the misc device.
+ */
+static int gpio_wdt_init_late(void)
+{
+ int ret;
+
+ ret = misc_register(&gpio_wdt_misc);
+ if (ret < 0) {
+ pr_err("GPIO_WDT: failed to register misc device\n");
+ return ret;
+ }
+ return 0;
+}
+#ifndef MODULE
+module_init(gpio_wdt_init_late);
+#endif
+
+static void __exit gpio_wdt_exit(void)
+{
+ platform_driver_unregister(&gpio_wdt_driver);
+}
+module_exit(gpio_wdt_exit);
+
+MODULE_AUTHOR("Michael Stickel, Florian Fainelli, Mathias Adam");
+MODULE_DESCRIPTION("Driver for GPIO hardware watchdogs");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
+MODULE_ALIAS("platform:gpio-wdt");
--- /dev/null
+++ b/include/linux/old_gpio_wdt.h
@@ -0,0 +1,21 @@
+/*
+ * Definitions for the GPIO watchdog driver
+ *
+ * Copyright (C) 2013 Mathias Adam <m.adam--linux@adamis.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef _GPIO_WDT_H_
+#define _GPIO_WDT_H_
+
+struct gpio_wdt_platform_data {
+ int gpio; /* GPIO line number */
+ int interval; /* watchdog reset interval in system ticks */
+ int first_interval; /* first wd reset interval in system ticks */
+};
+
+#endif /* _GPIO_WDT_H_ */

View File

@ -0,0 +1,30 @@
From 5c81397a0147ea59c778d1de14ef54e2268221f6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Wed, 8 Apr 2015 06:58:11 +0200
Subject: [PATCH] ssb: reject PCI writes setting CardBus bridge resources
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
If SoC has a CardBus we can set resources of device at slot 1 only. It's
impossigle to set bridge resources as it simply overwrites device 1
configuration and usually results in Data bus error-s.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/ssb/driver_pcicore.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -165,6 +165,10 @@ static int ssb_extpci_write_config(struc
WARN_ON(!pc->hostmode);
if (unlikely(len != 1 && len != 2 && len != 4))
goto out;
+ /* CardBus SoCs allow configuring dev 1 resources only */
+ if (extpci_core->cardbusmode && dev != 1 &&
+ off >= PCI_BASE_ADDRESS_0 && off <= PCI_BASE_ADDRESS_5)
+ goto out;
addr = get_cfgspace_addr(pc, bus, dev, func, off);
if (unlikely(!addr))
goto out;

View File

@ -0,0 +1,48 @@
--- a/drivers/pcmcia/yenta_socket.c
+++ b/drivers/pcmcia/yenta_socket.c
@@ -925,6 +925,8 @@ static struct cardbus_type cardbus_type[
static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
{
+/* WRT54G3G does not like this */
+#ifndef CONFIG_BCM47XX
int i;
unsigned long val;
u32 mask;
@@ -953,6 +955,9 @@ static unsigned int yenta_probe_irq(stru
mask = probe_irq_mask(val) & 0xffff;
return mask;
+#else
+ return 0;
+#endif
}
@@ -1033,6 +1038,10 @@ static void yenta_get_socket_capabilitie
else
socket->socket.irq_mask = 0;
+ /* irq mask probing is broken for the WRT54G3G */
+ if (socket->socket.irq_mask == 0)
+ socket->socket.irq_mask = 0x6f8;
+
dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n",
socket->socket.irq_mask, socket->cb_irq);
}
@@ -1264,6 +1273,15 @@ static int yenta_probe(struct pci_dev *d
dev_info(&dev->dev, "Socket status: %08x\n",
cb_readl(socket, CB_SOCKET_STATE));
+ /* Generate an interrupt on card insert/remove */
+ config_writew(socket, CB_SOCKET_MASK, CB_CSTSMASK | CB_CDMASK);
+
+ /* Set up Multifunction Routing Status Register */
+ config_writew(socket, 0x8C, 0x1000 /* MFUNC3 to GPIO3 */ | 0x2 /* MFUNC0 to INTA */);
+
+ /* Switch interrupts to parallelized */
+ config_writeb(socket, 0x92, 0x64);
+
yenta_fixup_parent_bridge(dev->subordinate);
/* Register it with the pcmcia layer.. */

View File

@ -0,0 +1,11 @@
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -394,7 +394,7 @@ static void ssb_pcicore_init_hostmode(st
/* Give some time to the PCI controller to configure itself with the new
* values. Not waiting at this point causes crashes of the machine.
*/
- mdelay(10);
+ mdelay(300);
register_pci_controller(&ssb_pcicore_controller);
}

View File

@ -0,0 +1,22 @@
--- a/drivers/bcma/driver_chipcommon_sflash.c
+++ b/drivers/bcma/driver_chipcommon_sflash.c
@@ -93,7 +93,7 @@ static void bcma_sflash_cmd(struct bcma_
bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n");
}
-const struct bcma_sflash_tbl_e *bcma_sflash_shrink_flash(u32 id)
+static const struct bcma_sflash_tbl_e *bcma_sflash_shrink_flash(u32 id)
{
enum bcm47xx_board board = bcm47xx_board_get();
const struct bcma_sflash_tbl_e *e;
--- a/drivers/firmware/broadcom/cfe_env.c
+++ b/drivers/firmware/broadcom/cfe_env.c
@@ -21,6 +21,8 @@
static char _nvdata[NVRAM_SIZE];
static char _valuestr[256];
+char *cfe_env_get(unsigned char *nv_buf, const char *name);
+
/*
* TLV types. These codes are used in the "type-length-value"
* encoding of the items stored in the NVRAM device (flash or EEPROM)

View File

@ -10,6 +10,7 @@ CPU_TYPE:=cortex-a53
SUBTARGETS:=generic
KERNEL_PATCHVER:=6.6
KERNEL_TESTING_PATCHVER:=6.12
define Target/Description
Build firmware images for Broadcom BCM4908 SoC family routers.

View File

@ -0,0 +1,290 @@
CONFIG_64BIT=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCMBCA=y
CONFIG_ARCH_BINFMT_ELF_EXTRA_PHDRS=y
CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y
CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_FORCE_MAX_ORDER=10
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_PKEY_BITS=3
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANTS_EXECMEM_LATE=y
CONFIG_ARCH_WANTS_NO_INSTR=y
CONFIG_ARCH_WANTS_THP_SWAP=y
CONFIG_ARM64=y
CONFIG_ARM64_4K_PAGES=y
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
CONFIG_ARM64_PA_BITS=48
CONFIG_ARM64_PA_BITS_48=y
CONFIG_ARM64_PLATFORM_DEVICES=y
CONFIG_ARM64_PTR_AUTH=y
CONFIG_ARM64_PTR_AUTH_KERNEL=y
CONFIG_ARM64_SVE=y
CONFIG_ARM64_TAGGED_ADDR_ABI=y
CONFIG_ARM64_VA_BITS=39
CONFIG_ARM64_VA_BITS_39=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_PSCI_FW=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_B53=y
CONFIG_BCM4908_ENET=y
CONFIG_BCM7038_WDT=y
CONFIG_BCM7XXX_PHY=y
CONFIG_BCM_NET_PHYLIB=y
CONFIG_BCM_PMB=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_PM=y
CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y
CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_CLK_BCM_63XX=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="earlycon=bcm63xx_uart,0xff800640 console=ttyS0,115200"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_IPROC=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
# CONFIG_COMPAT_32BIT_TIME is not set
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_RMAP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_AES_ARM64=y
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_INFO=y
CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_NEED_SYNC=y
CONFIG_DTC=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FRAME_POINTER=y
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=4
CONFIG_FUNCTION_ALIGNMENT_4B=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_DEVICES=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOREMAP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GRO_CELLS=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_BRCMSTB=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MSI_LIB=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_BCM63138=y
CONFIG_LEDS_GPIO=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LRU_GEN_WALKS_MMU=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MDIO_BCM_UNIMAC=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
# CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MTD_BRCM_U_BOOT=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_BRCMNAND=y
CONFIG_MTD_NAND_BRCMNAND_BCMBCA=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_OF_PARTS_BCM4908=y
# CONFIG_MTD_OF_PARTS_LINKSYS_NS is not set
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPLIT_CFE_BOOTFS=y
# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_BCM_SF2=y
CONFIG_NET_DSA_TAG_BRCM=y
CONFIG_NET_DSA_TAG_BRCM_COMMON=y
CONFIG_NET_DSA_TAG_BRCM_LEGACY=y
CONFIG_NET_DSA_TAG_BRCM_LEGACY_FCS=y
CONFIG_NET_DSA_TAG_BRCM_PREPEND=y
CONFIG_NET_DSA_TAG_NONE=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NO_IOPORT_MAP=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=y
CONFIG_NVMEM_SYSFS=y
CONFIG_NVMEM_U_BOOT_ENV=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PARTITION_PERCPU=y
CONFIG_PER_VMA_LOCK=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
CONFIG_PHYS_ADDR_T_64BIT=y
# CONFIG_PHY_BRCM_SATA is not set
CONFIG_PHY_BRCM_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_BCM4908=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_SUPPLY=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_RELOCATABLE=y
CONFIG_RFS_ACCEL=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
CONFIG_RPS=y
CONFIG_RUSTC_HAS_UNNECESSARY_TRANSMUTES=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_BCM63XX=y
CONFIG_SERIAL_BCM63XX_CONSOLE=y
CONFIG_SGL_ALLOC=y
CONFIG_SMP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPLIT_PMD_PTLOCKS=y
CONFIG_SPLIT_PTE_PTLOCKS=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TOOLS_SUPPORT_RELR=y
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_USB_SUPPORT=y
CONFIG_USER_STACKTRACE_SUPPORT=y
CONFIG_VDSO_GETRANDOM=y
CONFIG_VMAP_STACK=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZONE_DMA32=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

View File

@ -0,0 +1,23 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Feb 2021 22:01:03 +0100
Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: limit amount of GPIOs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Linux driver can't handle more than 64 GPIOs
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -341,7 +341,7 @@
gpio0: gpio-controller@500 {
compatible = "brcm,bcm6345-gpio";
reg-names = "dirout", "dat";
- reg = <0x500 0x28>, <0x528 0x28>;
+ reg = <0x500 0x8>, <0x528 0x8>;
#gpio-cells = <2>;
gpio-controller;

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@ -0,0 +1,30 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 12 Aug 2021 11:52:42 +0200
Subject: [PATCH] arm64: don't issue HVC on boot
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Broadcom's CFE loader seems to miss setting SCR_EL3.HCE which results in
generating an UNDEF and kernel panic on the first HVC.
HVC gets issued by kernels 5.12+ while booting, by kexec and KVM. Until
someone finds a workaround we have to avoid all above.
Workarounds: 0c93df9622d4 ("arm64: Initialise as nVHE before switching to VHE")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
arch/arm64/kernel/hyp-stub.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/kernel/hyp-stub.S
+++ b/arch/arm64/kernel/hyp-stub.S
@@ -252,7 +252,7 @@ SYM_FUNC_START(finalise_el2)
b.ne 1f
mov x0, #HVC_FINALISE_EL2
- hvc #0
+// hvc #0
1:
ret
SYM_FUNC_END(finalise_el2)

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@ -0,0 +1,46 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Feb 2021 23:59:26 +0100
Subject: [PATCH] net: dsa: bcm_sf2: enable GPHY for switch probing
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
GPHY needs to be enabled to succesfully probe & setup switch port
connected to it. Otherwise hardcoding PHY OUI would be required.
Before:
brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch wan (uninitialized): error -5 setting up PHY for tree 0, switch 0, port 7
After:
brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch wan (uninitialized): PHY [800c05c0.mdio--1:0c] driver [Generic PHY] (irq=POLL)
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/net/dsa/bcm_sf2.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1539,10 +1539,14 @@ static int bcm_sf2_sw_probe(struct platf
rev = reg_readl(priv, REG_PHY_REVISION);
priv->hw_params.gphy_rev = rev & PHY_REVISION_MASK;
+ bcm_sf2_gphy_enable_set(priv->dev->ds, true);
+
ret = b53_switch_register(dev);
if (ret)
goto out_mdio;
+ bcm_sf2_gphy_enable_set(priv->dev->ds, false);
+
dev_info(&pdev->dev,
"Starfighter 2 top: %x.%02x, core: %x.%02x, IRQs: %d, %d\n",
priv->hw_params.top_rev >> 8, priv->hw_params.top_rev & 0xff,

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@ -0,0 +1,30 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 16 Feb 2021 00:06:35 +0100
Subject: [PATCH] net: dsa: bcm_sf2: keep GPHY enabled on the BCM4908
Trying to access disabled PHY results in MDIO_READ_FAIL and:
[ 11.962886] brcm-sf2 80080000.switch wan: configuring for phy/internal link mode
[ 11.972500] 8021q: adding VLAN 0 to HW filter on device wan
[ 11.980205] ------------[ cut here ]------------
[ 11.984885] WARNING: CPU: 0 PID: 7 at phy_error+0x10/0x58
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/net/dsa/bcm_sf2.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1553,6 +1553,12 @@ static int bcm_sf2_sw_probe(struct platf
priv->hw_params.core_rev >> 8, priv->hw_params.core_rev & 0xff,
priv->irq0, priv->irq1);
+ /* BCM4908 has 5 GPHYs which means bcm_sf2_port_setup() will not enable
+ * GPHY when needed. Leave it enabled here.
+ */
+ if (priv->type == BCM4908_DEVICE_ID)
+ bcm_sf2_gphy_enable_set(priv->dev->ds, true);
+
return 0;
out_mdio:

View File

@ -12,6 +12,7 @@ CPU_TYPE:=cortex-a9
SUBTARGETS:=generic
KERNEL_PATCHVER:=6.6
KERNEL_TESTING_PATCHVER:=6.12
define Target/Description
Build firmware images for Broadcom based BCM47xx/53xx routers with ARM CPU, *not* MIPS.

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@ -0,0 +1,362 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCM_5301X=y
CONFIG_ARCH_BCM_53573=y
CONFIG_ARCH_BCM_IPROC=y
CONFIG_ARCH_BCM_NSP=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V6_V7=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
CONFIG_ARM_ERRATA_754322=y
CONFIG_ARM_ERRATA_764369=y
CONFIG_ARM_ERRATA_775420=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GLOBAL_TIMER=y
CONFIG_ARM_GT_INITIAL_PRESCALER_VAL=1
CONFIG_ARM_HAS_GROUP_RELOCS=y
CONFIG_ARM_HEAVY_MB=y
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_ARM_SP805_WATCHDOG=y
CONFIG_ARM_THUMB=y
CONFIG_ARM_TIMER_SP804=y
CONFIG_ARM_UNWIND=y
CONFIG_ARM_VIRT_EXT=y
CONFIG_ATAGS=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_B53=y
CONFIG_B53_MDIO_DRIVER=y
CONFIG_B53_SERDES=y
CONFIG_B53_SRAB_DRIVER=y
CONFIG_BCM47XX_NVRAM=y
CONFIG_BCM47XX_SPROM=y
CONFIG_BCM47XX_WDT=y
CONFIG_BCMA=y
CONFIG_BCMA_BLOCKIO=y
CONFIG_BCMA_DEBUG=y
CONFIG_BCMA_DRIVER_GMAC_CMN=y
CONFIG_BCMA_DRIVER_GPIO=y
CONFIG_BCMA_DRIVER_PCI=y
CONFIG_BCMA_FALLBACK_SPROM=y
CONFIG_BCMA_HOST_PCI=y
CONFIG_BCMA_HOST_PCI_POSSIBLE=y
CONFIG_BCMA_HOST_SOC=y
CONFIG_BCMA_SFLASH=y
# CONFIG_BCM_CYGNUS_PHY is not set
CONFIG_BCM_NET_PHYLIB=y
CONFIG_BCM_NS_THERMAL=y
CONFIG_BCM_SR_THERMAL=y
CONFIG_BGMAC=y
CONFIG_BGMAC_BCMA=y
CONFIG_BGMAC_PLATFORM=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOUNCE=y
CONFIG_BROADCOM_PHY=y
CONFIG_CACHE_L2X0=y
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
CONFIG_CLKSRC_MMIO=y
# CONFIG_CLK_BCM_NS2 is not set
CONFIG_CLK_BCM_NSP=y
# CONFIG_CLK_BCM_SR is not set
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_IPROC=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_PABRT_V7=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SPECTRE=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_V7=y
CONFIG_CRC16=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BCM_5301X=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
CONFIG_DEBUG_MISC=y
CONFIG_DEBUG_UART_8250=y
CONFIG_DEBUG_UART_8250_SHIFT=0
CONFIG_DEBUG_UART_PHYS=0x18000300
CONFIG_DEBUG_UART_VIRT=0xf1000300
CONFIG_DEBUG_USER=y
CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_OPS_HELPERS=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_AT24=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXTCON=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_DEVICES=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_VDSO_32=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_74X164=y
CONFIG_GPIO_BCM_XGS_IPROC=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GRO_CELLS=y
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_SMP=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_BCM2835=y
CONFIG_HZ_FIXED=0
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BCM_IPROC=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_SLAVE=y
# CONFIG_I2C_SLAVE_TESTUNIT is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_KMAP_LOCAL=y
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
# CONFIG_LEDS_BCM63138 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MDIO_BCM_IPROC=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_BUS_MUX=y
# CONFIG_MDIO_BUS_MUX_BCM_IPROC is not set
CONFIG_MDIO_BUS_MUX_MMIOREG=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGRATION=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_BCM47XXSFLASH=y
CONFIG_MTD_BCM47XX_PARTS=y
CONFIG_MTD_NAND_BRCMNAND=y
CONFIG_MTD_NAND_BRCMNAND_IPROC=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_OF_PARTS_LINKSYS_NS=y
CONFIG_MTD_PARSER_TPLINK_SAFELOADER=y
CONFIG_MTD_PARSER_TRX=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_SEAMA_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SRCU_NMI_SAFE=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_QCA8K=y
CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT=y
CONFIG_NET_DSA_TAG_BRCM=y
CONFIG_NET_DSA_TAG_BRCM_COMMON=y
CONFIG_NET_DSA_TAG_BRCM_LEGACY=y
CONFIG_NET_DSA_TAG_BRCM_LEGACY_FCS=y
CONFIG_NET_DSA_TAG_BRCM_PREPEND=y
CONFIG_NET_DSA_TAG_NONE=y
CONFIG_NET_DSA_TAG_QCA=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NR_CPUS=2
CONFIG_NVMEM=y
CONFIG_NVMEM_BRCM_NVRAM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_SYSFS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OUTER_CACHE=y
CONFIG_OUTER_CACHE_SYNC=y
CONFIG_PADATA=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI=y
CONFIG_PCIE_IPROC=y
CONFIG_PCIE_IPROC_BCMA=y
# CONFIG_PCIE_IPROC_PLATFORM is not set
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PER_VMA_LOCK=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
# CONFIG_PHY_BCM_NS_USB2 is not set
# CONFIG_PHY_BCM_NS_USB3 is not set
# CONFIG_PHY_BCM_SR_PCIE is not set
CONFIG_PHY_BCM_SR_USB=y
# CONFIG_PHY_BRCM_SATA is not set
# CONFIG_PHY_NS2_USB_DRD is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IPROC_GPIO=y
CONFIG_PINCTRL_NS=y
# CONFIG_PINCTRL_NS2_MUX is not set
CONFIG_PINCTRL_NSP_GPIO=y
CONFIG_PINCTRL_NSP_MUX=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_BCM_IPROC=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RUSTC_HAS_UNNECESSARY_TRANSMUTES=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SGL_ALLOC=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BCM_QSPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SWPHY=y
CONFIG_SWP_EMULATE=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
# CONFIG_VFP is not set
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

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@ -0,0 +1,52 @@
From ad1915e2070cf832bfb81dcbeb44b073c09e6dcc Mon Sep 17 00:00:00 2001
From: Rosen Penev <rosenp@gmail.com>
Date: Sun, 20 Oct 2024 18:51:47 -0700
Subject: [PATCH] ARM: dts: meraki-mr26: set mac address for gmac0
Currently this needs to be done in userspace.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://lore.kernel.org/r/20241021015147.172700-1-rosenp@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
.../dts/broadcom/bcm53015-meraki-mr26.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
--- a/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
+++ b/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
@@ -59,6 +59,9 @@
&gmac0 {
status = "okay";
+
+ nvmem-cells = <&macaddr_board_config_66>;
+ nvmem-cell-names = "mac-address";
};
&gmac1 {
@@ -102,8 +105,25 @@
};
partition@800000 {
+ compatible = "linux,ubi";
label = "ubi";
reg = <0x800000 0x7780000>;
+
+ volumes {
+ ubi-volume-board-config {
+ volname = "board-config";
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_board_config_66: macaddr@66 {
+ reg = <0x66 0x6>;
+ };
+ };
+ };
+ };
};
};
};

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@ -0,0 +1,67 @@
From c18e0b14b466fb0aa17c8ca6e61f16ba1254aebd Mon Sep 17 00:00:00 2001
From: Rosen Penev <rosenp@gmail.com>
Date: Sun, 24 Nov 2024 12:58:51 -0800
Subject: [PATCH] ARM: dts: meraki-mr26: wifi MACs in dts
OPENWRT HACK. Probably will not be accepted upstream.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
.../dts/broadcom/bcm53015-meraki-mr26.dts | 31 ++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
+++ b/arch/arm/boot/dts/broadcom/bcm53015-meraki-mr26.dts
@@ -60,7 +60,7 @@
&gmac0 {
status = "okay";
- nvmem-cells = <&macaddr_board_config_66>;
+ nvmem-cells = <&macaddr_board_config_66 0>;
nvmem-cell-names = "mac-address";
};
@@ -74,6 +74,33 @@
status = "disabled";
};
+&pcie0 {
+ wifi@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ compatible = "brcm,bcm43431";
+ nvmem-cells = <&macaddr_board_config_66 1>;
+ nvmem-cell-names = "mac-address";
+ };
+};
+
+&pcie1 {
+ wifi@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ compatible = "brcm,bcm43431";
+ nvmem-cells = <&macaddr_board_config_66 2>;
+ nvmem-cell-names = "mac-address";
+ };
+};
+
+&pcie2 {
+ wifi@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ compatible = "brcm,bcm43428";
+ nvmem-cells = <&macaddr_board_config_66 3>;
+ nvmem-cell-names = "mac-address";
+ };
+};
+
&nandcs {
partitions {
compatible = "fixed-partitions";
@@ -119,7 +146,9 @@
#size-cells = <1>;
macaddr_board_config_66: macaddr@66 {
+ compatible = "mac-base";
reg = <0x66 0x6>;
+ #nvmem-cell-cells = <1>;
};
};
};

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@ -0,0 +1,43 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 13 Apr 2021 18:25:20 +0200
Subject: [PATCH] mtd: parsers: trx: parse "firmware" MTD partitions only
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Parsing every partition with "compatible" set to "brcm,trx" results in
parsing both: firmware partition and failsafe partition on devices that
implement failsafe booting. This affects e.g. Linksys EA9500 which has:
partition@200000 {
reg = <0x0200000 0x01d00000>;
compatible = "linksys,ns-firmware", "brcm,trx";
};
partition@1f00000 {
reg = <0x01f00000 0x01d00000>;
compatible = "linksys,ns-firmware", "brcm,trx";
};
Check for MTD partition name "firmware" before parsing. Recently added
ofpart_linksys_ns.c creates "firmware" and "failsafe" depending on
bootloader setup.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/mtd/parsers/parser_trx.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/mtd/parsers/parser_trx.c
+++ b/drivers/mtd/parsers/parser_trx.c
@@ -92,6 +92,10 @@ static int parser_trx_parse(struct mtd_i
if (err != 0 && err != -EINVAL)
pr_err("failed to parse \"brcm,trx-magic\" DT attribute, using default: %d\n", err);
+ /* Don't parse any failsafe / backup partitions */
+ if (strcmp(mtd->name, "firmware"))
+ return -ENOENT;
+
parts = kcalloc(TRX_PARSER_MAX_PARTS, sizeof(struct mtd_partition),
GFP_KERNEL);
if (!parts)

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@ -0,0 +1,113 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sat, 1 Oct 2016 22:54:48 +0200
Subject: [PATCH] usb: xhci: add support for performing fake doorbell
Broadcom's Northstar XHCI controllers seem to need a special start
procedure to work correctly. There isn't any official documentation of
this, the problem is that controller doesn't detect any connected
devices with default setup. Moreover connecting USB device to controller
that doesn't run properly can cause SoC's watchdog issues.
A workaround that was successfully tested on multiple devices is to
perform a fake doorbell. This patch adds code for doing this and enables
it on BCM4708 family.
---
drivers/usb/host/xhci-plat.c | 6 +++++
drivers/usb/host/xhci.c | 63 +++++++++++++++++++++++++++++++++++++++++---
drivers/usb/host/xhci.h | 1 +
3 files changed, 67 insertions(+), 3 deletions(-)
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -77,8 +77,13 @@ static int xhci_priv_resume_quirk(struct
static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci)
{
struct xhci_plat_priv *priv = xhci_to_priv(xhci);
+ struct platform_device *pdev = to_platform_device(dev);
+ struct device_node *node = pdev->dev.of_node;
xhci->quirks |= priv->quirks;
+
+ if (node && of_machine_is_compatible("brcm,bcm4708"))
+ xhci->quirks |= XHCI_FAKE_DOORBELL;
}
/* called during probe() after chip reset completes */
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -163,6 +163,49 @@ int xhci_start(struct xhci_hcd *xhci)
return ret;
}
+/**
+ * xhci_fake_doorbell - Perform a fake doorbell on a specified slot
+ *
+ * Some controllers require a fake doorbell to start correctly. Without that
+ * they simply don't detect any devices.
+ */
+static int xhci_fake_doorbell(struct xhci_hcd *xhci, int slot_id)
+{
+ u32 temp;
+
+ /* Alloc a virt device for that slot */
+ if (!xhci_alloc_virt_device(xhci, slot_id, NULL, GFP_NOIO)) {
+ xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
+ return -ENOMEM;
+ }
+
+ /* Ring fake doorbell for slot_id ep 0 */
+ xhci_ring_ep_doorbell(xhci, slot_id, 0, 0);
+ usleep_range(1000, 1500);
+
+ /* Read the status to check if HSE is set or not */
+ temp = readl(&xhci->op_regs->status);
+
+ /* Clear HSE if set */
+ if (temp & STS_FATAL) {
+ xhci_dbg(xhci, "HSE problem detected, status: 0x%08x\n", temp);
+ temp &= ~0x1fff;
+ temp |= STS_FATAL;
+ writel(temp, &xhci->op_regs->status);
+ usleep_range(1000, 1500);
+ readl(&xhci->op_regs->status);
+ }
+
+ /* Free virt device */
+ xhci_free_virt_device(xhci, xhci->devs[slot_id], slot_id);
+
+ /* We're done if controller is already running */
+ if (readl(&xhci->op_regs->command) & CMD_RUN)
+ return 0;
+
+ return xhci_start(xhci);
+}
+
/*
* Reset a halted HC.
*
@@ -500,6 +543,15 @@ static int xhci_run_finished(struct xhci
return -ENODEV;
}
+ if (xhci->quirks & XHCI_FAKE_DOORBELL) {
+ int err = xhci_fake_doorbell(xhci, 1);
+ if (err) {
+ xhci_halt(xhci);
+ spin_unlock_irqrestore(&xhci->lock, flags);
+ return err;
+ }
+ }
+
xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
if (xhci->quirks & XHCI_NEC_HOST)
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1630,6 +1630,7 @@ struct xhci_hcd {
#define XHCI_CDNS_SCTX_QUIRK BIT_ULL(48)
#define XHCI_ETRON_HOST BIT_ULL(49)
#define XHCI_LIMIT_ENDPOINT_INTERVAL_9 BIT_ULL(50)
+#define XHCI_FAKE_DOORBELL BIT_ULL(51)
unsigned int num_active_eps;
unsigned int limit_active_eps;

View File

@ -0,0 +1,111 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 24 Sep 2014 22:14:07 +0200
Subject: [PATCH] ARM: BCM5301X: Disable MMU and Dcache during decompression
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Broadcom devices have broken CFE (bootloader) that leaves hardware in an
invalid state. It causes problems with booting Linux. On Northstar
devices kernel was randomly hanging in ~25% of tries during early init.
Hangs used to happen at random places in the start_kernel. On BCM53573
kernel doesn't even seem to start booting.
To workaround this problem we need to do following very early:
1) Clear 2 following bits in the SCTLR register:
#define CR_M (1 << 0) /* MMU enable */
#define CR_C (1 << 2) /* Dcache enable */
2) Flush the whole D-cache
3) Disable L2 cache
Unfortunately this patch is not upstreamable as it does above things
unconditionally. We can't check if we are running on Broadcom platform
in any safe way and doing such hacks with ARCH_MULTI_V7 is unacceptable
as it could break other devices support.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -30,6 +30,11 @@ ifeq ($(CONFIG_ARCH_ACORN),y)
OBJS += ll_char_wr.o font.o
endif
+ifeq ($(CONFIG_ARCH_BCM_5301X),y)
+OBJS += head-bcm_5301x-mpcore.o
+OBJS += cache-v7-min.o
+endif
+
ifeq ($(CONFIG_ARCH_SA1100),y)
OBJS += head-sa1100.o
endif
--- /dev/null
+++ b/arch/arm/boot/compressed/head-bcm_5301x-mpcore.S
@@ -0,0 +1,37 @@
+/*
+ *
+ * Platform specific tweaks. This is merged into head.S by the linker.
+ *
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/cp15.h>
+
+ .section ".start", "ax"
+
+/*
+ * This code section is spliced into the head code by the linker
+ */
+
+__plat_uncompress_start:
+
+ @ Preserve r8/r7 i.e. kernel entry values
+ mov r12, r8
+
+ @ Clear MMU enable and Dcache enable bits
+ mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR
+ bic r0, #CR_C|CR_M
+ mcr p15, 0, r0, c1, c0, 0 @ Write SCTLR
+ nop
+
+ @ Call the cache invalidation routine
+ bl v7_flush_dcache_all
+ nop
+ mov r0,#0
+ ldr r3, =0x19022000 @ L2 cache controller, control reg
+ str r0, [r3, #0x100] @ Disable L2 cache
+ nop
+
+ @ Restore
+ mov r8, r12
--- a/arch/arm/boot/compressed/cache-v7-min.S
+++ b/arch/arm/boot/compressed/cache-v7-min.S
@@ -12,6 +12,7 @@
#include <linux/linkage.h>
#include <linux/init.h>
+#include <asm/assembler.h>
__INIT
@@ -63,7 +64,7 @@ loop2:
ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11
THUMB( lsl r6, r9, r2 )
THUMB( orr r11, r11, r6 ) @ factor index number into r11
- mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
+ mcr p15, 0, r11, c7, c6, 2 @ clean & invalidate by set/way
subs r9, r9, #1 @ decrement the index
bge loop2
subs r4, r4, #1 @ decrement the way
--- a/arch/arm/boot/compressed/vmlinux.lds.S
+++ b/arch/arm/boot/compressed/vmlinux.lds.S
@@ -41,6 +41,7 @@ SECTIONS
*(.start)
*(.text)
*(.text.*)
+ *(.init.text)
ARM_STUBS_TEXT
}
.table : ALIGN(4) {

View File

@ -0,0 +1,675 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Subject: [PATCH] ARM: dts: BCM5301X: Specify switch ports for remaining
devices
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac56u.dts
@@ -92,3 +92,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac68u.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-asus-rt-ac68u.dts
@@ -83,3 +83,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4708-buffalo-wzr-1750dhp.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-buffalo-wzr-1750dhp.dts
@@ -149,3 +149,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6300-v1.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6300-v1.dts
@@ -46,3 +46,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts
@@ -43,3 +43,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4708-netgear-r6300-v2.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4708-netgear-r6300-v2.dts
@@ -86,3 +86,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm47081-asus-rt-n18u.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47081-asus-rt-n18u.dts
@@ -77,3 +77,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac87u.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac87u.dts
@@ -77,6 +77,40 @@
status = "okay";
};
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@5 {
+ status = "disabled";
+ };
+
+ port@7 {
+ label = "cpu";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
+
&nandcs {
partitions {
compatible = "fixed-partitions";
--- a/arch/arm/boot/dts/broadcom/bcm4709-buffalo-wxr-1900dhp.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-buffalo-wxr-1900dhp.dts
@@ -130,3 +130,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm4709-netgear-r7000.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-netgear-r7000.dts
@@ -104,3 +104,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm47094-netgear-r8500.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-netgear-r8500.dts
@@ -94,3 +94,41 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ status = "disabled";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ label = "cpu";
+ };
+ };
+};
--- a/arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts
@@ -38,6 +38,40 @@
status = "okay";
};
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
+
&nandcs {
partitions {
compatible = "fixed-partitions";
--- a/arch/arm/boot/dts/broadcom/bcm47081-tplink-archer-c5-v2.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47081-tplink-archer-c5-v2.dts
@@ -91,6 +91,44 @@
};
};
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
+
&spi_nor {
status = "okay";
--- a/arch/arm/boot/dts/broadcom/bcm4709-tplink-archer-c9-v1.dts
+++ b/arch/arm/boot/dts/broadcom/bcm4709-tplink-archer-c9-v1.dts
@@ -100,6 +100,44 @@
vcc-gpio = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
};
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "wan";
+ };
+
+ port@1 {
+ label = "lan1";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan3";
+ };
+
+ port@4 {
+ label = "lan4";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
+
&spi_nor {
status = "okay";
--- a/arch/arm/boot/dts/broadcom/bcm47081-buffalo-wzr-900dhp.dts
+++ b/arch/arm/boot/dts/broadcom/bcm47081-buffalo-wzr-900dhp.dts
@@ -107,3 +107,42 @@
&usb3_phy {
status = "okay";
};
+
+&srab {
+ status = "okay";
+
+ ports {
+ port@0 {
+ label = "lan1";
+ };
+
+ port@1 {
+ label = "lan2";
+ };
+
+ port@2 {
+ label = "lan3";
+ };
+
+ port@3 {
+ label = "lan4";
+ };
+
+ port@4 {
+ label = "wan";
+ };
+
+ port@5 {
+ label = "cpu";
+ };
+
+ port@7 {
+ status = "disabled";
+ };
+
+ port@8 {
+ status = "disabled";
+ };
+ };
+};
+

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@ -0,0 +1,64 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Subject: [PATCH] ARM: BCM5301X: Add DT for Netgear R7900
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
--- a/arch/arm/boot/dts/broadcom/Makefile
+++ b/arch/arm/boot/dts/broadcom/Makefile
@@ -69,6 +69,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm4709-buffalo-wxr-1900dhp.dtb \
bcm4709-linksys-ea9200.dtb \
bcm4709-netgear-r7000.dtb \
+ bcm4709-netgear-r7900.dtb \
bcm4709-netgear-r8000.dtb \
bcm4709-tplink-archer-c9-v1.dtb \
bcm47094-asus-rt-ac3100.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/broadcom/bcm4709-netgear-r7900.dts
@@ -0,0 +1,42 @@
+/*
+ * Broadcom BCM470X / BCM5301X ARM platform code.
+ * DTS for Netgear R7900
+ *
+ * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+
+/dts-v1/;
+
+#include "bcm4709.dtsi"
+#include "bcm5301x-nand-cs0-bch8.dtsi"
+
+/ {
+ compatible = "netgear,r7900", "brcm,bcm4709", "brcm,bcm4708";
+ model = "Netgear R7900";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ memory {
+ reg = <0x00000000 0x08000000
+ 0x88000000 0x08000000>;
+ };
+
+ axi@18000000 {
+ usb3@23000 {
+ reg = <0x00023000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ vcc-gpio = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

View File

@ -0,0 +1,52 @@
From 35bba88e75311242841dde83073c211310ec0259 Mon Sep 17 00:00:00 2001
From: Matthew Hagan <mnhagan88@gmail.com>
Date: Wed, 4 May 2022 08:07:06 +0100
Subject: [PATCH] bcm53xx: partition fixups for Meraki MX64/MX65
We need to enlarge the u-boot partition to add extra features like UBI
booting. The shmoo and newly created env partitions can easily be moved
to the nvram partition. This fixup allows u-boot to be enlarged to up to
1MiB.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
---
arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi | 20 ++++++++++++--------
1 file changed, 12 insertions(+), 8 deletions(-)
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
@@ -84,13 +84,7 @@
partition@0 {
label = "u-boot";
- reg = <0x0 0x80000>;
- read-only;
- };
-
- partition@80000 {
- label = "shmoo";
- reg = <0x80000 0x80000>;
+ reg = <0x0 0x100000>;
read-only;
};
@@ -101,7 +95,18 @@
partition@400000 {
label = "nvram";
- reg = <0x400000 0x100000>;
+ reg = <0x400000 0x40000>;
+ };
+
+ partition@440000 {
+ label = "u-boot-env";
+ reg = <0x440000 0x40000>;
+ };
+
+ partition@480000 {
+ label = "shmoo";
+ reg = <0x480000 0x80000>;
+ read-only;
};
partition@500000 {

View File

@ -0,0 +1,83 @@
From 9f4e68261b89df87457f46999c471d11754b5de2 Mon Sep 17 00:00:00 2001
From: Lech Perczak <lech.perczak@gmail.com>
Date: Sun, 6 Oct 2024 15:57:44 +0200
Subject: [PATCH] bcm53xx: dts: meraki-mx6x: add OpenWrt-specific LED aliases
Assign green power LED for "boot", "running", orange for "upgrade" and
red for "failsafe" functions - the same as done for MR33 and MR74.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
---
arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi | 9 ++++++++-
arch/arm/boot/dts/broadcom/bcm958625-meraki-kingpin.dtsi | 8 +++++++-
.../boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi | 4 ++--
3 files changed, 17 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi
@@ -8,6 +8,13 @@
#include "bcm958625-meraki-mx6x-common.dtsi"
/ {
+ aliases {
+ led-boot = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_fault;
+ led-failsafe = &led_failsafe;
+ };
+
keys {
compatible = "gpio-keys-polled";
autorepeat;
@@ -55,7 +62,7 @@
gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
};
- led-4 {
+ led_fault: led-4 {
/* amber:power */
function = LED_FUNCTION_FAULT;
color = <LED_COLOR_ID_AMBER>;
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-kingpin.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-kingpin.dtsi
@@ -8,6 +8,12 @@
#include "bcm958625-meraki-mx6x-common.dtsi"
/ {
+ aliases {
+ led-boot = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_fault;
+ led-failsafe = &led_failsafe;
+ };
keys {
compatible = "gpio-keys-polled";
@@ -104,7 +110,7 @@
gpios = <&gpioa 29 GPIO_ACTIVE_LOW>;
};
- led-a {
+ led_fault: led-a {
/* amber:power */
function = LED_FUNCTION_FAULT;
color = <LED_COLOR_ID_AMBER>;
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
@@ -14,14 +14,14 @@
pwm-leds {
compatible = "pwm-leds";
- led-1 {
+ led_failsafe: led-1 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_RED>;
pwms = <&pwm 1 50000>;
max-brightness = <255>;
};
- led-2 {
+ led_power: led-2 {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
pwms = <&pwm 2 50000>;

View File

@ -0,0 +1,59 @@
From 2a2af518266a29323cf30c3f9ba9ef2ceb1dd84b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
Date: Thu, 16 Oct 2014 20:52:16 +0200
Subject: [PATCH] UBI: Detect EOF mark and erase all remaining blocks
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/mtd/ubi/attach.c | 5 +++++
drivers/mtd/ubi/io.c | 4 ++++
drivers/mtd/ubi/ubi.h | 1 +
3 files changed, 10 insertions(+)
--- a/drivers/mtd/ubi/attach.c
+++ b/drivers/mtd/ubi/attach.c
@@ -82,6 +82,9 @@ static int self_check_ai(struct ubi_devi
#define AV_ADD BIT(1)
#define AV_FIND_OR_ADD (AV_FIND | AV_ADD)
+/* Set on finding block with 0xdeadc0de, indicates erasing all blocks behind */
+bool erase_all_next;
+
/**
* find_or_add_av - internal function to find a volume, add a volume or do
* both (find and add if missing).
@@ -1580,6 +1583,8 @@ int ubi_attach(struct ubi_device *ubi, i
if (!ai)
return -ENOMEM;
+ erase_all_next = false;
+
#ifdef CONFIG_MTD_UBI_FASTMAP
/* On small flash devices we disable fastmap in any case. */
if ((int)mtd_div_by_eb(ubi->mtd->size, ubi->mtd) <= UBI_FM_MAX_START) {
--- a/drivers/mtd/ubi/io.c
+++ b/drivers/mtd/ubi/io.c
@@ -729,6 +729,10 @@ int ubi_io_read_ec_hdr(struct ubi_device
}
magic = be32_to_cpu(ec_hdr->magic);
+ if (magic == 0xdeadc0de)
+ erase_all_next = true;
+ if (erase_all_next)
+ return read_err ? UBI_IO_FF_BITFLIPS : UBI_IO_FF;
if (magic != UBI_EC_HDR_MAGIC) {
if (mtd_is_eccerr(read_err))
return UBI_IO_BAD_HDR_EBADMSG;
--- a/drivers/mtd/ubi/ubi.h
+++ b/drivers/mtd/ubi/ubi.h
@@ -820,6 +820,7 @@ extern struct mutex ubi_devices_mutex;
extern struct blocking_notifier_head ubi_notifiers;
/* attach.c */
+extern bool erase_all_next;
struct ubi_ainf_peb *ubi_alloc_aeb(struct ubi_attach_info *ai, int pnum,
int ec);
void ubi_free_aeb(struct ubi_attach_info *ai, struct ubi_ainf_peb *aeb);

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@ -0,0 +1,36 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 20 Jun 2022 10:01:18 +0200
Subject: [PATCH] net: disable GRO by default
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
In many cases GRO improves network performance however it comes at a
cost of chacksums calculations. In case of slow CPU and missing hardware
csum calculation support GRO can actually decrease network speed.
On BCM4708 *disabling* GRO results in following NAT masquarade speed
changes:
1. 364 Mb/s → 396 Mb/s (packet steering disabled)
2. 341 Mb/s → 566 Mb/s (packet steering enabled)
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
include/linux/netdev_features.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/include/linux/netdev_features.h
+++ b/include/linux/netdev_features.h
@@ -235,10 +235,10 @@ static inline int find_next_netdev_featu
#define NETIF_F_UPPER_DISABLES NETIF_F_LRO
/* changeable features with no special hardware requirements */
-#define NETIF_F_SOFT_FEATURES (NETIF_F_GSO | NETIF_F_GRO | NETIF_F_GRO_FRAGLIST)
+#define NETIF_F_SOFT_FEATURES (NETIF_F_GSO)
/* Changeable features with no special hardware requirements that defaults to off. */
-#define NETIF_F_SOFT_FEATURES_OFF (NETIF_F_GRO_UDP_FWD)
+#define NETIF_F_SOFT_FEATURES_OFF (NETIF_F_GRO_UDP_FWD | NETIF_F_GRO | NETIF_F_GRO_FRAGLIST)
#define NETIF_F_VLAN_FEATURES (NETIF_F_HW_VLAN_CTAG_FILTER | \
NETIF_F_HW_VLAN_CTAG_RX | \

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@ -0,0 +1,80 @@
From 6f1c62440eb6846cb8045d7a5480ec7bbe47c96f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Aug 2016 10:30:41 +0200
Subject: [PATCH] BCM53573 minor hacks
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm/boot/dts/broadcom/bcm53573.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm53573.dtsi
@@ -54,6 +54,7 @@
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&ilp>;
};
clocks {
--- a/drivers/bcma/main.c
+++ b/drivers/bcma/main.c
@@ -331,14 +331,6 @@ static int bcma_register_devices(struct
}
#endif
-#ifdef CONFIG_BCMA_SFLASH
- if (bus->drv_cc.sflash.present) {
- err = platform_device_register(&bcma_sflash_dev);
- if (err)
- bcma_err(bus, "Error registering serial flash\n");
- }
-#endif
-
#ifdef CONFIG_BCMA_NFLASH
if (bus->drv_cc.nflash.present) {
err = platform_device_register(&bcma_nflash_dev);
@@ -418,6 +410,14 @@ int bcma_bus_register(struct bcma_bus *b
bcma_register_core(bus, core);
}
+#ifdef CONFIG_BCMA_SFLASH
+ if (bus->drv_cc.sflash.present) {
+ err = platform_device_register(&bcma_sflash_dev);
+ if (err)
+ bcma_err(bus, "Error registering serial flash\n");
+ }
+#endif
+
/* Try to get SPROM */
err = bcma_sprom_get(bus);
if (err == -ENOENT) {
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -14,6 +14,7 @@
#include <linux/smp.h>
#include <linux/cpu.h>
#include <linux/cpu_pm.h>
+#include <linux/clk.h>
#include <linux/clockchips.h>
#include <linux/clocksource.h>
#include <linux/clocksource_ids.h>
@@ -1070,6 +1071,16 @@ static void __init arch_timer_of_configu
if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
arch_timer_rate = rate;
+ /* Get clk rate through clk driver if present */
+ if (!arch_timer_rate) {
+ struct clk *clk = of_clk_get(np, 0);
+
+ if (!IS_ERR(clk)) {
+ if (!clk_prepare_enable(clk))
+ arch_timer_rate = clk_get_rate(clk);
+ }
+ }
+
/* Check the timer frequency. */
if (validate_timer_rate())
pr_warn("frequency not available\n");

View File

@ -0,0 +1,61 @@
From 64ef5f454e167bb66cf70104f033c3d71e6ef9c0 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Sun, 9 Nov 2025 12:52:44 +0100
Subject: [PATCH] mtd: mtdpart: ignore error -ENOENT from parsers on
subpartitions
Commit 5c2f7727d437 ("mtd: mtdpart: check for subpartitions parsing
result") introduced some kind of regression with parser on subpartitions
where if a parser emits an error then the entire parsing process from the
upper parser fails and partitions are deleted.
Not checking for error in subpartitions was originally intended as
special parser can emit error also in the case of the partition not
correctly init (for example a wiped partition) or special case where the
partition should be skipped due to some ENV variables externally
provided (from bootloader for example)
One example case is the TRX partition where, in the context of a wiped
partition, returns a -ENOENT as the trx_magic is not found in the
expected TRX header (as the partition is wiped)
To better handle this and still keep some kind of error tracking (for
example to catch -ENOMEM errors or -EINVAL errors), permit parser on
subpartition to emit -ENOENT error, print a debug log and skip them
accordingly.
This results in giving better tracking of the status of the parser
(instead of returning just 0, dropping any kind of signal that there is
something wrong with the parser) and to some degree restore the original
logic of the subpartitions parse.
(worth to notice that some special partition might have all the special
header present for the parser and declare 0 partition in it, this is why
it would be wrong to simply return 0 in the case of a special partition
that is NOT init for the scanning parser)
Cc: stable@vger.kernel.org
Fixes: 5c2f7727d437 ("mtd: mtdpart: check for subpartitions parsing result")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/mtd/mtdpart.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -425,9 +425,12 @@ int add_mtd_partitions(struct mtd_info *
mtd_add_partition_attrs(child);
- /* Look for subpartitions */
+ /* Look for subpartitions (skip if no maching parser found) */
ret = parse_mtd_partitions(child, parts[i].types, NULL);
- if (ret < 0) {
+ if (ret < 0 && ret == -ENOENT) {
+ pr_debug("Skip parsing subpartitions: %d\n", ret);
+ continue;
+ } else if (ret < 0) {
pr_err("Failed to parse subpartitions: %d\n", ret);
goto err_del_partitions;
}

View File

@ -53,7 +53,7 @@ int mtd_get_squashfs_len(struct mtd_info *master,
retlen = le64_to_cpu(sb.bytes_used);
if (retlen <= 0) {
pr_alert("squashfs is empty in \"%s\"\n", master->name);
return -ENODEV;
return -ENOENT;
}
if (offset + retlen > master->size) {
@ -124,7 +124,7 @@ int mtd_find_rootfs_from(struct mtd_info *mtd,
return 0;
}
return -ENODEV;
return -ENOENT;
}
EXPORT_SYMBOL_GPL(mtd_find_rootfs_from);

View File

@ -45,7 +45,7 @@ static inline int mtd_get_squashfs_len(struct mtd_info *master,
size_t offset,
size_t *squashfs_len)
{
return -ENODEV;
return -ENOENT;
}
static inline int mtd_check_rootfs_magic(struct mtd_info *mtd, size_t offset,
@ -60,7 +60,7 @@ static inline int mtd_find_rootfs_from(struct mtd_info *mtd,
size_t *ret_offset,
enum mtdsplit_part_type *type)
{
return -ENODEV;
return -ENOENT;
}
#endif /* CONFIG_MTD_SPLIT */

View File

@ -241,7 +241,7 @@ static int mtdsplit_parse_elf(struct mtd_info *mtd,
if (rootfs_offset == mtd->size) {
pr_debug("no rootfs found in \"%s\"\n", mtd->name);
return -ENODEV;
return -ENOENT;
}
parts = kzalloc(ELF_NR_PARTS * sizeof(*parts), GFP_KERNEL);

View File

@ -210,7 +210,7 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
of_property_read_string(np, "openwrt,cmdline-match", &cmdline_match);
if (cmdline_match && !strstr(saved_command_line, cmdline_match))
return 0;
return -ENOENT;
of_property_read_u32(np, "openwrt,fit-offset", &offset_start);
@ -222,12 +222,12 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
if (ret) {
pr_err("read error in \"%s\" at offset 0x%llx\n",
mtd->name, (unsigned long long) offset);
return 0;
return ret;
}
if (retlen != hdr_len) {
pr_err("short read in \"%s\"\n", mtd->name);
return 0;
return -EIO;
}
/* Check the magic - see if this is a FIT image */
@ -247,7 +247,7 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
if (fit_size == 0) {
pr_err("FIT image in \"%s\" at offset %llx has null size\n",
mtd->name, (unsigned long long) fit_offset);
return 0;
return -ENOENT;
}
/*
@ -267,14 +267,14 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
if (ret) {
pr_info("no rootfs found after FIT image in \"%s\"\n",
mtd->name);
return 0;
return ret;
}
rootfs_size = mtd->size - rootfs_offset;
parts = kzalloc(2 * sizeof(*parts), GFP_KERNEL);
if (!parts)
return 0;
return -ENOMEM;
parts[0].name = KERNEL_PART_NAME;
parts[0].offset = fit_offset;
@ -297,14 +297,14 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
if (ret) {
pr_err("read error in \"%s\" at offset 0x%llx\n",
mtd->name, (unsigned long long) offset);
return 0;
return ret;
}
images_noffset = fdt_path_offset(fit, FIT_IMAGES_PATH);
if (images_noffset < 0) {
pr_err("Can't find images parent node '%s' (%s)\n",
FIT_IMAGES_PATH, fdt_strerror(images_noffset));
return 0;
return -ENOENT;
}
for (ndepth = 0,
@ -324,7 +324,7 @@ mtdsplit_fit_parse(struct mtd_info *mtd,
parts = kzalloc(sizeof(*parts), GFP_KERNEL);
if (!parts)
return 0;
return -ENOMEM;
parts[0].name = ROOTFS_SPLIT_NAME;
parts[0].offset = fit_offset + mtd_roundup_to_eb(max_size, mtd);

View File

@ -147,7 +147,7 @@ static int __mtdsplit_parse_jimage(struct mtd_info *master,
if (jimage_size == 0) {
pr_debug("no jImage found in \"%s\"\n", master->name);
ret = -ENODEV;
ret = -ENOENT;
goto err_free_buf;
}
@ -186,7 +186,7 @@ static int __mtdsplit_parse_jimage(struct mtd_info *master,
if (rootfs_size == 0) {
pr_debug("no rootfs found in \"%s\"\n", master->name);
ret = -ENODEV;
ret = -ENOENT;
goto err_free_buf;
}

View File

@ -247,11 +247,7 @@ mtdsplit_mstcboot_parse(struct mtd_info *mtd,
ret = mstcboot_parse_image_parts(mtd, pparts);
exit:
/*
* return 0 when ret=-ENODEV, to prevent deletion of
* parent mtd partitions on Linux 6.7 and later
*/
return ret == -ENODEV ? 0 : ret;
return ret;
}
static const struct of_device_id mtdsplit_mstcboot_of_match_table[] = {

View File

@ -100,7 +100,7 @@ mtdsplit_parse_trx(struct mtd_info *master,
if (trx_size == 0) {
pr_debug("no trx header found in \"%s\"\n", master->name);
ret = -ENODEV;
ret = -ENOENT;
goto err;
}
@ -111,7 +111,7 @@ mtdsplit_parse_trx(struct mtd_info *master,
if (rootfs_size == 0) {
pr_debug("no rootfs found in \"%s\"\n", master->name);
ret = -ENODEV;
ret = -ENOENT;
goto err;
}

View File

@ -226,7 +226,7 @@ static int __mtdsplit_parse_uimage(struct mtd_info *master,
if (rootfs_size == 0) {
pr_debug("no rootfs found in \"%s\"\n", master->name);
ret = -ENODEV;
ret = -ENOENT;
goto err_free_buf;
}

View File

@ -229,8 +229,8 @@ Subject: [PATCH] mtd: mtdsplit support
+ mtd_partition_split(master, child);
mtd_add_partition_attrs(child);
/* Look for subpartitions */
@@ -443,31 +588,6 @@ err_del_partitions:
/* Look for subpartitions (skip if no maching parser found) */
@@ -446,31 +591,6 @@ err_del_partitions:
return ret;
}

View File

@ -22,7 +22,7 @@ define Device/Default
KERNEL_INITRAMFS = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
KERNEL_LOADADDR = $(loadaddr-y)
FILESYSTEMS := squashfs
FILESYSTEMS := squashfs erofs
DEVICE_DTS_DIR := $(DTS_DIR)
NETGEAR_ENC_MODEL :=
NETGEAR_ENC_REGION :=

View File

@ -2374,7 +2374,7 @@ define Device/teltonika_rutc50
KERNEL_IN_UBI := 1
UBINIZE_OPTS := -E 5
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3 kmod-usb-net-qmi-wwan \
kmod-usb-serial-option kmod-gpio-nxp-74hc164
kmod-usb-serial-option kmod-gpio-nxp-74hc164 uqmi
IMAGES += factory.bin
IMAGE/factory.bin := append-ubi | append-teltonika-metadata
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata

View File

@ -273,7 +273,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+MODULE_LICENSE("GPL");
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt7987-infracfg.c
@@ -0,0 +1,328 @@
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2024 MediaTek Inc.
@ -301,15 +301,12 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+static DEFINE_SPINLOCK(mt7987_clk_lock);
+
+static const char *const infra_mux_uart0_parents[] = { "csw_infra_f26m_sel",
+ "infra_hf_66m_uart0_pck",
+ "uart_sel" };
+
+static const char *const infra_mux_uart1_parents[] = { "csw_infra_f26m_sel",
+ "infra_hf_66m_uart1_pck",
+ "uart_sel" };
+
+static const char *const infra_mux_uart2_parents[] = { "csw_infra_f26m_sel",
+ "infra_hf_66m_uart1_pck",
+ "uart_sel" };
+
+static const char *const infra_mux_spi0_parents[] = {

View File

@ -1,307 +0,0 @@
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_ADVANCED_OPTIONS is not set
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_DMA_DEFAULT_COHERENT=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_MMAP_RND_BITS=11
CONFIG_ARCH_MMAP_RND_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_BITS_MIN=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_SPLIT_ARG64=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
CONFIG_ASN1=y
CONFIG_AUDIT_ARCH=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOOKE=y
CONFIG_BOOKE_OR_40x=y
CONFIG_BOOKE_WDT=y
# CONFIG_BR200_WP is not set
# CONFIG_BSC9131_RDB is not set
# CONFIG_BSC9132_QDS is not set
# CONFIG_C293_PCIE is not set
CONFIG_CLONE_BACKWARDS=y
CONFIG_CLZ_TAB=y
CONFIG_CMDLINE="console=ttyS0,115200"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
# CONFIG_CMDLINE_OVERRIDE is not set
# CONFIG_COMMON_CLK is not set
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
# CONFIG_CORENET_GENERIC is not set
# CONFIG_CPM2 is not set
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_MITIGATIONS=y
# CONFIG_CRYPTO_AES_PPC_SPE is not set
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
# CONFIG_CRYPTO_MD5_PPC is not set
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RSA=y
# CONFIG_CRYPTO_SHA1_PPC is not set
# CONFIG_CRYPTO_SHA1_PPC_SPE is not set
# CONFIG_CRYPTO_SHA256_PPC_SPE is not set
CONFIG_DATA_SHIFT=24
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_E500_CPU=y
CONFIG_EARLY_PRINTK=y
CONFIG_EDAC=y
CONFIG_EDAC_ATOMIC_SCRUB=y
# CONFIG_EDAC_DEBUG is not set
CONFIG_EDAC_LEGACY_SYSFS=y
CONFIG_EDAC_MPC85XX=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
# CONFIG_FIREBOX_T10 is not set
CONFIG_FIXED_PHY=y
CONFIG_FORCE_NR_CPUS=y
CONFIG_FSL_EMB_PERFMON=y
# CONFIG_FSL_FMAN is not set
CONFIG_FSL_LBC=y
CONFIG_FSL_PCI=y
CONFIG_FSL_PQ_MDIO=y
CONFIG_FSL_SOC=y
CONFIG_FSL_SOC_BOOKE=y
# CONFIG_FSL_ULI1575 is not set
CONFIG_FS_IOMAP=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOREMAP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GEN_RTC=y
# CONFIG_GE_IMP3A is not set
CONFIG_GIANFAR=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
# CONFIG_HIVEAP_330 is not set
CONFIG_HW_RANDOM=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_MPC=y
CONFIG_ILLEGAL_POINTER_VALUE=0
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_ISA_DMA_API=y
CONFIG_KERNEL_START=0xc0000000
# CONFIG_KSI8560 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOWMEM_CAM_NUM=9
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_LXT_PHY=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MIGRATION=y
CONFIG_MMU_GATHER_MERGE_VMAS=y
CONFIG_MMU_GATHER_PAGE_SIZE=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MPC8536_DS is not set
# CONFIG_MPC8540_ADS is not set
# CONFIG_MPC8560_ADS is not set
# CONFIG_MPC85xx_CDS is not set
# CONFIG_MPC85xx_DS is not set
# CONFIG_MPC85xx_MDS is not set
# CONFIG_MPC85xx_RDB is not set
CONFIG_MPIC=y
# CONFIG_MPIC_MSGR is not set
CONFIG_MPIC_TIMER=y
CONFIG_MPILIB=y
# CONFIG_MSM460 is not set
# CONFIG_MTD_CFI is not set
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_FIRMWARE=y
# CONFIG_MVME2500 is not set
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_EGRESS=y
CONFIG_NET_INGRESS=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NLS=y
CONFIG_NR_CPUS=1
CONFIG_NR_IRQS=512
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
# CONFIG_NVMEM_QORIQ_EFUSE is not set
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_GPIO_MM_GPIOCHIP=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND=y
# CONFIG_P1010_RDB is not set
# CONFIG_P1022_DS is not set
# CONFIG_P1022_RDK is not set
# CONFIG_P1023_RDB is not set
CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
# CONFIG_PANDA is not set
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYSICAL_ALIGN=0x04000000
CONFIG_PHYSICAL_START=0x00000000
# CONFIG_PHYS_64BIT is not set
# CONFIG_PMU_SYSFS is not set
# CONFIG_PPA8548 is not set
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_PPC64 is not set
CONFIG_PPC_85xx=y
# CONFIG_PPC_8xx is not set
CONFIG_PPC_ADV_DEBUG_DACS=2
CONFIG_PPC_ADV_DEBUG_DVCS=0
CONFIG_PPC_ADV_DEBUG_IACS=2
CONFIG_PPC_ADV_DEBUG_REGS=y
CONFIG_PPC_BARRIER_NOSPEC=y
# CONFIG_PPC_BOOK3S_32 is not set
CONFIG_PPC_DOORBELL=y
CONFIG_PPC_E500=y
# CONFIG_PPC_E500MC is not set
# CONFIG_PPC_EARLY_DEBUG is not set
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_PPC_KUAP=y
# CONFIG_PPC_KUAP_DEBUG is not set
CONFIG_PPC_KUEP=y
CONFIG_PPC_MMU_NOHASH=y
# CONFIG_PPC_P2020 is not set
CONFIG_PPC_PAGE_SHIFT=12
# CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT is not set
# CONFIG_PPC_QEMU_E500 is not set
CONFIG_PPC_SMP_MUXED_IPI=y
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC_WERROR=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QE_GPIO=y
CONFIG_QUICC_ENGINE=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
# CONFIG_RED_15W_REV1 is not set
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GENERIC=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
# CONFIG_SCOM_DEBUGFS is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_SERIAL_QE is not set
CONFIG_SMT_NUM_THREADS_DYNAMIC=y
# CONFIG_SOCRATES is not set
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPE=y
CONFIG_SPE_POSSIBLE=y
CONFIG_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
# CONFIG_STATIC_CALL_SELFTEST is not set
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_STX_GP3 is not set
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_TARGET_CPU="8540"
CONFIG_TARGET_CPU_BOOL=y
CONFIG_TASK_SIZE=0xc0000000
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_THREAD_SHIFT=13
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
# CONFIG_TL_WDR4900_V1 is not set
# CONFIG_TOOLCHAIN_DEFAULT_CPU is not set
# CONFIG_TQM8540 is not set
# CONFIG_TQM8541 is not set
# CONFIG_TQM8548 is not set
# CONFIG_TQM8555 is not set
# CONFIG_TQM8560 is not set
# CONFIG_TWR_P102x is not set
CONFIG_UCC=y
CONFIG_UCC_FAST=y
CONFIG_UCC_GETH=y
# CONFIG_UGETH_TX_ON_DEMAND is not set
CONFIG_USB_SUPPORT=y
CONFIG_VDSO32=y
# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WS_AP3710I is not set
# CONFIG_WS_AP3715I is not set
# CONFIG_WS_AP3825I is not set
# CONFIG_XES_MPC85xx is not set
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_POWERPC=y

View File

@ -83,8 +83,8 @@ define Device/extreme-networks_ws-ap3825i
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca988x-ct
BLOCKSIZE := 128k
KERNEL_NAME := simpleImage.ws-ap3825i
KERNEL_ENTRY := 0x1500000
KERNEL_LOADADDR := 0x1500000
KERNEL_ENTRY := 0x3000000
KERNEL_LOADADDR := 0x3000000
KERNEL = kernel-bin | fit none $(KDIR)/image-$$(DEVICE_DTS).dtb
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata

View File

@ -55,13 +55,15 @@ WS-AP3825i AP.
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -350,7 +350,8 @@ adder875-redboot)
;;
simpleboot-hiveap-330|\
simpleboot-tl-wdr4900-v1|\
-simpleboot-ws-ap3710i)
+simpleboot-ws-ap3710i|\
+simpleboot-ws-ap3825i)
platformo="$object/fixed-head.o $object/simpleboot.o"
@@ -355,6 +355,11 @@ simpleboot-ws-ap3710i)
link_address='0x1500000'
binary=y
;;
+simpleboot-ws-ap3825i)
+ platformo="$object/fixed-head.o $object/simpleboot.o"
+ link_address='0x3000000'
+ binary=y
+ ;;
simpleboot-*)
platformo="$object/fixed-head.o $object/simpleboot.o"
binary=y

View File

@ -1,10 +0,0 @@
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -31,6 +31,7 @@ static const struct of_device_id mpc85xx
{ .compatible = "fsl,mpc8548-guts", },
/* Probably unnecessary? */
{ .compatible = "gpio-leds", },
+ { .compatible = "gpio-keys", },
/* For all PCI controllers */
{ .compatible = "fsl,mpc8540-pci", },
{ .compatible = "fsl,mpc8548-pcie", },

View File

@ -1,61 +0,0 @@
From b30ba76a980b3a9282f309c23e3bb0b0eb2c72cd Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Thu, 30 May 2024 02:55:38 +0200
Subject: [PATCH] powerpc: add compressed zImage for mpc85xx
Add a universal zImage which can be loaded by mpc85xx boards at
load address 0x3000000. This allows boards to boot kernels larger than
16MB even if the image is loaded temporarily from NAND at offset
0x1000000 which some bootloaders do by default.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
arch/powerpc/boot/Makefile | 1 +
arch/powerpc/boot/wrapper | 5 +++++
2 files changed, 6 insertions(+)
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -178,6 +178,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
+src-plat-$(CONFIG_PPC_ZIMAGE_LA3000000) += fixed-head.S
src-plat-$(CONFIG_PPC_PSERIES) += pseries-head.S
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
@@ -343,6 +344,7 @@ image-$(CONFIG_MPC834x_ITX) += cuImage.
image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot
# Board ports in arch/powerpc/platform/85xx/Kconfig
+image-$(CONFIG_PPC_ZIMAGE_LA3000000) += zImage.la3000000
image-$(CONFIG_MPC85xx_MDS) += cuImage.mpc8568mds
image-$(CONFIG_MPC85xx_DS) += cuImage.mpc8544ds \
cuImage.mpc8572ds
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -256,6 +256,11 @@ if [ -n "$esm_blob" -a "$platform" != "p
fi
case "$platform" in
+la3000000)
+ binary=y
+ platformo="$object/fixed-head.o $object/of.o $object/epapr.o"
+ link_address='0x3000000'
+ ;;
of)
platformo="$object/of.o $object/epapr.o"
make_space=n
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -88,6 +88,10 @@ config NMI_IPI
depends on SMP && (DEBUGGER || KEXEC_CORE || HARDLOCKUP_DETECTOR)
default y
+config PPC_ZIMAGE_LA3000000
+ bool
+ default n
+
config PPC_WATCHDOG
bool
depends on HARDLOCKUP_DETECTOR_ARCH

View File

@ -1,83 +0,0 @@
From 1d9f596e572917772b87a2a37e1680902964782f Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Wed, 20 Feb 2013 08:40:33 +0100
Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
board
This patch adds support for the TP-Link TL-WDR4900 v1
concurrent dual-band wireless router. The devices uses
the Freescale P1014 SoC.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
arch/powerpc/boot/Makefile | 3 ++-
arch/powerpc/boot/wrapper | 5 +++++
arch/powerpc/platforms/85xx/Kconfig | 12 ++++++++++++
arch/powerpc/platforms/85xx/Makefile | 1 +
4 files changed, 20 insertions(+), 1 deletion(-)
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -183,6 +183,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
+src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
@@ -354,7 +355,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_KSI8560) += cuImage.ksi8560
-
+image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
# Board ports in arch/powerpc/platform/86xx/Kconfig
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -348,6 +348,11 @@ adder875-redboot)
platformo="$object/fixed-head.o $object/redboot-8xx.o"
binary=y
;;
+simpleboot-tl-wdr4900-v1)
+ platformo="$object/fixed-head.o $object/simpleboot.o"
+ link_address='0x1500000'
+ binary=y
+ ;;
simpleboot-*)
platformo="$object/fixed-head.o $object/simpleboot.o"
binary=y
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -176,6 +176,18 @@ config STX_GP3
select CPM2
select DEFAULT_UIMAGE
+config TL_WDR4900_V1
+ bool "TP-Link TL-WDR4900 v1"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ select SWIOTLB
+ help
+ This option enables support for the TP-Link TL-WDR4900 v1 board.
+
+ This board is a Concurrent Dual-Band wireless router with a
+ Freescale P1014 SoC.
+
config TQM8540
bool "TQ Components TQM8540"
help
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
+obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
obj-$(CONFIG_TQM85xx) += tqm85xx.o
obj-$(CONFIG_PPA8548) += ppa8548.o
obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o

View File

@ -1,58 +0,0 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -40,6 +40,17 @@ config BSC9132_QDS
and dual StarCore SC3850 DSP cores.
Manufacturer : Freescale Semiconductor, Inc
+config HIVEAP_330
+ bool "Aerohive HiveAP-330"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Aerohive HiveAP-330 board.
+
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1020 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -12,6 +12,7 @@ obj-y += common.o
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o
obj-$(CONFIG_C293_PCIE) += c293pcie.o
+obj-$(CONFIG_HIVEAP_330) += hiveap-330.o
obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o
obj8259-$(CONFIG_PPC_I8259) += mpc85xx_8259.o
obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o $(obj8259-y)
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -183,6 +183,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
+src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
@@ -355,6 +356,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_KSI8560) += cuImage.ksi8560
+image-$(CONFIG_HIVEAP_330) += simpleImage.hiveap-330
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
# Board ports in arch/powerpc/platform/86xx/Kconfig
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -348,6 +348,7 @@ adder875-redboot)
platformo="$object/fixed-head.o $object/redboot-8xx.o"
binary=y
;;
+simpleboot-hiveap-330|\
simpleboot-tl-wdr4900-v1)
platformo="$object/fixed-head.o $object/simpleboot.o"
link_address='0x1500000'

View File

@ -1,37 +0,0 @@
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1009,6 +1009,14 @@ config CMDLINE_FORCE
endchoice
+config CMDLINE_OVERRIDE
+ bool "Use alternative cmdline from device tree"
+ help
+ Some bootloaders may have uneditable bootargs. While CMDLINE_FORCE can
+ be used, this is not a good option for kernels that are shared across
+ devices. This setting enables using "chosen/cmdline-override" as the
+ cmdline if it exists in the device tree.
+
config EXTRA_TARGETS
string "Additional default image types"
help
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
@@ -1190,6 +1190,17 @@ int __init early_init_dt_scan_chosen(cha
if (p != NULL && l > 0)
strlcat(cmdline, p, min_t(int, strlen(cmdline) + (int)l, COMMAND_LINE_SIZE));
+ /* CONFIG_CMDLINE_OVERRIDE is used to fallback to a different
+ * device tree option of chosen/bootargs-override. This is
+ * helpful on boards where u-boot sets bootargs, and is unable
+ * to be modified.
+ */
+#ifdef CONFIG_CMDLINE_OVERRIDE
+ p = of_get_flat_dt_prop(node, "bootargs-override", &l);
+ if (p != NULL && l > 0)
+ strlcpy(cmdline, p, min((int)l, COMMAND_LINE_SIZE));
+#endif
+
handle_cmdline:
/*
* CONFIG_CMDLINE is meant to be a default in case nothing else

View File

@ -1,29 +0,0 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -179,6 +179,16 @@ config XES_MPC85xx
Manufacturer: Extreme Engineering Solutions, Inc.
URL: <https://www.xes-inc.com/>
+config RED_15W_REV1
+ bool "Sophos RED 15w Rev.1"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Sophos RED 15w Rev.1 board.
+
+ This board is a wireless VPN router with a Freescale P1010 SoC.
+
config STX_GP3
bool "Silicon Turnkey Express GP3"
help
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_PPC_P2020) += p2020.o $(o
obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o
+obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
obj-$(CONFIG_TQM85xx) += tqm85xx.o

View File

@ -1,170 +0,0 @@
From 93514afd769c305182beeed1f9c4c46235879ef8 Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Sun, 30 Dec 2018 23:24:41 +0100
Subject: [PATCH] powerpc: mpc85xx: change P2020RDB dts file for OpenWRT
This patch apply chages for OpenWRT in P2020RDB
dts file.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
arch/powerpc/boot/dts/fsl/p2020rdb.dts | 98 +++++++++++++++++---------
1 file changed, 63 insertions(+), 35 deletions(-)
--- a/arch/powerpc/boot/dts/fsl/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts
@@ -5,10 +5,15 @@
* Copyright 2009-2012 Freescale Semiconductor Inc.
*/
+/dts-v1/;
+
/include/ "p2020si-pre.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
/ {
- model = "fsl,P2020RDB";
+ model = "Freescale P2020RDB";
compatible = "fsl,P2020RDB";
aliases {
@@ -34,48 +39,38 @@
0x2 0x0 0x0 0xffb00000 0x00020000>;
nor@0,0 {
- #address-cells = <1>;
- #size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x1000000>;
bank-width = <2>;
device-width = <1>;
- partition@0 {
- /* This location must not be altered */
- /* 256KB for Vitesse 7385 Switch firmware */
- reg = <0x0 0x00040000>;
- label = "NOR (RO) Vitesse-7385 Firmware";
- read-only;
- };
-
- partition@40000 {
- /* 256KB for DTB Image */
- reg = <0x00040000 0x00040000>;
- label = "NOR (RO) DTB Image";
- read-only;
- };
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
- partition@80000 {
- /* 3.5 MB for Linux Kernel Image */
- reg = <0x00080000 0x00380000>;
- label = "NOR (RO) Linux Kernel Image";
- read-only;
- };
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg = <0x0 0x00040000>;
+ label = "NOR (RO) Vitesse-7385 Firmware";
+ read-only;
+ };
- partition@400000 {
- /* 11MB for JFFS2 based Root file System */
- reg = <0x00400000 0x00b00000>;
- label = "NOR (RW) JFFS2 Root File System";
- };
+ partition@40000 {
+ compatible = "denx,fit";
+ reg = <0x00040000 0x00ec0000>;
+ label = "firmware";
+ };
- partition@f00000 {
- /* This location must not be altered */
- /* 512KB for u-boot Bootloader Image */
- /* 512KB for u-boot Environment Variables */
- reg = <0x00f00000 0x00100000>;
- label = "NOR (RO) U-Boot Image";
- read-only;
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg = <0x00f00000 0x00100000>;
+ label = "u-boot";
+ read-only;
+ };
};
};
@@ -85,6 +80,7 @@
compatible = "fsl,p2020-fcm-nand",
"fsl,elbc-fcm-nand";
reg = <0x1 0x0 0x40000>;
+ nand-ecc-mode = "none";
partition@0 {
/* This location must not be altered */
@@ -140,13 +136,43 @@
soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
+ gpio0: gpio-controller@fc00 {
+ };
+
i2c@3000 {
+ temperature-sensor@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+ };
+
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
};
};
+ i2c@3100 {
+ pmic@11 {
+ compatible = "zl2006";
+ reg = <0x11>;
+ };
+
+ gpio@18 {
+ compatible = "nxp,pca9557";
+ reg = <0x18>;
+ };
+
+ eeprom@52 {
+ compatible = "atmel,24c01";
+ reg = <0x52>;
+ };
+ };
+
spi@7000 {
flash@0 {
#address-cells = <1>;
@@ -200,10 +226,12 @@
phy0: ethernet-phy@0 {
interrupts = <3 1 0 0>;
reg = <0x0>;
+ reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
phy1: ethernet-phy@1 {
interrupts = <3 1 0 0>;
reg = <0x1>;
+ reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
tbi-phy@2 {
device_type = "tbi-phy";

View File

@ -1,30 +0,0 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -51,6 +51,17 @@ config HIVEAP_330
This board is a Concurrent Dual-Band wireless access point with a
Freescale P1020 SoC.
+config PANDA
+ bool "OCEDO PANDA"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the OCEDO PANDA board.
+
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1020 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_P1010_RDB) += p1010rdb.o
obj-$(CONFIG_P1022_DS) += p1022_ds.o
obj-$(CONFIG_P1022_RDK) += p1022_rdk.o
obj-$(CONFIG_P1023_RDB) += p1023_rdb.o
+obj-$(CONFIG_PANDA) += panda.o
obj-$(CONFIG_PPC_P2020) += p2020.o $(obj8259-y)
obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o

View File

@ -1,60 +0,0 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -62,6 +62,17 @@ config PANDA
This board is a Concurrent Dual-Band wireless access point with a
Freescale P1020 SoC.
+config WS_AP3710I
+ bool "Enterasys WS-AP3710i"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Enterasys WS-AP3710i board.
+
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1020 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_P1023_RDB) += p1023_rdb.o
obj-$(CONFIG_PANDA) += panda.o
obj-$(CONFIG_PPC_P2020) += p2020.o $(obj8259-y)
obj-$(CONFIG_TWR_P102x) += twr_p102x.o
+obj-$(CONFIG_WS_AP3710I) += ws-ap3710i.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o
obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -185,6 +185,7 @@ src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) +=
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
+src-plat-$(CONFIG_WS_AP3710I) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
@@ -358,6 +359,7 @@ image-$(CONFIG_TQM8560) += cuImage.tqm
image-$(CONFIG_KSI8560) += cuImage.ksi8560
image-$(CONFIG_HIVEAP_330) += simpleImage.hiveap-330
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
+image-$(CONFIG_WS_AP3710I) += simpleImage.ws-ap3710i
# Board ports in arch/powerpc/platform/86xx/Kconfig
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -349,7 +349,8 @@ adder875-redboot)
binary=y
;;
simpleboot-hiveap-330|\
-simpleboot-tl-wdr4900-v1)
+simpleboot-tl-wdr4900-v1|\
+simpleboot-ws-ap3710i)
platformo="$object/fixed-head.o $object/simpleboot.o"
link_address='0x1500000'
binary=y

View File

@ -1,67 +0,0 @@
From 2fa1a7983ef30f3c7486f9b07c001bee87d1f6d6 Mon Sep 17 00:00:00 2001
From: Martin Kennedy <hurricos@gmail.com>
Date: Sat, 1 Jan 2022 11:01:37 -0500
Subject: [PATCH] PowerPC 85xx: Add WS-AP3825i support
This patch adds support for building Linux for the Extreme Networks
WS-AP3825i AP.
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -73,6 +73,16 @@ config WS_AP3710I
This board is a Concurrent Dual-Band wireless access point with a
Freescale P1020 SoC.
+config WS_AP3825I
+ bool "Extreme Networks WS-AP3825i"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Extreme Networks WS-AP3825i board.
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1020 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_PANDA) += panda.o
obj-$(CONFIG_PPC_P2020) += p2020.o $(obj8259-y)
obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_WS_AP3710I) += ws-ap3710i.o
+obj-$(CONFIG_WS_AP3825I) += ws-ap3825i.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o
obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -186,6 +186,7 @@ src-plat-$(CONFIG_MVME7100) += motload-h
src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_WS_AP3710I) += simpleboot.c fixed-head.S
+src-plat-$(CONFIG_WS_AP3825I) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
@@ -360,6 +361,7 @@ image-$(CONFIG_KSI8560) += cuImage.ksi
image-$(CONFIG_HIVEAP_330) += simpleImage.hiveap-330
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
image-$(CONFIG_WS_AP3710I) += simpleImage.ws-ap3710i
+image-$(CONFIG_WS_AP3825I) += simpleImage.ws-ap3825i
# Board ports in arch/powerpc/platform/86xx/Kconfig
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -350,7 +350,8 @@ adder875-redboot)
;;
simpleboot-hiveap-330|\
simpleboot-tl-wdr4900-v1|\
-simpleboot-ws-ap3710i)
+simpleboot-ws-ap3710i|\
+simpleboot-ws-ap3825i)
platformo="$object/fixed-head.o $object/simpleboot.o"
link_address='0x1500000'
binary=y

View File

@ -1,29 +0,0 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -83,6 +83,16 @@ config WS_AP3825I
This board is a Concurrent Dual-Band wireless access point with a
Freescale P1020 SoC.
+config FIREBOX_T10
+ bool "Watchguard Firebox T10"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Watchguard Firebox T10 board.
+ This board is a VPN Gateway-Router with a
+ Freescale P1010 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_PPC_P2020) += p2020.o $(o
obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_WS_AP3710I) += ws-ap3710i.o
obj-$(CONFIG_WS_AP3825I) += ws-ap3825i.o
+obj-$(CONFIG_FIREBOX_T10) += firebox_t10.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o
obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o

View File

@ -1,48 +0,0 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -73,6 +73,17 @@ config WS_AP3710I
This board is a Concurrent Dual-Band wireless access point with a
Freescale P1020 SoC.
+config WS_AP3715I
+ bool "Enterasys WS-AP3715i"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Enterasys WS-AP3715i board.
+
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1010 SoC.
+
config WS_AP3825I
bool "Extreme Networks WS-AP3825i"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_PANDA) += panda.o
obj-$(CONFIG_PPC_P2020) += p2020.o $(obj8259-y)
obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_WS_AP3710I) += ws-ap3710i.o
+obj-$(CONFIG_WS_AP3715I) += ws-ap3715i.o
obj-$(CONFIG_WS_AP3825I) += ws-ap3825i.o
obj-$(CONFIG_FIREBOX_T10) += firebox_t10.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -186,6 +186,7 @@ src-plat-$(CONFIG_MVME7100) += motload-h
src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_WS_AP3710I) += simpleboot.c fixed-head.S
+src-plat-$(CONFIG_WS_AP3715I) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_WS_AP3825I) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
@@ -361,6 +362,7 @@ image-$(CONFIG_KSI8560) += cuImage.ksi
image-$(CONFIG_HIVEAP_330) += simpleImage.hiveap-330
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
image-$(CONFIG_WS_AP3710I) += simpleImage.ws-ap3710i
+image-$(CONFIG_WS_AP3715I) += simpleImage.ws-ap3715i
image-$(CONFIG_WS_AP3825I) += simpleImage.ws-ap3825i
# Board ports in arch/powerpc/platform/86xx/Kconfig
image-$(CONFIG_MVME7100) += dtbImage.mvme7100

View File

@ -1,57 +0,0 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -40,6 +40,16 @@ config BSC9132_QDS
and dual StarCore SC3850 DSP cores.
Manufacturer : Freescale Semiconductor, Inc
+config BR200_WP
+ bool "Aerohive BR200-WP"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Aerohive BR200-WP board.
+
+ This board is a wireless router with a Freescale P1011 SoC.
+
config HIVEAP_330
bool "Aerohive HiveAP-330"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -12,6 +12,7 @@ obj-y += common.o
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o
obj-$(CONFIG_C293_PCIE) += c293pcie.o
+obj-$(CONFIG_BR200_WP) += br200-wp.o
obj-$(CONFIG_HIVEAP_330) += hiveap-330.o
obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o
obj8259-$(CONFIG_PPC_I8259) += mpc85xx_8259.o
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -183,6 +183,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
+src-plat-$(CONFIG_BR200_WP) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_WS_AP3710I) += simpleboot.c fixed-head.S
@@ -359,6 +360,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_KSI8560) += cuImage.ksi8560
+image-$(CONFIG_BR200_WP) += simpleImage.br200-wp
image-$(CONFIG_HIVEAP_330) += simpleImage.hiveap-330
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
image-$(CONFIG_WS_AP3710I) += simpleImage.ws-ap3710i
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -348,6 +348,7 @@ adder875-redboot)
platformo="$object/fixed-head.o $object/redboot-8xx.o"
binary=y
;;
+simpleboot-br200-wp|\
simpleboot-hiveap-330|\
simpleboot-tl-wdr4900-v1|\
simpleboot-ws-ap3710i|\

View File

@ -1,31 +0,0 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -114,6 +114,18 @@ config FIREBOX_T10
This board is a VPN Gateway-Router with a
Freescale P1010 SoC.
+config MSM460
+ bool "HPE MSM460"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ select PPC_ZIMAGE_LA3000000
+ help
+ This option enables support for the HPE MSM460 board.
+
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1020 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -19,6 +19,7 @@ obj8259-$(CONFIG_PPC_I8259) += mpc85xx
obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o $(obj8259-y)
obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o
+obj-$(CONFIG_MSM460) += msm460.o
obj-$(CONFIG_P1010_RDB) += p1010rdb.o
obj-$(CONFIG_P1022_DS) += p1022_ds.o
obj-$(CONFIG_P1022_RDK) += p1022_rdk.o

View File

@ -1,41 +0,0 @@
From 5f856ccc34df25060d36a5a81b7b45b574d86e35 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Sun, 3 Dec 2023 20:09:24 +0100
Subject: [PATCH] arch: powerpc: simpleboot: prevent overwrite of CPU1
spin-table
Don't overwrite the spin-table of additional CPU cores with loader-heap.
U-Boot places the spin-table for CPU1 on P1020 SoCs in the top 1MB of
system-memory. Instead of parsing reserved-memory (which would be
considerable more work), reduce the available system-memory for the
loader by 1MB.
This prevents the loader from overwriting the spin-table of
additional CPU cores on these platforms.
Linux itself needs to be made aware by this using reserved-memory
definitions.
This patch is required for using CPU1 on the Extreme Networks
WS-AP3825i.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
arch/powerpc/boot/simpleboot.c | 5 +++++
1 file changed, 5 insertions(+)
--- a/arch/powerpc/boot/simpleboot.c
+++ b/arch/powerpc/boot/simpleboot.c
@@ -65,6 +65,11 @@ void platform_init(unsigned long r3, uns
if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
memsize64 = 0xffffffff;
+ /* Reserve upper 1 MB of memory for CPU1 spin-table */
+ if (memsize64 > 0x100000) {
+ memsize64 = memsize64 - 0x100000;
+ }
+
/* finally, setup the timebase */
node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type",
"cpu", sizeof("cpu"));

View File

@ -1,42 +0,0 @@
From d43ab14605510d9d2bd257a8cd70f24ada4621b0 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Sat, 29 Feb 2020 14:27:04 +0100
Subject: [PATCH] powerpc: bootwrapper: disable uImage generation
Due to CONFIG_KERNEL_XZ symbol, the bootwrapper code tries to
instruct the mkimage to use the xz compression, which isn't
supported. This disables the uImage generation, as OpenWrt
generates individual uImages for each board using it's own
toolchain.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
arch/powerpc/boot/Makefile | 9 ---------
1 file changed, 9 deletions(-)
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -297,7 +297,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
image-$(CONFIG_PPC_HOLLY) += dtbImage.holly
-image-$(CONFIG_DEFAULT_UIMAGE) += uImage
image-$(CONFIG_EPAPR_BOOT) += zImage.epapr
#
@@ -424,15 +423,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits
$(obj)/vmlinux.strip: vmlinux
$(STRIP) -s -R .comment $< -o $@
-$(obj)/uImage: vmlinux $(wrapperbits) FORCE
- $(call if_changed,wrap,uboot)
-
-$(obj)/uImage.initrd.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE
- $(call if_changed,wrap,uboot-$*,,$(obj)/dts/$*.dtb,$(obj)/ramdisk.image.gz)
-
-$(obj)/uImage.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE
- $(call if_changed,wrap,uboot-$*,,$(obj)/dts/$*.dtb)
-
$(obj)/cuImage.initrd.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE
$(call if_changed,wrap,cuboot-$*,,$(obj)/dts/$*.dtb,$(obj)/ramdisk.image.gz)

View File

@ -12,6 +12,7 @@ FEATURES:=boot-part ext4 fpu legacy-sdcard powerpc64 ramdisk rootfs-part rtc squ
SUBTARGETS:=generic
KERNEL_PATCHVER:=6.6
KERNEL_TESTING_PATCHVER:=6.12
KERNELNAME:=zImage

View File

@ -0,0 +1,423 @@
CONFIG_64BIT=y
CONFIG_ALTIVEC=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_DMA_DEFAULT_COHERENT=y
CONFIG_ARCH_FORCE_MAX_ORDER=12
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=32
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_PKEY_BITS=5
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
CONFIG_ASN1=y
CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y
CONFIG_AUDIT_ARCH=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_BOOKE=y
CONFIG_BOOKE_WDT=y
CONFIG_BUFFER_HEAD=y
CONFIG_CLK_QORIQ=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CLZ_TAB=y
CONFIG_COMMON_CLK=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
# CONFIG_COMPAT_32BIT_TIME is not set
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CORENET_GENERIC=y
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_FREQ=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
# CONFIG_CPU_FREQ_STAT is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_TEO=y
CONFIG_CPU_ISOLATION=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_RMAP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRC32C_VPMSUM is not set
CONFIG_CRYPTO_CURVE25519=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEV_FSL_CAAM=y
CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y
CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI=y
CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y
CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_PRNG_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
# CONFIG_CRYPTO_DEV_NX is not set
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ENGINE=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
# CONFIG_CRYPTO_MD5_PPC is not set
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RSA=y
# CONFIG_CRYPTO_SHA1_PPC is not set
CONFIG_CRYPTO_XTS=y
CONFIG_DATA_SHIFT=12
CONFIG_DEBUG_INFO=y
CONFIG_DEFAULT_UIMAGE=y
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_NEED_SYNC=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS_BYPASS=y
CONFIG_DMA_OPS_HELPERS=y
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_E5500_CPU is not set
CONFIG_E6500_CPU=y
CONFIG_EARLY_PRINTK=y
CONFIG_EDAC=y
CONFIG_EDAC_ATOMIC_SCRUB=y
# CONFIG_EDAC_CPC925 is not set
# CONFIG_EDAC_DEBUG is not set
CONFIG_EDAC_LEGACY_SYSFS=y
CONFIG_EDAC_MPC85XX=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EPAPR_PARAVIRT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_F2FS_FS=y
CONFIG_FIXED_PHY=y
# CONFIG_FSL_BMAN_TEST is not set
CONFIG_FSL_CORENET_CF=y
CONFIG_FSL_CORENET_RCPM=y
CONFIG_FSL_DMA=y
CONFIG_FSL_DPAA=y
# CONFIG_FSL_DPAA_CHECKING is not set
CONFIG_FSL_DPAA_ETH=y
CONFIG_FSL_EMB_PERFMON=y
CONFIG_FSL_FMAN=y
CONFIG_FSL_GUTS=y
CONFIG_FSL_IFC=y
CONFIG_FSL_LBC=y
CONFIG_FSL_MPIC_TIMER_WAKEUP=y
CONFIG_FSL_PAMU=y
CONFIG_FSL_PCI=y
# CONFIG_FSL_QMAN_TEST is not set
CONFIG_FSL_SOC=y
CONFIG_FSL_SOC_BOOKE=y
# CONFIG_FSL_ULI1575 is not set
CONFIG_FSL_XGMAC_MDIO=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FTL=y
CONFIG_FUNCTION_ALIGNMENT=4
CONFIG_FUNCTION_ALIGNMENT_4B=y
CONFIG_FUNCTION_ERROR_INJECTION=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOREMAP=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
# CONFIG_GEN_RTC is not set
# CONFIG_GIANFAR is not set
CONFIG_GLOB=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_MPC8XXX=y
# CONFIG_HANGCHECK_TIMER is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HWMON=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_MPC=y
# CONFIG_IDPF is not set
CONFIG_ILLEGAL_POINTER_VALUE=0x5deadbeef0000000
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_INTERRUPT_SANITIZE_REGISTERS=y
# CONFIG_IOMMUFD is not set
CONFIG_IOMMU_API=y
# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_IOMMU_HELPER=y
CONFIG_IOMMU_SUPPORT=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_ISA_DMA_API=y
CONFIG_JBD2=y
CONFIG_JUMP_LABEL=y
CONFIG_JUMP_LABEL_FEATURE_CHECKS=y
# CONFIG_JUMP_LABEL_FEATURE_CHECK_DEBUG is not set
CONFIG_KALLSYMS=y
CONFIG_KERNEL_GZIP=y
CONFIG_KERNEL_START=0xc000000000000000
CONFIG_KPROBES=y
CONFIG_KRETPROBES=y
CONFIG_KRETPROBE_ON_RETHOOK=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MARVELL_PHY=y
CONFIG_MATH_EMULATION=y
# CONFIG_MATH_EMULATION_FULL is not set
CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMORY=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_DEBUG=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_OF_ESDHC=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
# CONFIG_MMC_WBSD is not set
CONFIG_MMIOWB=y
CONFIG_MMU_GATHER_MERGE_VMAS=y
CONFIG_MMU_GATHER_PAGE_SIZE=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MPIC=y
CONFIG_MPIC_MSGR=y
CONFIG_MPIC_TIMER=y
CONFIG_MPILIB=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NLS=y
CONFIG_NONSTATIC_KERNEL=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=24
CONFIG_NR_IRQS=512
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IOMMU=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGSUSPEND=y
CONFIG_OPTPROBES=y
CONFIG_PACKING=y
CONFIG_PADATA=y
CONFIG_PAGE_OFFSET=0xc000000000000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_ARCH_FALLBACKS=y
CONFIG_PCS_LYNX=y
CONFIG_PGTABLE_LEVELS=4
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
CONFIG_PHYSICAL_START=0x00000000
CONFIG_PHYS_64BIT=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_PM=y
# CONFIG_PMU_SYSFS is not set
CONFIG_PM_CLK=y
CONFIG_PPC=y
CONFIG_PPC64=y
CONFIG_PPC64_BIG_ENDIAN_ELF_ABI_V2=y
CONFIG_PPC64_ELF_ABI_V2=y
CONFIG_PPC_ADV_DEBUG_DACS=2
CONFIG_PPC_ADV_DEBUG_DVCS=0
CONFIG_PPC_ADV_DEBUG_IACS=2
CONFIG_PPC_ADV_DEBUG_REGS=y
CONFIG_PPC_BARRIER_NOSPEC=y
CONFIG_PPC_BOOK3E_64=y
# CONFIG_PPC_BOOK3S_64 is not set
CONFIG_PPC_DAWR=y
CONFIG_PPC_DOORBELL=y
CONFIG_PPC_E500=y
CONFIG_PPC_E500MC=y
# CONFIG_PPC_EARLY_DEBUG is not set
CONFIG_PPC_EPAPR_HV_PIC=y
CONFIG_PPC_FPU=y
CONFIG_PPC_FPU_REGS=y
CONFIG_PPC_HAS_LBARX_LHARX=y
CONFIG_PPC_INDIRECT_PCI=y
# CONFIG_PPC_IRQ_SOFT_MASK_DEBUG is not set
CONFIG_PPC_KUAP=y
# CONFIG_PPC_KUAP_DEBUG is not set
CONFIG_PPC_KUEP=y
CONFIG_PPC_MMU_NOHASH=y
CONFIG_PPC_MSI_BITMAP=y
CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
# CONFIG_PPC_QEMU_E500 is not set
CONFIG_PPC_QUEUED_SPINLOCKS=y
CONFIG_PPC_SMP_MUXED_IPI=y
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC_WERROR=y
CONFIG_PPS=y
CONFIG_PTE_64BIT=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PTP_1588_CLOCK_QORIQ=y
CONFIG_QORIQ_CPUFREQ=y
CONFIG_QORIQ_THERMAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RATIONAL=y
# CONFIG_RAVE_SP_CORE is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_RELOCATABLE=y
# CONFIG_RELOCATABLE_TEST is not set
CONFIG_RETHOOK=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
# CONFIG_SCOM_DEBUGFS is not set
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
CONFIG_SERIAL_FSL_LINFLEXUART=y
CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMT_NUM_THREADS_DYNAMIC=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOC_BUS=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPLIT_PTE_PTLOCKS=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_TARGET_CPU="e6500"
CONFIG_TARGET_CPU_BOOL=y
# CONFIG_TEST_FPU is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_THREAD_SHIFT=14
# CONFIG_TOOLCHAIN_DEFAULT_CPU is not set
CONFIG_TOOLS_SUPPORT_RELR=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
# CONFIG_UCLAMP_TASK is not set
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_EHCI_FSL=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_UAS=y
CONFIG_VDSO_GETRANDOM=y
CONFIG_VIRT_CPU_ACCOUNTING=y
CONFIG_VIRT_CPU_ACCOUNTING_NATIVE=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XPS=y
CONFIG_ZLIB_DEFLATE=y

View File

@ -836,6 +836,8 @@ define Device/tplink_archer-c50-v6
IMAGE_SIZE := 7616k
DEVICE_MODEL := Archer C50
DEVICE_VARIANT := v6 (CA/EU/RU)
DEVICE_ALT0_MODEL := Archer A5
DEVICE_ALT0_VARIANT := v6 (CA/EU/RU)
TPLINK_FLASHLAYOUT := 8MSUmtk
TPLINK_HWID := 0x0C500006
TPLINK_HWREVADD := 0x6

View File

@ -0,0 +1,25 @@
From 9d856aa1c81930a5d8df0e29d6cb0faa3fa87206 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Fri, 31 Oct 2025 16:58:24 +0100
Subject: [PATCH] arm64: dts: rockchip: add eMMC CQE support for rk3588
The RK3588 eMMC controller supports CQE, so add the missing
DT flag.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://patch.msgid.link/20251031-rockchip-emmc-cqe-support-v2-2-958171f5edad@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -1935,6 +1935,7 @@
<&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>,
<&cru SRST_T_EMMC>;
reset-names = "core", "bus", "axi", "block", "timer";
+ supports-cqe;
status = "disabled";
};

View File

@ -0,0 +1,195 @@
From fda1e0af7c28f96d4f33e57cf51565b0e9c14e63 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Fri, 31 Oct 2025 16:58:23 +0100
Subject: [PATCH] mmc: sdhci-of-dwcmshc: Add command queue support for rockchip
SOCs
This adds CQE support for the Rockchip RK3588 and RK3576 platform. To
be functional, the eMMC device-tree node must have a 'supports-cqe;'
flag property.
As the RK3576 device-tree has been upstreamed with the 'supports-cqe;'
property set by default, the kernel already tried to use CQE, which
results in system hang during suspend. This fixes the issue.
Co-developed-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
---
drivers/mmc/host/sdhci-of-dwcmshc.c | 93 ++++++++++++++++++++++++++++-
1 file changed, 90 insertions(+), 3 deletions(-)
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -24,6 +24,7 @@
#include "sdhci-pltfm.h"
#include "cqhci.h"
+#include "sdhci-cqhci.h"
#define SDHCI_DWCMSHC_ARG2_STUFF GENMASK(31, 16)
@@ -82,6 +83,8 @@
#define DWCMSHC_EMMC_DLL_TXCLK 0x808
#define DWCMSHC_EMMC_DLL_STRBIN 0x80c
#define DECMSHC_EMMC_DLL_CMDOUT 0x810
+#define DECMSHC_EMMC_MISC_CON 0x81C
+#define MISC_INTCLK_EN BIT(1)
#define DWCMSHC_EMMC_DLL_STATUS0 0x840
#define DWCMSHC_EMMC_DLL_START BIT(0)
#define DWCMSHC_EMMC_DLL_LOCKED BIT(8)
@@ -234,6 +237,7 @@ struct dwcmshc_priv {
struct dwcmshc_pltfm_data {
const struct sdhci_pltfm_data pdata;
+ const struct cqhci_host_ops *cqhci_host_ops;
int (*init)(struct device *dev, struct sdhci_host *host, struct dwcmshc_priv *dwc_priv);
void (*postinit)(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv);
};
@@ -603,6 +607,68 @@ static void dwcmshc_cqhci_dumpregs(struc
sdhci_dumpregs(mmc_priv(mmc));
}
+static void rk35xx_sdhci_cqe_pre_enable(struct mmc_host *mmc)
+{
+ struct sdhci_host *host = mmc_priv(mmc);
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host);
+ u32 reg;
+
+ reg = sdhci_readl(host, dwc_priv->vendor_specific_area2 + CQHCI_CFG);
+ reg |= CQHCI_ENABLE;
+ sdhci_writel(host, reg, dwc_priv->vendor_specific_area2 + CQHCI_CFG);
+}
+
+static void rk35xx_sdhci_cqe_enable(struct mmc_host *mmc)
+{
+ struct sdhci_host *host = mmc_priv(mmc);
+ u32 reg;
+
+ reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
+ while (reg & SDHCI_DATA_AVAILABLE) {
+ sdhci_readl(host, SDHCI_BUFFER);
+ reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
+ }
+
+ sdhci_writew(host, DWCMSHC_SDHCI_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE);
+
+ sdhci_cqe_enable(mmc);
+}
+
+static void rk35xx_sdhci_cqe_disable(struct mmc_host *mmc, bool recovery)
+{
+ struct sdhci_host *host = mmc_priv(mmc);
+ unsigned long flags;
+ u32 ctrl;
+
+ /*
+ * During CQE command transfers, command complete bit gets latched.
+ * So s/w should clear command complete interrupt status when CQE is
+ * either halted or disabled. Otherwise unexpected SDCHI legacy
+ * interrupt gets triggered when CQE is halted/disabled.
+ */
+ spin_lock_irqsave(&host->lock, flags);
+ ctrl = sdhci_readl(host, SDHCI_INT_ENABLE);
+ ctrl |= SDHCI_INT_RESPONSE;
+ sdhci_writel(host, ctrl, SDHCI_INT_ENABLE);
+ sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS);
+ spin_unlock_irqrestore(&host->lock, flags);
+
+ sdhci_cqe_disable(mmc, recovery);
+}
+
+static void rk35xx_sdhci_cqe_post_disable(struct mmc_host *mmc)
+{
+ struct sdhci_host *host = mmc_priv(mmc);
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host);
+ u32 ctrl;
+
+ ctrl = sdhci_readl(host, dwc_priv->vendor_specific_area2 + CQHCI_CFG);
+ ctrl &= ~CQHCI_ENABLE;
+ sdhci_writel(host, ctrl, dwc_priv->vendor_specific_area2 + CQHCI_CFG);
+}
+
static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
@@ -721,6 +787,10 @@ static void rk35xx_sdhci_reset(struct sd
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host);
struct rk35xx_priv *priv = dwc_priv->priv;
+ u32 extra = sdhci_readl(host, DECMSHC_EMMC_MISC_CON);
+
+ if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL))
+ cqhci_deactivate(host->mmc);
if (mask & SDHCI_RESET_ALL && priv->reset) {
reset_control_assert(priv->reset);
@@ -729,6 +799,9 @@ static void rk35xx_sdhci_reset(struct sd
}
sdhci_reset(host, mask);
+
+ /* Enable INTERNAL CLOCK */
+ sdhci_writel(host, MISC_INTCLK_EN | extra, DECMSHC_EMMC_MISC_CON);
}
static int dwcmshc_rk35xx_init(struct device *dev, struct sdhci_host *host,
@@ -1230,6 +1303,15 @@ static const struct dwcmshc_pltfm_data s
};
#endif
+static const struct cqhci_host_ops rk35xx_cqhci_ops = {
+ .pre_enable = rk35xx_sdhci_cqe_pre_enable,
+ .enable = rk35xx_sdhci_cqe_enable,
+ .disable = rk35xx_sdhci_cqe_disable,
+ .post_disable = rk35xx_sdhci_cqe_post_disable,
+ .dumpregs = dwcmshc_cqhci_dumpregs,
+ .set_tran_desc = dwcmshc_set_tran_desc,
+};
+
static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk35xx_pdata = {
.pdata = {
.ops = &sdhci_dwcmshc_rk35xx_ops,
@@ -1238,6 +1320,7 @@ static const struct dwcmshc_pltfm_data s
.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
},
+ .cqhci_host_ops = &rk35xx_cqhci_ops,
.init = dwcmshc_rk35xx_init,
.postinit = dwcmshc_rk35xx_postinit,
};
@@ -1287,7 +1370,8 @@ static const struct cqhci_host_ops dwcms
.set_tran_desc = dwcmshc_set_tran_desc,
};
-static void dwcmshc_cqhci_init(struct sdhci_host *host, struct platform_device *pdev)
+static void dwcmshc_cqhci_init(struct sdhci_host *host, struct platform_device *pdev,
+ const struct dwcmshc_pltfm_data *pltfm_data)
{
struct cqhci_host *cq_host;
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
@@ -1317,7 +1401,10 @@ static void dwcmshc_cqhci_init(struct sd
}
cq_host->mmio = host->ioaddr + priv->vendor_specific_area2;
- cq_host->ops = &dwcmshc_cqhci_ops;
+ if (pltfm_data->cqhci_host_ops)
+ cq_host->ops = pltfm_data->cqhci_host_ops;
+ else
+ cq_host->ops = &dwcmshc_cqhci_ops;
/* Enable using of 128-bit task descriptors */
dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
@@ -1486,7 +1573,7 @@ static int dwcmshc_probe(struct platform
priv->vendor_specific_area2 =
sdhci_readw(host, DWCMSHC_P_VENDOR_AREA2);
- dwcmshc_cqhci_init(host, pdev);
+ dwcmshc_cqhci_init(host, pdev, pltfm_data);
}
if (pltfm_data->postinit)

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