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https://github.com/VIKINGYFY/immortalwrt.git
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b8742b1ae0
Changes: * removed upstreamed patches, * rebased local patches, * fix en7581_evb/an7583_evb booting issues * enable position independent code Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Link: https://github.com/openwrt/openwrt/pull/20400 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
136 lines
4.9 KiB
Diff
136 lines
4.9 KiB
Diff
From 8e6cba428ce48005b5b8be64c2a08c98d04865e9 Mon Sep 17 00:00:00 2001
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From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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Date: Thu, 14 Aug 2025 22:47:17 +0300
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Subject: [PATCH 3/4] spi: airoha: set custom sector size equal to flash page
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size
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Set custom sector size equal to flash page size including oob. Thus we
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will always read a single sector. The maximum custom sector size is
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8187, so all possible flash sector sizes are supported.
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This patch is a necessary step to avoid usage of flash specific
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parameters.
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Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
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---
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drivers/spi/airoha_snfi_spi.c | 35 +++++++++++++++++++----------------
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1 file changed, 19 insertions(+), 16 deletions(-)
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--- a/drivers/spi/airoha_snfi_spi.c
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+++ b/drivers/spi/airoha_snfi_spi.c
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@@ -515,7 +515,7 @@ static int airoha_snand_nfi_config(struct airoha_snand_priv *priv)
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return err;
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/* sec num */
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- val = FIELD_PREP(SPI_NFI_SEC_NUM, priv->nfi_cfg.sec_num);
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+ val = FIELD_PREP(SPI_NFI_SEC_NUM, 1);
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err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_CON,
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SPI_NFI_SEC_NUM, val);
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if (err)
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@@ -528,7 +528,8 @@ static int airoha_snand_nfi_config(struct airoha_snand_priv *priv)
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return err;
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/* set cust sec size */
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- val = FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, priv->nfi_cfg.sec_size);
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+ val = FIELD_PREP(SPI_NFI_CUS_SEC_SIZE,
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+ priv->nfi_cfg.sec_size * priv->nfi_cfg.sec_num);
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return regmap_update_bits(priv->regmap_nfi,
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REG_SPI_NFI_SECCUS_SIZE,
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SPI_NFI_CUS_SEC_SIZE, val);
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@@ -610,8 +611,11 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc,
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u8 *txrx_buf = priv->txrx_buf;
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dma_addr_t dma_addr;
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u32 val, rd_mode, opcode;
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+ size_t bytes;
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int err;
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+ bytes = priv->nfi_cfg.sec_num * priv->nfi_cfg.sec_size;
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+
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/*
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* DUALIO and QUADIO opcodes are not supported by the spi controller,
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* replace them with supported opcodes.
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@@ -669,18 +673,17 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc,
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FIELD_PREP(SPI_NFI_OPMODE, 6));
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/* Set number of sector will be read */
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- val = FIELD_PREP(SPI_NFI_SEC_NUM, priv->nfi_cfg.sec_num);
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err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_CON,
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- SPI_NFI_SEC_NUM, val);
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+ SPI_NFI_SEC_NUM,
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+ FIELD_PREP(SPI_NFI_SEC_NUM, 1));
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if (err)
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goto error_dma_mode_off;
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/* Set custom sector size */
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- val = priv->nfi_cfg.sec_size;
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err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_SECCUS_SIZE,
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SPI_NFI_CUS_SEC_SIZE |
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SPI_NFI_CUS_SEC_SIZE_EN,
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- FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, val) |
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+ FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, bytes) |
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SPI_NFI_CUS_SEC_SIZE_EN);
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if (err)
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goto error_dma_mode_off;
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@@ -702,11 +705,10 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc,
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* = NFI_SNF_MISC_CTL2.read_data_byte_number =
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* = NFI_CON.sector_number * NFI_SECCUS.custom_sector_size
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*/
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- val = priv->nfi_cfg.sec_size * priv->nfi_cfg.sec_num;
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- val = FIELD_PREP(SPI_NFI_READ_DATA_BYTE_NUM, val);
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err = regmap_update_bits(priv->regmap_nfi,
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REG_SPI_NFI_SNF_MISC_CTL2,
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- SPI_NFI_READ_DATA_BYTE_NUM, val);
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+ SPI_NFI_READ_DATA_BYTE_NUM,
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+ FIELD_PREP(SPI_NFI_READ_DATA_BYTE_NUM, bytes));
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if (err)
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goto error_dma_unmap;
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@@ -795,8 +797,11 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc,
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u8 *txrx_buf = priv->txrx_buf;
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dma_addr_t dma_addr;
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u32 wr_mode, val, opcode;
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+ size_t bytes;
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int err;
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+ bytes = priv->nfi_cfg.sec_num * priv->nfi_cfg.sec_size;
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+
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opcode = desc->info.op_tmpl.cmd.opcode;
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switch (opcode) {
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case SPI_NAND_OP_PROGRAM_LOAD_SINGLE:
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@@ -847,18 +852,17 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc,
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goto error_dma_mode_off;
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/* Set number of sector will be written */
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- val = FIELD_PREP(SPI_NFI_SEC_NUM, priv->nfi_cfg.sec_num);
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err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_CON,
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- SPI_NFI_SEC_NUM, val);
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+ SPI_NFI_SEC_NUM,
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+ FIELD_PREP(SPI_NFI_SEC_NUM, 1));
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if (err)
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goto error_dma_mode_off;
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/* Set custom sector size */
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- val = priv->nfi_cfg.sec_size;
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err = regmap_update_bits(priv->regmap_nfi, REG_SPI_NFI_SECCUS_SIZE,
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SPI_NFI_CUS_SEC_SIZE |
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SPI_NFI_CUS_SEC_SIZE_EN,
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- FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, val) |
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+ FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, bytes) |
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SPI_NFI_CUS_SEC_SIZE_EN);
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if (err)
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goto error_dma_mode_off;
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@@ -880,11 +884,10 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc,
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* = NFI_SNF_MISC_CTL2.write_data_byte_number =
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* = NFI_CON.sector_number * NFI_SECCUS.custom_sector_size
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*/
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- val = priv->nfi_cfg.sec_size * priv->nfi_cfg.sec_num;
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- val = FIELD_PREP(SPI_NFI_PROG_LOAD_BYTE_NUM, val);
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err = regmap_update_bits(priv->regmap_nfi,
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REG_SPI_NFI_SNF_MISC_CTL2,
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- SPI_NFI_PROG_LOAD_BYTE_NUM, val);
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+ SPI_NFI_PROG_LOAD_BYTE_NUM,
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+ FIELD_PREP(SPI_NFI_PROG_LOAD_BYTE_NUM, bytes));
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if (err)
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goto error_dma_unmap;
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