From ba430b1a512dc1972807a1dd5a8d31a78ac572ff Mon Sep 17 00:00:00 2001 From: hzy Date: Mon, 22 Apr 2024 21:49:18 +0800 Subject: [PATCH 2/2] ipq50xx: use corrent scm function to write tcsr Signed-off-by: hzy --- hal/soc_ops/ipq50xx/nss_ipq50xx.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/hal/soc_ops/ipq50xx/nss_ipq50xx.c b/hal/soc_ops/ipq50xx/nss_ipq50xx.c index 3e4491c0..e56de1cc 100644 --- a/hal/soc_ops/ipq50xx/nss_ipq50xx.c +++ b/hal/soc_ops/ipq50xx/nss_ipq50xx.c @@ -18,7 +18,7 @@ #include #include -#include +#include #include "nss_dp_hal.h" /* @@ -78,13 +78,8 @@ static void nss_dp_hal_tcsr_set(void) * If TZ is not enabled, we can write to the register directly. */ if (qcom_scm_is_available()) { -#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0)) - err = qcom_scm_tcsr_reg_write((tcsr_base + TCSR_GMAC_AXI_CACHE_OVERRIDE_OFFSET), + err = qcom_scm_io_writel((tcsr_base + TCSR_GMAC_AXI_CACHE_OVERRIDE_OFFSET), TCSR_GMAC_AXI_CACHE_OVERRIDE_VALUE); -#else - err = qti_scm_tcsr_reg_write((tcsr_base + TCSR_GMAC_AXI_CACHE_OVERRIDE_OFFSET), - TCSR_GMAC_AXI_CACHE_OVERRIDE_VALUE); -#endif if (err) { pr_err("%s: SCM TCSR write error: %d\n", __func__, err); } -- 2.40.1