From 2921987fc7af0aae49bcee54103b60bdcf193661 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sun, 5 Oct 2025 01:04:54 +0100 Subject: [PATCH] arm-trusted-firmware-mediatek: update to upstream release 20250711 Build TF-A for the MediaTek MT7987 SoC family. Add necessary downstream patches in preparation for the BananaPi R4 Lite, which connects both flash chips to SPI2 and got broken MMC bus. Signed-off-by: Daniel Golle --- .../arm-trusted-firmware-mediatek/Makefile | 82 ++++++++++- ...tek-snfi-add-FudanMicro-manufacturer.patch | 41 ++++++ ...987-make-SPI-controller-configurable.patch | 128 ++++++++++++++++++ ...987-mmc-use-4-bit-bus-width-for-eMMC.patch | 24 ++++ ...7987-bl2-move-FIP-offset-to-0x100000.patch | 27 ++++ 5 files changed, 297 insertions(+), 5 deletions(-) create mode 100644 package/boot/arm-trusted-firmware-mediatek/patches/0004-mediatek-snfi-add-FudanMicro-manufacturer.patch create mode 100644 package/boot/arm-trusted-firmware-mediatek/patches/0005-mt7987-make-SPI-controller-configurable.patch create mode 100644 package/boot/arm-trusted-firmware-mediatek/patches/0006-hack-mt7987-mmc-use-4-bit-bus-width-for-eMMC.patch create mode 100644 package/boot/arm-trusted-firmware-mediatek/patches/0007-hack-mt7987-bl2-move-FIP-offset-to-0x100000.patch diff --git a/package/boot/arm-trusted-firmware-mediatek/Makefile b/package/boot/arm-trusted-firmware-mediatek/Makefile index 798070a59..daf68e3b7 100644 --- a/package/boot/arm-trusted-firmware-mediatek/Makefile +++ b/package/boot/arm-trusted-firmware-mediatek/Makefile @@ -9,13 +9,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=arm-trusted-firmware-mediatek -PKG_RELEASE:=2 +PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=https://github.com/mtk-openwrt/arm-trusted-firmware.git -PKG_SOURCE_DATE:=2024-01-17 -PKG_SOURCE_VERSION:=bacca82a8cac369470df052a9d801a0ceb9b74ca -PKG_MIRROR_HASH:=d035c1b63a9bd71d752c90540361b66d290e7cf42dcca73259d0950af3569c79 +PKG_SOURCE_DATE:=2025-07-11 +PKG_SOURCE_VERSION:=78a0dfd927bb00ce973a1f8eb4079df0f755887a +PKG_MIRROR_HASH:=5604a9419f788f53448c48761dc50d3dc4bef3b3dbbc08a32cf2def253588171 PKG_MAINTAINER:=Daniel Golle @@ -33,6 +33,7 @@ define Trusted-Firmware-A/Default BOARD_QFN:= DRAM_USE_COMB:= USE_UBI:= + SPIM_CTRL:= endef define Trusted-Firmware-A/mt7622-nor-1ddr @@ -285,6 +286,59 @@ define Trusted-Firmware-A/mt7986-spim-nand-ddr3 DDR_TYPE:=ddr3 endef +define Trusted-Firmware-A/mt7986-spim-nand-ubi-ddr3 + NAME:=MediaTek MT7986 (SPI-NAND via SPIM using UBI, DDR3) + BOOT_DEVICE:=spim-nand + BUILD_SUBTARGET:=filogic + PLAT:=mt7986 + DDR_TYPE:=ddr3 + USE_UBI:=1 +endef + +define Trusted-Firmware-A/mt7987-emmc-comb + NAME:=MediaTek MT7987 (eMMC) + BOOT_DEVICE:=emmc + BUILD_SUBTARGET:=filogic + PLAT:=mt7987 + DRAM_USE_COMB:=1 +endef + +define Trusted-Firmware-A/mt7987-nor-comb + NAME:=MediaTek MT7987 (NOR) + BOOT_DEVICE:=nor + BUILD_SUBTARGET:=filogic + PLAT:=mt7987 + DRAM_USE_COMB:=1 +endef + +define Trusted-Firmware-A/mt7987-sdmmc-comb + NAME:=MediaTek MT7987 (SD card) + BOOT_DEVICE:=sdmmc + BUILD_SUBTARGET:=filogic + PLAT:=mt7987 + DRAM_USE_COMB:=1 +endef + +define Trusted-Firmware-A/mt7987-spim-nand0-ubi-comb + NAME:=MediaTek MT7987 (SPI-NAND via SPIM, UBI) + BOOT_DEVICE:=spim-nand + BUILD_SUBTARGET:=filogic + PLAT:=mt7987 + DRAM_USE_COMB:=1 + USE_UBI:=1 + SPIM_CTRL:=0 +endef + +define Trusted-Firmware-A/mt7987-spim-nand2-ubi-comb + NAME:=MediaTek MT7987 (SPI-NAND via SPIM, UBI) + BOOT_DEVICE:=spim-nand + BUILD_SUBTARGET:=filogic + PLAT:=mt7987 + DRAM_USE_COMB:=1 + USE_UBI:=1 + SPIM_CTRL:=2 +endef + define Trusted-Firmware-A/mt7988-nor-ddr3 NAME:=MediaTek MT7988 (SPI-NOR, DDR3) BOOT_DEVICE:=nor @@ -423,6 +477,15 @@ define Trusted-Firmware-A/mt7988-spim-nand-ubi-comb USE_UBI:=1 endef +define Trusted-Firmware-A/mt7988-spim-nand-ubi-ddr4 + NAME:=MediaTek MT7988 (SPI-NAND via SPIM, DDR4) + BOOT_DEVICE:=spim-nand + BUILD_SUBTARGET:=filogic + PLAT:=mt7988 + DDR_TYPE:=ddr4 + USE_UBI:=1 +endef + TFA_TARGETS:= \ mt7622-nor-1ddr \ mt7622-nor-2ddr \ @@ -448,6 +511,7 @@ TFA_TARGETS:= \ mt7986-sdmmc-ddr3 \ mt7986-snand-ddr3 \ mt7986-spim-nand-ddr3 \ + mt7986-spim-nand-ubi-ddr3 \ mt7986-emmc-ddr4 \ mt7986-nor-ddr4 \ mt7986-sdmmc-ddr4 \ @@ -455,6 +519,11 @@ TFA_TARGETS:= \ mt7986-spim-nand-ddr4 \ mt7986-spim-nand-ubi-ddr4 \ mt7986-spim-nand-4k-ddr4 \ + mt7987-emmc-comb \ + mt7987-nor-comb \ + mt7987-sdmmc-comb \ + mt7987-spim-nand0-ubi-comb \ + mt7987-spim-nand2-ubi-comb \ mt7988-emmc-ddr3 \ mt7988-nor-ddr3 \ mt7988-sdmmc-ddr3 \ @@ -471,7 +540,8 @@ TFA_TARGETS:= \ mt7988-snand-comb \ mt7988-snand-ubi-comb \ mt7988-spim-nand-comb \ - mt7988-spim-nand-ubi-comb + mt7988-spim-nand-ubi-comb \ + mt7988-spim-nand-ubi-ddr4 TFA_MAKE_FLAGS += \ BOOT_DEVICE=$(BOOT_DEVICE) \ @@ -484,6 +554,8 @@ TFA_MAKE_FLAGS += \ $(if $(DRAM_USE_COMB),DRAM_USE_COMB=1) \ $(if $(USE_UBI),UBI=1 $(if $(findstring mt7622,$(PLAT)),OVERRIDE_UBI_START_ADDR=0x80000)) \ $(if $(USE_UBI),UBI=1 $(if $(findstring mt7981,$(PLAT)),OVERRIDE_UBI_START_ADDR=0x100000)) \ + $(if $(USE_UBI),UBI=1 $(if $(findstring mt7986,$(PLAT)),OVERRIDE_UBI_START_ADDR=0x200000)) \ + $(if $(SPIM_CTRL),SPIM_CTRL=$(SPIM_CTRL)) \ all define Package/trusted-firmware-a/install diff --git a/package/boot/arm-trusted-firmware-mediatek/patches/0004-mediatek-snfi-add-FudanMicro-manufacturer.patch b/package/boot/arm-trusted-firmware-mediatek/patches/0004-mediatek-snfi-add-FudanMicro-manufacturer.patch new file mode 100644 index 000000000..7900cfe44 --- /dev/null +++ b/package/boot/arm-trusted-firmware-mediatek/patches/0004-mediatek-snfi-add-FudanMicro-manufacturer.patch @@ -0,0 +1,41 @@ +From fd057aba83aea8458986e11c81dbb75a69468b84 Mon Sep 17 00:00:00 2001 +From: Mikhail Zhilkin +Date: Wed, 13 Aug 2025 22:46:54 +0300 +Subject: arm-trusted-firmware-mediatek: add FudanMicro manufacturer + +Add FudanMicro manufacturer. + +Signed-off-by: Mikhail Zhilkin +--- + +--- a/plat/mediatek/apsoc_common/drivers/spi_nand/mtk_spi_nand.c ++++ b/plat/mediatek/apsoc_common/drivers/spi_nand/mtk_spi_nand.c +@@ -21,6 +21,7 @@ + #define SPI_NAND_MAX_ID_LEN 4U + #define DELAY_US_400MS 400000U + #define ETRON_ID 0xD5U ++#define FUDAN_ID 0xA1U + #define GIGADEVICE_ID 0xC8U + #define MACRONIX_ID 0xC2U + #define MICRON_ID 0x2CU +@@ -146,7 +147,8 @@ static int spi_nand_quad_enable(uint8_t + if (manufacturer_id != MACRONIX_ID && + manufacturer_id != GIGADEVICE_ID && + manufacturer_id != ETRON_ID && +- manufacturer_id != FORESEE_ID) { ++ manufacturer_id != FORESEE_ID && ++ manufacturer_id != FUDAN_ID) { + return 0; + } + +@@ -543,6 +545,10 @@ static int spi_nand_check_pp(struct para + INFO("PP COPY %d CRC read: 0x%x, compute: 0x%x\n", + i, crc, crc_compute); + ++ // FUDAN integrity CRC (bytes 254-255) is reversed ++ if (crc != crc_compute) ++ crc = htobe16(pp->integrity_crc); ++ + if (crc != crc_compute) { + ret = -EBADMSG; + continue; diff --git a/package/boot/arm-trusted-firmware-mediatek/patches/0005-mt7987-make-SPI-controller-configurable.patch b/package/boot/arm-trusted-firmware-mediatek/patches/0005-mt7987-make-SPI-controller-configurable.patch new file mode 100644 index 000000000..41017844b --- /dev/null +++ b/package/boot/arm-trusted-firmware-mediatek/patches/0005-mt7987-make-SPI-controller-configurable.patch @@ -0,0 +1,128 @@ +From e2e43103c00b5f7ccedbdbdece0f622cb420b4a5 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Fri, 3 Oct 2025 12:53:10 +0100 +Subject: [PATCH] mt7987: make SPI controller configurable + +Allow selecting the SPI controller used for SPIM-NAND or SPI-NOR boot +devices (either SPI0 or SPI2). + +Signed-off-by: Daniel Golle +--- + plat/mediatek/apsoc_common/Config.in | 1 + + plat/mediatek/mt7987/Config.in | 29 +++++++++++++++++++++ + plat/mediatek/mt7987/bl2/bl2.mk | 12 +++++++++ + plat/mediatek/mt7987/bl2/bl2_dev_spi_nand.c | 10 ++++++- + plat/mediatek/mt7987/platform.mk | 4 +-- + 5 files changed, 53 insertions(+), 3 deletions(-) + create mode 100644 plat/mediatek/mt7987/Config.in + +--- a/plat/mediatek/apsoc_common/Config.in ++++ b/plat/mediatek/apsoc_common/Config.in +@@ -783,6 +783,7 @@ config ENABLE_BL31_RUNTIME_LOG + default 1 + depends on _ENABLE_BL31_RUNTIME_LOG + ++source "plat/mediatek/mt7987/Config.in" + source "plat/mediatek/mt7988/Config.in" + + endmenu # Platform configurations +--- /dev/null ++++ b/plat/mediatek/mt7987/Config.in +@@ -0,0 +1,29 @@ ++# SPDX-License-Identifier: BSD-3-Clause ++# ++# Copyright (c) 2025 Daniel Golle ++# ++# MT7987 platform-specific configurations ++# ++ ++if _PLAT_MT7987 ++ ++choice ++ prompt "SPI controller" ++ depends on (_BOOT_DEVICE_SPIM_NAND || _BOOT_DEVICE_SPI_NOR) ++ default _SPIM_CTRL_0 if _BOOT_DEVICE_SPIM_NAND ++ default _SPIM_CTRL_2 if _BOOT_DEVICE_SPI_NOR ++ ++ config _SPIM_CTRL_0 ++ bool "0" ++ ++ config _SPIM_CTRL_2 ++ bool "2" ++ ++endchoice ++ ++config SPIM_CTRL ++ int ++ default 0 if _SPIM_CTRL_0 ++ default 2 if _SPIM_CTRL_2 ++ ++endif # _PLAT_MT7987 +--- a/plat/mediatek/mt7987/bl2/bl2.mk ++++ b/plat/mediatek/mt7987/bl2/bl2.mk +@@ -91,7 +91,11 @@ endif # END OF BOOT_DEVICE = ram + ifeq ($(BOOT_DEVICE),nor) + $(eval $(call BL2_BOOT_NOR)) + BL2_SOURCES += $(MTK_PLAT_SOC)/bl2/bl2_dev_spi_nor.c ++ifeq ($(SPIM_CTRL),0) ++DTS_NAME := mt7987-spi0 ++else + DTS_NAME := mt7987-spi2 ++endif + endif # END OF BOOTDEVICE = nor + + ifeq ($(BOOT_DEVICE),emmc) +@@ -112,10 +116,18 @@ ifeq ($(BOOT_DEVICE),spim-nand) + $(eval $(call BL2_BOOT_SPI_NAND,0,0)) + BL2_SOURCES += $(MTK_PLAT_SOC)/bl2/bl2_dev_spi_nand.c + NAND_TYPE ?= spim:2k+64 ++ifeq ($(SPIM_CTRL),2) ++DTS_NAME := mt7987-spi2 ++else + DTS_NAME := mt7987-spi0 ++endif + $(eval $(call BL2_BOOT_NAND_TYPE_CHECK,$(NAND_TYPE),spim:2k+64 spim:2k+128 spim:4k+256)) + endif # END OF BOOTDEVICE = spim-nand + ++ifneq ($(SPIM_CTRL),) ++BL2_CPPFLAGS += -DSPIM_CTRL=$(SPIM_CTRL) ++endif ++ + ifeq ($(BROM_HEADER_TYPE),) + $(error BOOT_DEVICE has invalid value. Please re-check.) + endif +--- a/plat/mediatek/mt7987/bl2/bl2_dev_spi_nand.c ++++ b/plat/mediatek/mt7987/bl2/bl2_dev_spi_nand.c +@@ -12,10 +12,18 @@ + + #define MTK_QSPI_SRC_CLK CB_MPLL_D2 + ++#if SPIM_CTRL == 0 ++#define SELECTED_SPIM SPIM0 ++#elif SPIM_CTRL == 2 ++#define SELECTED_SPIM SPIM2 ++#else ++#error "Invalid SPI controller selection" ++#endif ++ + uint32_t mtk_plat_get_qspi_src_clk(void) + { + /* config GPIO pinmux to spi mode */ +- mtk_spi_gpio_init(SPIM0); ++ mtk_spi_gpio_init(SELECTED_SPIM); + + /* select 208M clk */ + mtk_spi_source_clock_select(MTK_QSPI_SRC_CLK); +--- a/plat/mediatek/mt7987/platform.mk ++++ b/plat/mediatek/mt7987/platform.mk +@@ -56,8 +56,8 @@ include make_helpers/dep.mk + + $(call GEN_DEP_RULES,bl2,emicfg bl2_boot_ram bl2_boot_nand_nmbm bl2_dev_mmc bl2_plat_init bl2_plat_setup mt7987_gpio dtb) + $(call MAKE_DEP,bl2,emicfg,DDR4_4BG_MODE DRAM_DEBUG_LOG DDR3_FREQ_2133 DDR3_FREQ_1866 DDR4_FREQ_3200 DDR4_FREQ_2666) +-$(call MAKE_DEP,bl2,bl2_plat_init,BL2_COMPRESS) +-$(call MAKE_DEP,bl2,bl2_plat_setup,BOOT_DEVICE TRUSTED_BOARD_BOOT BL32_TZRAM_BASE BL32_TZRAM_SIZE BL32_LOAD_OFFSET) ++$(call MAKE_DEP,bl2,bl2_plat_init,BL2_COMPRESS SPIM_CTRL) ++$(call MAKE_DEP,bl2,bl2_plat_setup,BOOT_DEVICE TRUSTED_BOARD_BOOT BL32_TZRAM_BASE BL32_TZRAM_SIZE BL32_LOAD_OFFSET SPIM_CTRL) + $(call MAKE_DEP,bl2,bl2_dev_mmc,BOOT_DEVICE) + $(call MAKE_DEP,bl2,bl2_boot_ram,RAM_BOOT_DEBUGGER_HOOK RAM_BOOT_UART_DL) + $(call MAKE_DEP,bl2,bl2_boot_nand_nmbm,NMBM_MAX_RATIO NMBM_MAX_RESERVED_BLOCKS NMBM_DEFAULT_LOG_LEVEL) diff --git a/package/boot/arm-trusted-firmware-mediatek/patches/0006-hack-mt7987-mmc-use-4-bit-bus-width-for-eMMC.patch b/package/boot/arm-trusted-firmware-mediatek/patches/0006-hack-mt7987-mmc-use-4-bit-bus-width-for-eMMC.patch new file mode 100644 index 000000000..0f64a7e14 --- /dev/null +++ b/package/boot/arm-trusted-firmware-mediatek/patches/0006-hack-mt7987-mmc-use-4-bit-bus-width-for-eMMC.patch @@ -0,0 +1,24 @@ +From 0a09912eb336bee788443b919ea5b99b195f5a91 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Sat, 4 Oct 2025 22:13:49 +0100 +Subject: [PATCH] hack: mt7987: mmc: use 4-bit bus-width for eMMC + +The BananaPi R4 Lite has broken DAT5 signal of the MMC bus, which +results in 8-bit buswidth not working well for the eMMC. +Reduce to 4-bit buswidth fixes it (and makes all other boards with +eMMC a tiny bit slower to boot, but it's in the milliseconds). +--- + plat/mediatek/mt7987/bl2/bl2_dev_mmc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/plat/mediatek/mt7987/bl2/bl2_dev_mmc.c ++++ b/plat/mediatek/mt7987/bl2/bl2_dev_mmc.c +@@ -74,7 +74,7 @@ static const struct mt7987_msdc_conf { + { + .base = MSDC0_BASE, + .top_base = MSDC0_TOP_BASE, +- .bus_width = MMC_BUS_WIDTH_8, ++ .bus_width = MMC_BUS_WIDTH_4, + .type = MMC_IS_EMMC, + .src_clk = 200000000, + .dev_comp = &mt7987_msdc_compat, diff --git a/package/boot/arm-trusted-firmware-mediatek/patches/0007-hack-mt7987-bl2-move-FIP-offset-to-0x100000.patch b/package/boot/arm-trusted-firmware-mediatek/patches/0007-hack-mt7987-bl2-move-FIP-offset-to-0x100000.patch new file mode 100644 index 000000000..fcb60b41a --- /dev/null +++ b/package/boot/arm-trusted-firmware-mediatek/patches/0007-hack-mt7987-bl2-move-FIP-offset-to-0x100000.patch @@ -0,0 +1,27 @@ +From 6725bb3c2aa9330f37a591e1e539badf67021b47 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Sat, 4 Oct 2025 23:59:54 +0100 +Subject: [PATCH] hack: mt7987: bl2: move FIP offset to 0x100000 + +There is no use in allocating more than 2MB to the factory partition. +After all, even for WiFi 7 tri-band devices the calibration data is +still in the kilobytes range. +Move FIP offset to 0x100000 to not waste so much space on small NOR +flash. + +Signed-off-by: Daniel Golle +--- + plat/mediatek/mt7987/bl2/bl2_dev_spi_nor.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/plat/mediatek/mt7987/bl2/bl2_dev_spi_nor.c ++++ b/plat/mediatek/mt7987/bl2/bl2_dev_spi_nor.c +@@ -7,7 +7,7 @@ + #include + #include + +-#define FIP_BASE 0x250000 ++#define FIP_BASE 0x100000 + #define FIP_SIZE 0x80000 + + #define MTK_QSPI_SRC_CLK CB_MPLL_D2