mirror of
https://github.com/Heleguo/lede.git
synced 2025-12-16 10:51:12 +00:00
qualcommbe: syncing with upstream
This commit is contained in:
coolsnowwolf
parent
3b83d61ddb
commit
389a26dc6a
@ -65,7 +65,6 @@ CONFIG_BLK_MQ_PCI=y
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CONFIG_BLK_MQ_VIRTIO=y
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CONFIG_BLK_PM=y
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CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y
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CONFIG_CAVIUM_TX2_ERRATUM_219=y
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CONFIG_CC_HAVE_SHADOW_CALL_STACK=y
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CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
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# CONFIG_CLK_QCM2290_GPUCC is not set
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@ -79,7 +78,6 @@ CONFIG_COMMON_CLK=y
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CONFIG_COMMON_CLK_QCOM=y
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CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
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# CONFIG_COMPAT_32BIT_TIME is not set
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# CONFIG_COMPRESSED_INSTALL is not set
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CONFIG_CONTEXT_TRACKING=y
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CONFIG_CONTEXT_TRACKING_IDLE=y
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CONFIG_COREDUMP=y
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@ -155,7 +153,6 @@ CONFIG_FIXED_PHY=y
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CONFIG_FIX_EARLYCON_MEM=y
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CONFIG_FRAME_POINTER=y
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CONFIG_FS_IOMAP=y
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CONFIG_FUJITSU_ERRATUM_010001=y
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CONFIG_FUNCTION_ALIGNMENT=4
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CONFIG_FUNCTION_ALIGNMENT_4B=y
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CONFIG_FWNODE_MDIO=y
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@ -199,6 +196,7 @@ CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAS_IOPORT_MAP=y
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CONFIG_HWMON=y
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CONFIG_HWSPINLOCK=y
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CONFIG_HWSPINLOCK_QCOM=y
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CONFIG_HW_RANDOM=y
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@ -296,7 +294,6 @@ CONFIG_NO_HZ_COMMON=y
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CONFIG_NO_HZ_IDLE=y
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CONFIG_NR_CPUS=4
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# CONFIG_NSM is not set
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CONFIG_NVIDIA_CARMEL_CNP_ERRATUM=y
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CONFIG_NVMEM=y
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CONFIG_NVMEM_LAYOUTS=y
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CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=y
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@ -590,6 +587,7 @@ CONFIG_THERMAL=y
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CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
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CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
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CONFIG_THERMAL_GOV_STEP_WISE=y
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CONFIG_THERMAL_HWMON=y
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CONFIG_THERMAL_OF=y
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CONFIG_THREAD_INFO_IN_TASK=y
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CONFIG_TICK_CPU_ACCOUNTING=y
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@ -3,6 +3,10 @@ PART_NAME=firmware
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RAMFS_COPY_BIN='fw_printenv fw_setenv head'
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RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
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platform_check_image() {
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return 0;
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}
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platform_do_upgrade() {
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case "$(board_name)" in
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*)
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@ -1,6 +1,7 @@
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CONFIG_AQUANTIA_PHY=y
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CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
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CONFIG_DT_IDLE_GENPD=y
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CONFIG_F2FS_FS=y
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CONFIG_GRO_CELLS=y
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CONFIG_INTERCONNECT_QCOM=y
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# CONFIG_INTERCONNECT_QCOM_MSM8909 is not set
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@ -1,118 +0,0 @@
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From 7b0f0f00a301906cc78d3c8974ea14ad8db29f0c Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Tue, 3 Dec 2024 15:31:02 +0000
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Subject: [PATCH 10/22] v6.14: net: phy: add phy_inband_caps()
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Add a method to query the PHY's in-band capabilities for a PHY
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interface mode.
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Where the interface mode does not have in-band capability, or the PHY
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driver has not been updated to return this information, then
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phy_inband_caps() should return zero. Otherwise, PHY drivers will
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return a value consisting of the following flags:
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LINK_INBAND_DISABLE indicates that the hardware does not support
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in-band signalling, or can have in-band signalling configured via
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software to be disabled.
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LINK_INBAND_ENABLE indicates that the hardware will use in-band
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signalling, or can have in-band signalling configured via software
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to be enabled.
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LINK_INBAND_BYPASS indicates that the hardware has the ability to
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bypass in-band signalling when enabled after a timeout if the link
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partner does not respond to its in-band signalling.
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This reports the PHY capabilities for the particular interface mode,
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not the current configuration.
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Link: https://patch.msgid.link/E1tIUre-006ITz-KF@rmk-PC.armlinux.org.uk
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/phy/phy.c | 21 +++++++++++++++++++++
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include/linux/phy.h | 28 ++++++++++++++++++++++++++++
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2 files changed, 49 insertions(+)
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--- a/drivers/net/phy/phy.c
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+++ b/drivers/net/phy/phy.c
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@@ -1049,6 +1049,27 @@ static int phy_check_link_status(struct
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}
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/**
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+ * phy_inband_caps - query which in-band signalling modes are supported
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+ * @phydev: a pointer to a &struct phy_device
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+ * @interface: the interface mode for the PHY
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+ *
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+ * Returns zero if it is unknown what in-band signalling is supported by the
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+ * PHY (e.g. because the PHY driver doesn't implement the method.) Otherwise,
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+ * returns a bit mask of the LINK_INBAND_* values from
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+ * &enum link_inband_signalling to describe which inband modes are supported
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+ * by the PHY for this interface mode.
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+ */
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+unsigned int phy_inband_caps(struct phy_device *phydev,
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+ phy_interface_t interface)
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+{
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+ if (phydev->drv && phydev->drv->inband_caps)
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+ return phydev->drv->inband_caps(phydev, interface);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(phy_inband_caps);
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+
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+/**
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* _phy_start_aneg - start auto-negotiation for this PHY device
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* @phydev: the phy_device struct
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*
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--- a/include/linux/phy.h
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+++ b/include/linux/phy.h
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@@ -816,6 +816,24 @@ struct phy_tdr_config {
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#define PHY_PAIR_ALL -1
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/**
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+ * enum link_inband_signalling - in-band signalling modes that are supported
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+ *
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+ * @LINK_INBAND_DISABLE: in-band signalling can be disabled
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+ * @LINK_INBAND_ENABLE: in-band signalling can be enabled without bypass
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+ * @LINK_INBAND_BYPASS: in-band signalling can be enabled with bypass
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+ *
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+ * The possible and required bits can only be used if the valid bit is set.
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+ * If possible is clear, that means inband signalling can not be used.
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+ * Required is only valid when possible is set, and means that inband
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+ * signalling must be used.
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+ */
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+enum link_inband_signalling {
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+ LINK_INBAND_DISABLE = BIT(0),
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+ LINK_INBAND_ENABLE = BIT(1),
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+ LINK_INBAND_BYPASS = BIT(2),
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+};
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+
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+/**
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* struct phy_plca_cfg - Configuration of the PLCA (Physical Layer Collision
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* Avoidance) Reconciliation Sublayer.
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*
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@@ -955,6 +973,14 @@ struct phy_driver {
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int (*get_features)(struct phy_device *phydev);
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/**
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+ * @inband_caps: query whether in-band is supported for the given PHY
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+ * interface mode. Returns a bitmask of bits defined by enum
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+ * link_inband_signalling.
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+ */
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+ unsigned int (*inband_caps)(struct phy_device *phydev,
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+ phy_interface_t interface);
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+
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+ /**
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* @get_rate_matching: Get the supported type of rate matching for a
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* particular phy interface. This is used by phy consumers to determine
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* whether to advertise lower-speed modes for that interface. It is
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@@ -1840,6 +1866,8 @@ int phy_config_aneg(struct phy_device *p
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int _phy_start_aneg(struct phy_device *phydev);
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int phy_start_aneg(struct phy_device *phydev);
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int phy_aneg_done(struct phy_device *phydev);
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+unsigned int phy_inband_caps(struct phy_device *phydev,
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+ phy_interface_t interface);
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int phy_speed_down(struct phy_device *phydev, bool sync);
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int phy_speed_up(struct phy_device *phydev);
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bool phy_check_valid(int speed, int duplex, unsigned long *features);
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@ -1,159 +0,0 @@
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From 2d530b1085104f6aa0dfa35c908ac7c531941bf6 Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Tue, 3 Dec 2024 15:31:28 +0000
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Subject: [PATCH 11/22] v6.14: net: phylink: add pcs_inband_caps() method
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Add a pcs_inband_caps() method to query the PCS for its inband link
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capabilities, and use this to determine whether link modes used with
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optical SFPs can be supported.
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When a PCS does not provide a method, we allow inband negotiation to
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be either on or off, making this a no-op until the pcs_inband_caps()
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method is implemented by a PCS driver.
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Link: https://patch.msgid.link/E1tIUs4-006IUU-7K@rmk-PC.armlinux.org.uk
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/phy/phylink.c | 60 +++++++++++++++++++++++++++++++++++++++
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include/linux/phylink.h | 17 +++++++++++
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2 files changed, 77 insertions(+)
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--- a/drivers/net/phy/phylink.c
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+++ b/drivers/net/phy/phylink.c
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@@ -988,6 +988,15 @@ static void phylink_resolve_an_pause(str
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}
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}
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+static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs,
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+ phy_interface_t interface)
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+{
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+ if (pcs && pcs->ops->pcs_inband_caps)
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+ return pcs->ops->pcs_inband_caps(pcs, interface);
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+
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+ return 0;
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+}
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+
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static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
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phy_interface_t interface)
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{
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@@ -1041,6 +1050,24 @@ static void phylink_pcs_link_up(struct p
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pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
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}
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+/* Query inband for a specific interface mode, asking the MAC for the
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+ * PCS which will be used to handle the interface mode.
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+ */
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+static unsigned int phylink_inband_caps(struct phylink *pl,
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+ phy_interface_t interface)
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+{
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+ struct phylink_pcs *pcs;
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+
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+ if (!pl->mac_ops->mac_select_pcs)
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+ return 0;
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+
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+ pcs = pl->mac_ops->mac_select_pcs(pl->config, interface);
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+ if (!pcs)
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+ return 0;
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+
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+ return phylink_pcs_inband_caps(pcs, interface);
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+}
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+
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static void phylink_pcs_poll_stop(struct phylink *pl)
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{
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if (pl->cfg_link_an_mode == MLO_AN_INBAND)
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@@ -2532,6 +2559,26 @@ int phylink_ethtool_ksettings_get(struct
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}
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EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
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+static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl,
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+ phy_interface_t interface,
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+ unsigned long *adv)
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+{
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+ unsigned int inband = phylink_inband_caps(pl, interface);
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+ unsigned int mask;
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+
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+ /* If the PCS doesn't implement inband support, be permissive. */
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+ if (!inband)
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+ return true;
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+
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+ if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv))
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+ mask = LINK_INBAND_ENABLE;
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+ else
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+ mask = LINK_INBAND_DISABLE;
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+
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+ /* Check whether the PCS implements the required mode */
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+ return !!(inband & mask);
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+}
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+
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/**
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* phylink_ethtool_ksettings_set() - set the link settings
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* @pl: a pointer to a &struct phylink returned from phylink_create()
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@@ -2667,6 +2714,13 @@ int phylink_ethtool_ksettings_set(struct
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phylink_is_empty_linkmode(config.advertising))
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return -EINVAL;
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+ /* Validate the autonegotiation state. We don't have a PHY in this
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+ * situation, so the PCS is the media-facing entity.
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+ */
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+ if (!phylink_validate_pcs_inband_autoneg(pl, config.interface,
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+ config.advertising))
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+ return -EINVAL;
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+
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mutex_lock(&pl->state_mutex);
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pl->link_config.speed = config.speed;
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pl->link_config.duplex = config.duplex;
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@@ -3351,6 +3405,12 @@ static int phylink_sfp_config_optical(st
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phylink_dbg(pl, "optical SFP: chosen %s interface\n",
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phy_modes(interface));
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+ if (!phylink_validate_pcs_inband_autoneg(pl, interface,
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+ config.advertising)) {
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+ phylink_err(pl, "autoneg setting not compatible with PCS");
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+ return -EINVAL;
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+ }
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+
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config.interface = interface;
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/* Ignore errors if we're expecting a PHY to attach later */
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--- a/include/linux/phylink.h
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+++ b/include/linux/phylink.h
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@@ -419,6 +419,7 @@ struct phylink_pcs {
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/**
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* struct phylink_pcs_ops - MAC PCS operations structure.
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* @pcs_validate: validate the link configuration.
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+ * @pcs_inband_caps: query inband support for interface mode.
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* @pcs_enable: enable the PCS.
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* @pcs_disable: disable the PCS.
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* @pcs_pre_config: pre-mac_config method (for errata)
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@@ -434,6 +435,8 @@ struct phylink_pcs {
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struct phylink_pcs_ops {
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int (*pcs_validate)(struct phylink_pcs *pcs, unsigned long *supported,
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const struct phylink_link_state *state);
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+ unsigned int (*pcs_inband_caps)(struct phylink_pcs *pcs,
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+ phy_interface_t interface);
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int (*pcs_enable)(struct phylink_pcs *pcs);
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void (*pcs_disable)(struct phylink_pcs *pcs);
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void (*pcs_pre_config)(struct phylink_pcs *pcs,
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@@ -471,6 +474,20 @@ int pcs_validate(struct phylink_pcs *pcs
|
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const struct phylink_link_state *state);
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/**
|
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+ * pcs_inband_caps - query PCS in-band capabilities for interface mode.
|
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+ * @pcs: a pointer to a &struct phylink_pcs.
|
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+ * @interface: interface mode to be queried
|
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+ *
|
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+ * Returns zero if it is unknown what in-band signalling is supported by the
|
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+ * PHY (e.g. because the PHY driver doesn't implement the method.) Otherwise,
|
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+ * returns a bit mask of the LINK_INBAND_* values from
|
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+ * &enum link_inband_signalling to describe which inband modes are supported
|
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+ * for this interface mode.
|
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+ */
|
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+unsigned int pcs_inband_caps(struct phylink_pcs *pcs,
|
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+ phy_interface_t interface);
|
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+
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+/**
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* pcs_enable() - enable the PCS.
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* @pcs: a pointer to a &struct phylink_pcs.
|
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*/
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@ -99,10 +99,10 @@ Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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+ };
|
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+ };
|
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+
|
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+ pcs_uniphy1: ethernet-uniphy@7a10000 {
|
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+ pcs_uniphy1: ethernet-pcs@7a10000 {
|
||||
+ #address-cells = <1>;
|
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+ #size-cells = <0>;
|
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+ compatible = "qcom,ipq9574-uniphy";
|
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+ compatible = "qcom,ipq9574-pcs";
|
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+ reg = <0x7a10000 0x10000>;
|
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+ clocks = <&gcc GCC_UNIPHY1_SYS_CLK>,
|
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+ <&gcc GCC_UNIPHY1_AHB_CLK>;
|
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@ -116,7 +116,7 @@ Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
|
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+ "xpcs";
|
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+ #clock-cells = <1>;
|
||||
+
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+ pcsuniphy1_ch0: uniphy-ch@0 {
|
||||
+ pcsuniphy1_ch0: pcs-mii@0 {
|
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+ reg = <0>;
|
||||
+ clocks = <&nsscc NSS_CC_UNIPHY_PORT5_RX_CLK>,
|
||||
+ <&nsscc NSS_CC_UNIPHY_PORT5_TX_CLK>;
|
||||
|
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@ -0,0 +1,72 @@
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||||
From 930203b9bb94dc4ea9342f1ce176851918758ed7 Mon Sep 17 00:00:00 2001
|
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From: Mantas Pucka <mantas@8devices.com>
|
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Date: Mon, 2 Jun 2025 17:18:13 +0300
|
||||
Subject: [PATCH] net: pcs: ipq-uniphy: control MISC2 register for 2.5G
|
||||
support
|
||||
|
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When 2500base-x mode is enabled MISC2 regsister needs to have different
|
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value than for other 1G modes.
|
||||
|
||||
Signed-off-by: Mantas Pucka <mantas@8devices.com>
|
||||
---
|
||||
drivers/net/pcs/pcs-qcom-ipq9574.c | 17 ++++++++++++++++-
|
||||
1 file changed, 16 insertions(+), 1 deletion(-)
|
||||
|
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--- a/drivers/net/pcs/pcs-qcom-ipq9574.c
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||||
+++ b/drivers/net/pcs/pcs-qcom-ipq9574.c
|
||||
@@ -24,6 +24,11 @@
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#define PCS_CALIBRATION 0x1e0
|
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#define PCS_CALIBRATION_DONE BIT(7)
|
||||
|
||||
+#define PCS_MISC2 0x218
|
||||
+#define PCS_MISC2_MODE_MASK GENMASK(6, 5)
|
||||
+#define PCS_MISC2_MODE_SGMII FIELD_PREP(PCS_MISC2_MODE_MASK, 0x1)
|
||||
+#define PCS_MISC2_MODE_SGMII_PLUS FIELD_PREP(PCS_MISC2_MODE_MASK, 0x2)
|
||||
+
|
||||
#define PCS_MODE_CTRL 0x46c
|
||||
#define PCS_MODE_SEL_MASK GENMASK(12, 8)
|
||||
#define PCS_MODE_SGMII FIELD_PREP(PCS_MODE_SEL_MASK, 0x4)
|
||||
@@ -311,7 +316,7 @@ static int ipq_pcs_config_mode(struct ip
|
||||
phy_interface_t interface)
|
||||
{
|
||||
unsigned long rate = 125000000;
|
||||
- unsigned int val, mask = PCS_MODE_SEL_MASK;
|
||||
+ unsigned int val, misc2 = 0, mask = PCS_MODE_SEL_MASK;
|
||||
int ret;
|
||||
|
||||
/* Assert XPCS reset */
|
||||
@@ -321,6 +326,7 @@ static int ipq_pcs_config_mode(struct ip
|
||||
switch (interface) {
|
||||
case PHY_INTERFACE_MODE_SGMII:
|
||||
val = PCS_MODE_SGMII;
|
||||
+ misc2 = PCS_MISC2_MODE_SGMII;
|
||||
break;
|
||||
case PHY_INTERFACE_MODE_QSGMII:
|
||||
val = PCS_MODE_QSGMII;
|
||||
@@ -328,10 +334,12 @@ static int ipq_pcs_config_mode(struct ip
|
||||
case PHY_INTERFACE_MODE_1000BASEX:
|
||||
mask |= PCS_MODE_SGMII_CTRL_MASK;
|
||||
val = PCS_MODE_SGMII | PCS_MODE_SGMII_CTRL_1000BASEX;
|
||||
+ misc2 = PCS_MISC2_MODE_SGMII;
|
||||
break;
|
||||
case PHY_INTERFACE_MODE_2500BASEX:
|
||||
val = PCS_MODE_SGMII_PLUS;
|
||||
rate = 312500000;
|
||||
+ misc2 = PCS_MISC2_MODE_SGMII_PLUS;
|
||||
break;
|
||||
case PHY_INTERFACE_MODE_PSGMII:
|
||||
val = PCS_MODE_PSGMII;
|
||||
@@ -360,6 +368,13 @@ static int ipq_pcs_config_mode(struct ip
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
+ if (misc2) {
|
||||
+ ret = regmap_update_bits(qpcs->regmap, PCS_MISC2,
|
||||
+ PCS_MISC2_MODE_MASK, misc2);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
/* PCS PLL reset */
|
||||
ret = regmap_clear_bits(qpcs->regmap, PCS_PLL_RESET, PCS_ANA_SW_RESET);
|
||||
if (ret)
|
||||
@ -0,0 +1,25 @@
|
||||
From ccdfd293f9e948f0f62ac4e9924d72539a4e81ee Mon Sep 17 00:00:00 2001
|
||||
From: Mantas Pucka <mantas@8devices.com>
|
||||
Date: Mon, 2 Jun 2025 17:19:45 +0300
|
||||
Subject: [PATCH] net: pcs: ipq-uniphy: keep autoneg enabled in SGMII mode
|
||||
|
||||
For PHYs that don't use in-band-status (e.g. 2.5G PHY swiching between
|
||||
SGMII and 2500base-x), SGMII autoneg still must be enabled. Only mode
|
||||
that should use forced speed is 1000base-x
|
||||
|
||||
Signed-off-by: Mantas Pucka <mantas@8devices.com>
|
||||
---
|
||||
drivers/net/pcs/pcs-qcom-ipq9574.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/net/pcs/pcs-qcom-ipq9574.c
|
||||
+++ b/drivers/net/pcs/pcs-qcom-ipq9574.c
|
||||
@@ -431,7 +431,7 @@ static int ipq_pcs_config_sgmii(struct i
|
||||
/* Nothing to do here as in-band autoneg mode is enabled
|
||||
* by default for each PCS MII port.
|
||||
*/
|
||||
- if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
|
||||
+ if (interface != PHY_INTERFACE_MODE_1000BASEX)
|
||||
return 0;
|
||||
|
||||
/* Set force speed mode */
|
||||
@ -0,0 +1,24 @@
|
||||
From 0cff1d9bb695bdc0ad7bad234b92eddf849ce88f Mon Sep 17 00:00:00 2001
|
||||
From: Mantas Pucka <mantas@8devices.com>
|
||||
Date: Mon, 2 Jun 2025 17:20:58 +0300
|
||||
Subject: [PATCH] net: pcs: ipq-uniphy: fix USXGMII link-up failure
|
||||
|
||||
USXGMII link-up may fail due to too short delay after PLL reset.
|
||||
Increase the delay to fix this.
|
||||
|
||||
Signed-off-by: Mantas Pucka <mantas@8devices.com>
|
||||
---
|
||||
drivers/net/pcs/pcs-qcom-ipq9574.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/net/pcs/pcs-qcom-ipq9574.c
|
||||
+++ b/drivers/net/pcs/pcs-qcom-ipq9574.c
|
||||
@@ -380,7 +380,7 @@ static int ipq_pcs_config_mode(struct ip
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- fsleep(1000);
|
||||
+ fsleep(20000);
|
||||
ret = regmap_set_bits(qpcs->regmap, PCS_PLL_RESET, PCS_ANA_SW_RESET);
|
||||
if (ret)
|
||||
return ret;
|
||||
Loading…
Reference in New Issue
Block a user