rockchip: remove useless patches

This reverts commit 37e8122d2a.

target/linux/rockchip/patches-6.1/011-v6.3-net-rfkill-gpio-add-DT-support.patch

@@ -1,67 +0,0 @@
-From d64c732dfc9edcd57feb693c23162117737e426b Mon Sep 17 00:00:00 2001
-From: Philipp Zabel <p.zabel@pengutronix.de>
-Date: Mon, 2 Jan 2023 18:29:34 +0100
-Subject: [PATCH] net: rfkill: gpio: add DT support
-
-Allow probing rfkill-gpio via device tree. This hooks up the already
-existing support that was started in commit 262c91ee5e52 ("net:
-rfkill: gpio: prepare for DT and ACPI support") via the "rfkill-gpio"
-compatible, with the "name" and "type" properties renamed to "label"
-and "radio-type", respectively, in the device tree case.
-
-Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
-Link: https://lore.kernel.org/r/20230102-rfkill-gpio-dt-v2-2-d1b83758c16d@pengutronix.de
-Signed-off-by: Johannes Berg <johannes.berg@intel.com>
----
- net/rfkill/rfkill-gpio.c | 20 ++++++++++++++++++--
- 1 file changed, 18 insertions(+), 2 deletions(-)
-
---- a/net/rfkill/rfkill-gpio.c
-+++ b/net/rfkill/rfkill-gpio.c
-@@ -79,6 +79,8 @@ static int rfkill_gpio_probe(struct plat
- {
- 	struct rfkill_gpio_data *rfkill;
- 	struct gpio_desc *gpio;
-+	const char *name_property;
-+	const char *type_property;
- 	const char *type_name;
- 	int ret;
- 
-@@ -86,8 +88,15 @@ static int rfkill_gpio_probe(struct plat
- 	if (!rfkill)
- 		return -ENOMEM;
- 
--	device_property_read_string(&pdev->dev, "name", &rfkill->name);
--	device_property_read_string(&pdev->dev, "type", &type_name);
-+	if (dev_of_node(&pdev->dev)) {
-+		name_property = "label";
-+		type_property = "radio-type";
-+	} else {
-+		name_property = "name";
-+		type_property = "type";
-+	}
-+	device_property_read_string(&pdev->dev, name_property, &rfkill->name);
-+	device_property_read_string(&pdev->dev, type_property, &type_name);
- 
- 	if (!rfkill->name)
- 		rfkill->name = dev_name(&pdev->dev);
-@@ -169,12 +178,19 @@ static const struct acpi_device_id rfkil
- MODULE_DEVICE_TABLE(acpi, rfkill_acpi_match);
- #endif
- 
-+static const struct of_device_id rfkill_of_match[] __maybe_unused = {
-+	{ .compatible = "rfkill-gpio", },
-+	{ },
-+};
-+MODULE_DEVICE_TABLE(of, rfkill_of_match);
-+
- static struct platform_driver rfkill_gpio_driver = {
- 	.probe = rfkill_gpio_probe,
- 	.remove = rfkill_gpio_remove,
- 	.driver = {
- 		.name = "rfkill_gpio",
- 		.acpi_match_table = ACPI_PTR(rfkill_acpi_match),
-+		.of_match_table = of_match_ptr(rfkill_of_match),
- 	},
- };
- 

target/linux/rockchip/patches-6.12/206-arm64-dts-rockchip-add-bus-scan-delay-for-NanoPi-R4S.patch

@@ -1,10 +0,0 @@
---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
-@@ -514,6 +514,7 @@
- 	num-lanes = <2>;
- 	vpcie0v9-supply = <&vcca0v9_s3>;
- 	vpcie1v8-supply = <&vcca1v8_s3>;
-+	bus-scan-delay-ms = <1000>;
- 	status = "okay";
- };
- 

target/linux/rockchip/patches-6.12/994-rockchip-pcie-reimplement-bus-scan-delay.patch

@@ -1,96 +0,0 @@
---- a/Documentation/admin-guide/kernel-parameters.txt
-+++ b/Documentation/admin-guide/kernel-parameters.txt
-@@ -4967,6 +4967,14 @@
- 		nomsi	Do not use MSI for native PCIe PME signaling (this makes
- 			all PCIe root ports use INTx for all services).
- 
-+	pcie_rockchip_host.bus_scan_delay=	[PCIE] Delay in ms before
-+			scanning PCIe bus in Rockchip PCIe host driver. Some PCIe
-+			cards seem to need delays that can be several hundred ms.
-+			If set to greater than or equal to 0 this parameter will
-+			override delay that can be set in device tree.
-+			Values less than 0 mean that this parameter is ignored.
-+			default=-1
-+
- 	pcmv=		[HW,PCMCIA] BadgePAD 4
- 
- 	pd_ignore_unused
---- a/drivers/pci/controller/pcie-rockchip-host.c
-+++ b/drivers/pci/controller/pcie-rockchip-host.c
-@@ -32,10 +32,14 @@
- #include <linux/platform_device.h>
- #include <linux/reset.h>
- #include <linux/regmap.h>
-+#include <linux/moduleparam.h>
- 
- #include "../pci.h"
- #include "pcie-rockchip.h"
- 
-+static int bus_scan_delay = -1;
-+module_param_named(bus_scan_delay, bus_scan_delay, int, S_IRUGO);
-+
- static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip)
- {
- 	u32 status;
-@@ -933,6 +937,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
- 	struct device *dev = &pdev->dev;
- 	struct pci_host_bridge *bridge;
- 	int err;
-+	u32 delay = 0;
- 
- 	if (!dev->of_node)
- 		return -ENODEV;
-@@ -982,6 +987,26 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
- 	bridge->sysdata = rockchip;
- 	bridge->ops = &rockchip_pcie_ops;
- 
-+	/* Checking if bus scan delay was given from command line and prefer
-+	 * that over the value in device tree (which defaults to 0 if not set).
-+	 */
-+	if (bus_scan_delay >= 0) {
-+		delay = bus_scan_delay;
-+		dev_info(dev, "wait %u ms (from command-line) before bus scan\n", delay);
-+	} else {
-+		delay = rockchip->bus_scan_delay;
-+		dev_info(dev, "wait %u ms (from device tree) before bus scan\n", delay);
-+	}
-+	/* Workaround for some devices crashing on pci_host_probe / pci_scan_root_bus_bridge
-+	 * calls: sleep a bit before bus scan. Call trace gets to rockchip_pcie_rd_conf when
-+	 * trying to read vendor id (pci_bus_generic_read_dev_vendor_id is in call stack)
-+	 * before panicing. I have no idea why this works or what causes the panic. I just
-+	 * found this hack by luck when trying to "make it break differently if possible".
-+	 */
-+	if (delay > 0) {
-+		msleep(delay);
-+	}
-+
- 	err = rockchip_pcie_setup_irq(rockchip);
- 	if (err)
- 		goto err_remove_irq_domain;
---- a/drivers/pci/controller/pcie-rockchip.c
-+++ b/drivers/pci/controller/pcie-rockchip.c
-@@ -102,6 +102,12 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
- 		return dev_err_probe(dev, rockchip->num_clks,
- 				     "failed to get clocks\n");
- 
-+	err = of_property_read_u32(node, "bus-scan-delay-ms", &rockchip->bus_scan_delay);
-+	if (err) {
-+		dev_info(dev, "no bus scan delay, default to 0 ms\n");
-+		rockchip->bus_scan_delay = 0;
-+	}
-+
- 	return 0;
- }
- EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt);
---- a/drivers/pci/controller/pcie-rockchip.h
-+++ b/drivers/pci/controller/pcie-rockchip.h
-@@ -351,6 +351,8 @@ struct rockchip_pcie {
- 	phys_addr_t msg_bus_addr;
- 	bool is_rc;
- 	struct resource *mem_res;
-+	/* Bus scan delay is a workaround for some pcie devices causing crashes */
-+	u32 bus_scan_delay;
- };
- 
- static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg)
- 

target/linux/rockchip/patches-6.6/206-arm64-dts-rockchip-add-bus-scan-delay-for-NanoPi-R4S.patch

@@ -1,10 +0,0 @@
---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4.dtsi
-@@ -514,6 +514,7 @@
- 	num-lanes = <2>;
- 	vpcie0v9-supply = <&vcca0v9_s3>;
- 	vpcie1v8-supply = <&vcca1v8_s3>;
-+	bus-scan-delay-ms = <1000>;
- 	status = "okay";
- };
- 

target/linux/rockchip/patches-6.6/994-rockchip-pcie-reimplement-bus-scan-delay.patch

@@ -1,96 +0,0 @@
---- a/Documentation/admin-guide/kernel-parameters.txt
-+++ b/Documentation/admin-guide/kernel-parameters.txt
-@@ -4967,6 +4967,14 @@
- 		nomsi	Do not use MSI for native PCIe PME signaling (this makes
- 			all PCIe root ports use INTx for all services).
- 
-+	pcie_rockchip_host.bus_scan_delay=	[PCIE] Delay in ms before
-+			scanning PCIe bus in Rockchip PCIe host driver. Some PCIe
-+			cards seem to need delays that can be several hundred ms.
-+			If set to greater than or equal to 0 this parameter will
-+			override delay that can be set in device tree.
-+			Values less than 0 mean that this parameter is ignored.
-+			default=-1
-+
- 	pcmv=		[HW,PCMCIA] BadgePAD 4
- 
- 	pd_ignore_unused
---- a/drivers/pci/controller/pcie-rockchip-host.c
-+++ b/drivers/pci/controller/pcie-rockchip-host.c
-@@ -32,10 +32,14 @@
- #include <linux/platform_device.h>
- #include <linux/reset.h>
- #include <linux/regmap.h>
-+#include <linux/moduleparam.h>
- 
- #include "../pci.h"
- #include "pcie-rockchip.h"
- 
-+static int bus_scan_delay = -1;
-+module_param_named(bus_scan_delay, bus_scan_delay, int, S_IRUGO);
-+
- static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip)
- {
- 	u32 status;
-@@ -933,6 +937,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
- 	struct device *dev = &pdev->dev;
- 	struct pci_host_bridge *bridge;
- 	int err;
-+	u32 delay = 0;
- 
- 	if (!dev->of_node)
- 		return -ENODEV;
-@@ -982,6 +987,26 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
- 	bridge->sysdata = rockchip;
- 	bridge->ops = &rockchip_pcie_ops;
- 
-+	/* Checking if bus scan delay was given from command line and prefer
-+	 * that over the value in device tree (which defaults to 0 if not set).
-+	 */
-+	if (bus_scan_delay >= 0) {
-+		delay = bus_scan_delay;
-+		dev_info(dev, "wait %u ms (from command-line) before bus scan\n", delay);
-+	} else {
-+		delay = rockchip->bus_scan_delay;
-+		dev_info(dev, "wait %u ms (from device tree) before bus scan\n", delay);
-+	}
-+	/* Workaround for some devices crashing on pci_host_probe / pci_scan_root_bus_bridge
-+	 * calls: sleep a bit before bus scan. Call trace gets to rockchip_pcie_rd_conf when
-+	 * trying to read vendor id (pci_bus_generic_read_dev_vendor_id is in call stack)
-+	 * before panicing. I have no idea why this works or what causes the panic. I just
-+	 * found this hack by luck when trying to "make it break differently if possible".
-+	 */
-+	if (delay > 0) {
-+		msleep(delay);
-+	}
-+
- 	err = rockchip_pcie_setup_irq(rockchip);
- 	if (err)
- 		goto err_remove_irq_domain;
---- a/drivers/pci/controller/pcie-rockchip.c
-+++ b/drivers/pci/controller/pcie-rockchip.c
-@@ -102,6 +102,12 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
- 		return dev_err_probe(dev, rockchip->num_clks,
- 				     "failed to get clocks\n");
- 
-+	err = of_property_read_u32(node, "bus-scan-delay-ms", &rockchip->bus_scan_delay);
-+	if (err) {
-+		dev_info(dev, "no bus scan delay, default to 0 ms\n");
-+		rockchip->bus_scan_delay = 0;
-+	}
-+
- 	return 0;
- }
- EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt);
---- a/drivers/pci/controller/pcie-rockchip.h
-+++ b/drivers/pci/controller/pcie-rockchip.h
-@@ -351,6 +351,8 @@ struct rockchip_pcie {
- 	phys_addr_t msg_bus_addr;
- 	bool is_rc;
- 	struct resource *mem_res;
-+	/* Bus scan delay is a workaround for some pcie devices causing crashes */
-+	u32 bus_scan_delay;
- };
- 
- static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg)
-