From fc170dfd7943a1ef2cec289409ccd9e249c811d9 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 15 Jun 2018 00:17:33 +0800 Subject: [PATCH] update ramips target in 4.14 --- .../ramips/base-files/etc/board.d/01_leds | 1 + .../ramips/base-files/etc/board.d/02_network | 6 +- target/linux/ramips/base-files/etc/diag.sh | 1 + .../ramips/base-files/lib/upgrade/platform.sh | 1 + target/linux/ramips/dts/MIR3G.dts | 21 ++- target/linux/ramips/dts/WN-GX300GR.dts | 156 ++++++++++++++++++ target/linux/ramips/dts/mt7621.dtsi | 19 ++- .../files-4.14/drivers/mmc/host/mtk-mmc/sd.c | 18 +- target/linux/ramips/image/mt7621.mk | 8 + target/linux/ramips/mt7621/config-4.14 | 2 + ...spi-nor-w25q256-respect-default-mode.patch | 73 ++++++++ 11 files changed, 286 insertions(+), 20 deletions(-) create mode 100644 target/linux/ramips/dts/WN-GX300GR.dts create mode 100644 target/linux/ramips/patches-4.14/0054-mtd-spi-nor-w25q256-respect-default-mode.patch diff --git a/target/linux/ramips/base-files/etc/board.d/01_leds b/target/linux/ramips/base-files/etc/board.d/01_leds index ae5ac77b5..183ab2904 100755 --- a/target/linux/ramips/base-files/etc/board.d/01_leds +++ b/target/linux/ramips/base-files/etc/board.d/01_leds @@ -168,6 +168,7 @@ dlink,dwr-921-c1) ucidef_set_led_default "sigstrength" "Signal Strength" "$boardname:green:sigstrength" "0" ;; dir-810l|\ +iodata,wn-gx300gr|\ mzk-750dhp|\ mzk-dp150n|\ vr500) diff --git a/target/linux/ramips/base-files/etc/board.d/02_network b/target/linux/ramips/base-files/etc/board.d/02_network index 3a744bda0..7f732fed9 100755 --- a/target/linux/ramips/base-files/etc/board.d/02_network +++ b/target/linux/ramips/base-files/etc/board.d/02_network @@ -143,6 +143,7 @@ ramips_setup_interfaces() mzk-ex750np|\ na930|\ pbr-d1|\ + ravpower,wd03|\ tama,w06|\ u25awf-h1|\ wli-tx4-ag300n|\ @@ -194,6 +195,7 @@ ramips_setup_interfaces() gl-mt300n|\ gl-mt750|\ hg255d|\ + iodata,wn-gx300gr|\ jhr-n805r|\ jhr-n825r|\ jhr-n926r|\ @@ -210,7 +212,6 @@ ramips_setup_interfaces() ubnt-erx|\ ubnt-erx-sfp|\ ur-326n4g|\ - ravpower,wd03|\ wrtnode|\ wrtnode2p | \ wrtnode2r | \ @@ -459,6 +460,9 @@ ramips_setup_macs() [ -n "$lan_mac" ] || lan_mac=$(cat /sys/class/net/eth0/address) wan_mac=$(macaddr_add "$lan_mac" 1) ;; + iodata,wn-gx300gr) + wan_mac=$(macaddr_add "$(mtd_get_mac_binary Factory 4)" 1) + ;; kn_rc|\ kn_rf|\ kng_rc) diff --git a/target/linux/ramips/base-files/etc/diag.sh b/target/linux/ramips/base-files/etc/diag.sh index b4118358b..965cc0788 100644 --- a/target/linux/ramips/base-files/etc/diag.sh +++ b/target/linux/ramips/base-files/etc/diag.sh @@ -27,6 +27,7 @@ get_status_led() { fonera20n|\ firewrt|\ hg255d|\ + iodata,wn-gx300gr|\ kn|\ kn_rc|\ kn_rf|\ diff --git a/target/linux/ramips/base-files/lib/upgrade/platform.sh b/target/linux/ramips/base-files/lib/upgrade/platform.sh index 95cb7c33a..90159bcfa 100755 --- a/target/linux/ramips/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/base-files/lib/upgrade/platform.sh @@ -75,6 +75,7 @@ platform_check_image() { hpm|\ ht-tm02|\ hw550-3g|\ + iodata,wn-gx300gr|\ ip2202|\ jhr-n805r|\ jhr-n825r|\ diff --git a/target/linux/ramips/dts/MIR3G.dts b/target/linux/ramips/dts/MIR3G.dts index efe98b0e1..44dfc1796 100644 --- a/target/linux/ramips/dts/MIR3G.dts +++ b/target/linux/ramips/dts/MIR3G.dts @@ -66,16 +66,19 @@ }; }; - gpio_export { - compatible = "gpio-export"; - #size-cells = <0>; - - usbpower { - gpio-export,name = "usbpower"; - gpio-export,output = <1>; - gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; - }; + reg_usb_vbus: reg_usb_vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; + enable-active-high; }; + +}; + +&xhci { + vbus-supply = <®_usb_vbus>; }; &nand { diff --git a/target/linux/ramips/dts/WN-GX300GR.dts b/target/linux/ramips/dts/WN-GX300GR.dts new file mode 100644 index 000000000..aa89f0555 --- /dev/null +++ b/target/linux/ramips/dts/WN-GX300GR.dts @@ -0,0 +1,156 @@ +/dts-v1/; + +#include "mt7621.dtsi" + +#include +#include + +/ { + compatible = "iodata,wn-gx300gr", "mediatek,mt7621-soc"; + model = "I-O DATA WN-GX300GR"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power { + label = "wn-gx300gr:green:power"; + gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wn-gx300gr:green:wps"; + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <20>; + + reset { + label = "reset"; + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + auto { + label = "auto"; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + + custom { + label = "custom"; + gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + }; +}; + +&spi0 { + status = "okay"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + m25p,chunked-io = <32>; + + partition@0 { + label = "Bootloader"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "Config"; + reg = <0x30000 0x10000>; + read-only; + }; + + Factory: partition@40000 { + label = "Factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "iNIC_rf"; + reg = <0x50000 0x10000>; + read-only; + }; + + partition@60000 { + label = "firmware"; + reg = <0x60000 0x770000>; + }; + + partition@7d0000 { + label = "Key"; + reg = <0x7d0000 0x10000>; + read-only; + }; + + partition@7e0000 { + label = "backup"; + reg = <0x7e0000 0x10000>; + read-only; + }; + + partition@7f0000 { + label = "storage"; + reg = <0x7f0000 0x10000>; + read-only; + }; + }; +}; + +ðernet { + mtd-mac-address = <&Factory 0x4>; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "uart2", "uart3", "jtag"; + ralink,function = "gpio"; + }; + }; +}; + +&pcie { + status = "okay"; + + pcie0 { + mt76@0,0 { + reg = <0x0000 0 0 0 0>; + device_type = "pci"; + mediatek,mtd-eeprom = <&Factory 0x0>; + }; + }; +}; + +&xhci { + status = "disabled"; +}; diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi index daca857f6..0655e3530 100644 --- a/target/linux/ramips/dts/mt7621.dtsi +++ b/target/linux/ramips/dts/mt7621.dtsi @@ -6,16 +6,23 @@ compatible = "mediatek,mt7621-soc"; cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; compatible = "mips,mips1004Kc"; + reg = <0x0>; }; cpu@1 { + device_type = "cpu"; compatible = "mips,mips1004Kc"; + reg = <0x1>; }; }; - cpuintc: cpuintc@0 { + cpuintc: cpuintc { #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; @@ -26,7 +33,7 @@ serial0 = &uartlite; }; - cpuclock: cpuclock@0 { + cpuclock: cpuclock { #clock-cells = <0>; compatible = "fixed-clock"; @@ -34,7 +41,7 @@ clock-frequency = <880000000>; }; - sysclock: sysclock@0 { + sysclock: sysclock { #clock-cells = <0>; compatible = "fixed-clock"; @@ -457,8 +464,6 @@ #address-cells = <3>; #size-cells = <2>; - - device_type = "pci"; }; pcie1 { @@ -466,8 +471,6 @@ #address-cells = <3>; #size-cells = <2>; - - device_type = "pci"; }; pcie2 { @@ -475,8 +478,6 @@ #address-cells = <3>; #size-cells = <2>; - - device_type = "pci"; }; }; }; diff --git a/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c b/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c index 2a032fcba..97ae927d2 100644 --- a/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c +++ b/target/linux/ramips/files-4.14/drivers/mmc/host/mtk-mmc/sd.c @@ -2209,7 +2209,23 @@ static int msdc_drv_probe(struct platform_device *pdev) // Set the pins for sdxc to sdxc mode //FIXME: this should be done by pinctl and not by the sd driver - reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3 << 18); + if (ralink_soc == MT762X_SOC_MT7620A || + ralink_soc == MT762X_SOC_MT7621AT) { + reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + + 0x60)) & ~(0x3 << 18); + if (ralink_soc == MT762X_SOC_MT7620A) + reg |= 0x1 << 18; + } else { + reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c)); + reg |= 0x1e << 16; + sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x3c), reg); + reg = sdr_read32((void __iomem *)(RALINK_SYSCTL_BASE + + 0x60)) & ~(0x3 << 10); +#if defined(CONFIG_MTK_MMC_EMMC_8BIT) + reg |= 0x3 << 26 | 0x3 << 28 | 0x3 << 30; +#endif + } + sdr_write32((void __iomem *)(RALINK_SYSCTL_BASE + 0x60), reg); hw = &msdc0_hw; diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index b20f35976..5bbdd2074 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -114,6 +114,14 @@ define Device/hc5962 endef TARGET_DEVICES += hc5962 +define Device/iodata_wn-gx300gr + DTS := WN-GX300GR + IMAGE_SIZE := 7798784 + DEVICE_TITLE := I-O DATA WN-GX300GR + DEVICE_PACKAGES := kmod-mt7603 wpad-mini +endef +TARGET_DEVICES += iodata_wn-gx300gr + define Device/k2p DTS := K2P IMAGE_SIZE := $(ralink_default_fw_size_16M) diff --git a/target/linux/ramips/mt7621/config-4.14 b/target/linux/ramips/mt7621/config-4.14 index 3a5cd4296..c19d735e5 100644 --- a/target/linux/ramips/mt7621/config-4.14 +++ b/target/linux/ramips/mt7621/config-4.14 @@ -227,6 +227,8 @@ CONFIG_RCU_STALL_COMMON=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_SPI=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_RESET_CONTROLLER=y CONFIG_RFS_ACCEL=y CONFIG_RPS=y diff --git a/target/linux/ramips/patches-4.14/0054-mtd-spi-nor-w25q256-respect-default-mode.patch b/target/linux/ramips/patches-4.14/0054-mtd-spi-nor-w25q256-respect-default-mode.patch new file mode 100644 index 000000000..568d61db9 --- /dev/null +++ b/target/linux/ramips/patches-4.14/0054-mtd-spi-nor-w25q256-respect-default-mode.patch @@ -0,0 +1,73 @@ +--- a/drivers/mtd/spi-nor/spi-nor.c ++++ b/drivers/mtd/spi-nor/spi-nor.c +@@ -142,20 +142,29 @@ static int read_fsr(struct spi_nor *nor) + * location. Return the configuration register value. + * Returns negative if error occurred. + */ +-static int read_cr(struct spi_nor *nor) ++static int _read_cr(struct spi_nor *nor, u8 reg) + { + int ret; + u8 val; + +- ret = nor->read_reg(nor, SPINOR_OP_RDCR, &val, 1); ++ ret = nor->read_reg(nor, reg, &val, 1); + if (ret < 0) { +- dev_err(nor->dev, "error %d reading CR\n", ret); ++ dev_err(nor->dev, "error %d reading %s\n", ret, ++ (reg==SPINOR_OP_RDCR)?"CR":"XCR"); + return ret; + } + + return val; + } + ++static inline int read_cr(struct spi_nor *nor) { ++ return _read_cr(nor, SPINOR_OP_RDCR); ++} ++ ++static inline int read_xcr(struct spi_nor *nor) { ++ return _read_cr(nor, SPINOR_OP_RDXCR); ++} ++ + /* + * Write status register 1 byte + * Returns negative if error occurred. +@@ -2878,9 +2887,16 @@ int spi_nor_scan(struct spi_nor *nor, co + } else if (mtd->size > 0x1000000) { + /* enable 4-byte addressing if the device exceeds 16MiB */ + nor->addr_width = 4; +- if (info->flags & SPI_NOR_4B_READ_OP) +- spi_nor_set_4byte_read(nor, info); +- else if (JEDEC_MFR(info) == SNOR_MFR_SPANSION || ++ if (info->flags & SPI_NOR_4B_READ_OP) { ++ if (JEDEC_MFR(info) == SNOR_MFR_WINBOND) { ++ ret = read_xcr(nor); ++ if (!(ret > 0 && (ret & XCR_DEF_4B_ADDR_MODE))) ++ spi_nor_set_4byte_read(nor, info); ++ else ++ set_4byte(nor, info, 1); ++ } else ++ spi_nor_set_4byte_read(nor, info); ++ } else if (JEDEC_MFR(info) == SNOR_MFR_SPANSION || + info->flags & SPI_NOR_4B_OPCODES) + spi_nor_set_4byte_opcodes(nor, info); + else +--- a/include/linux/mtd/spi-nor.h ++++ b/include/linux/mtd/spi-nor.h +@@ -103,6 +103,7 @@ + #define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */ + #define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */ + #define SPINOR_OP_WREAR 0xc5 /* Write extended address register */ ++#define SPINOR_OP_RDXCR 0x15 /* Read extended configuration register */ + + /* Used for Spansion flashes only. */ + #define SPINOR_OP_BRWR 0x17 /* Bank register write */ +@@ -135,6 +136,7 @@ + + /* Configuration Register bits. */ + #define CR_QUAD_EN_SPAN BIT(1) /* Spansion Quad I/O */ ++#define XCR_DEF_4B_ADDR_MODE BIT(1) /* Winbond 4B mode default */ + + /* Status Register 2 bits. */ + #define SR2_QUAD_EN_BIT7 BIT(7)