--- a/nss_core.c
+++ b/nss_core.c
@@ -518,7 +518,7 @@ static uint32_t nss_soc_mem_info(void)
 		goto err_use_default_memsize;
 	}
 
-	nss_info_always("NSS DDR size is 0x%x\n", (uint32_t) resource_size(&r));
+	nss_info("NSS DDR size is 0x%x\n", (uint32_t) resource_size(&r));
 
 	return resource_size(&r);
 
--- a/nss_hal/ipq95xx/nss_hal_pvt.c
+++ b/nss_hal/ipq95xx/nss_hal_pvt.c
@@ -724,19 +724,19 @@ static int __nss_hal_clock_configure(str
 		}
 	}
 
-	nss_info_always("Supported Frequencies - ");
+	nss_info("Supported Frequencies - ");
 	for (i = 0; i < NSS_FREQ_MAX_SCALE; i++) {
 		switch (nss_runtime_samples.freq_scale[i].frequency) {
 		case NSS_FREQ_748:
-			nss_info_always("748 MHz ");
+			nss_info("748 MHz ");
 			break;
 
 		case NSS_FREQ_1497:
-			nss_info_always("1.497 GHz ");
+			nss_info("1.497 GHz ");
 			break;
 
 		case NSS_FREQ_1689:
-			nss_info_always("1.689 GHz ");
+			nss_info("1.689 GHz ");
 			break;
 
 		default: