Merge branch 'openwrt:main' into main

config/Config-build.in

@@ -358,9 +358,11 @@ menu "Global build settings"
 		config PKG_FORTIFY_SOURCE_NONE
 			bool "None"
 		config PKG_FORTIFY_SOURCE_1
-			bool "Conservative"
+			bool "Conservative Level 1"
 		config PKG_FORTIFY_SOURCE_2
-			bool "Aggressive"
+			bool "Aggressive Level 2"
+		config PKG_FORTIFY_SOURCE_3
+			bool "Aggressive Level 3"
 	endchoice
 
 	choice

include/hardening.mk

@@ -51,6 +51,11 @@ ifdef CONFIG_PKG_FORTIFY_SOURCE_2
     TARGET_CFLAGS += -D_FORTIFY_SOURCE=2
   endif
 endif
+ifdef CONFIG_PKG_FORTIFY_SOURCE_3
+  ifeq ($(strip $(PKG_FORTIFY_SOURCE)),1)
+    TARGET_CFLAGS += -D_FORTIFY_SOURCE=3
+  endif
+endif
 ifdef CONFIG_PKG_RELRO_PARTIAL
   ifeq ($(strip $(PKG_RELRO)),1)
     TARGET_CFLAGS += -Wl,-z,relro

include/image-commands.mk

@@ -431,7 +431,10 @@ define Build/initrd_compression
 endef
 
 define Build/fit
-	$(call locked,$(TOPDIR)/scripts/mkits.sh \
+	$(if $(findstring with-rootfs,$(word 3,$(1))), \
+		$(call locked,dd if=$(IMAGE_ROOTFS) of=$(IMAGE_ROOTFS).pagesync bs=4096 conv=sync, \
+		  gen-cpio$(if $(TARGET_PER_DEVICE_ROOTFS),.$(ROOTFS_ID/$(DEVICE_NAME)))))
+	$(TOPDIR)/scripts/mkits.sh \
 		-D $(DEVICE_NAME) -o $@.its -k $@ \
 		-C $(word 1,$(1)) \
 		$(if $(word 2,$(1)),\
@@ -448,9 +451,10 @@ define Build/fit
 		$(if $(DEVICE_DTS_LOADADDR),-s $(DEVICE_DTS_LOADADDR)) \
 		$(if $(DEVICE_DTS_OVERLAY),$(foreach dtso,$(DEVICE_DTS_OVERLAY), -O $(dtso):$(KERNEL_BUILD_DIR)/image-$(dtso).dtbo)) \
 		-c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config-1") \
-		-A $(LINUX_KARCH) -v $(LINUX_VERSION), gen-cpio$(if $(TARGET_PER_DEVICE_ROOTFS),.$(ROOTFS_ID/$(DEVICE_NAME))))
+		-A $(LINUX_KARCH) -v $(LINUX_VERSION)
 	$(call locked,PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage $(if $(findstring external,$(word 3,$(1))),\
-		-E -B 0x1000 $(if $(findstring static,$(word 3,$(1))),-p 0x1000)) -f $@.its $@.new)
+		-E -B 0x1000 $(if $(findstring static,$(word 3,$(1))),-p 0x1000)) -f $@.its $@.new, \
+	  gen-cpio$(if $(TARGET_PER_DEVICE_ROOTFS),.$(ROOTFS_ID/$(DEVICE_NAME))))
 	@mv $@.new $@
 endef
 

package/boot/uboot-bcm53xx/Makefile

@@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_VERSION:=2024.01
 PKG_HASH:=b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3
-PKG_RELEASE:=$(AUTORELEASE)
+PKG_RELEASE:=2
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk

package/boot/uboot-bmips/Makefile

@@ -2,7 +2,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_VERSION:=2024.04
 PKG_HASH:=18a853fe39fad7ad03a90cc2d4275aeaed6da69735defac3492b80508843dd4a
-PKG_RELEASE:=$(AUTORELEASE)
+PKG_RELEASE:=1
 
 include $(INCLUDE_DIR)/u-boot.mk
 include $(INCLUDE_DIR)/package.mk

package/boot/uboot-mediatek/Makefile

@@ -362,6 +362,18 @@ define U-Boot/mt7981_jcg_q30-pro
   DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
 endef
 
+define U-Boot/mt7981_konka_komi-a31
+  NAME:=Konka KOMI A31
+  BUILD_SUBTARGET:=filogic
+  BUILD_DEVICES:=konka_komi-a31
+  UBOOT_CONFIG:=mt7981_konka_komi-a31
+  UBOOT_IMAGE:=u-boot.fip
+  BL2_BOOTDEV:=spim-nand
+  BL2_SOC:=mt7981
+  BL2_DDRTYPE:=ddr3
+  DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
+endef
+
 define U-Boot/mt7981_netis_nx31
   NAME:=netis NX31
   BUILD_SUBTARGET:=filogic
@@ -951,6 +963,7 @@ UBOOT_TARGETS := \
 	mt7981_glinet_gl-xe3000 \
 	mt7981_h3c_magic-nx30-pro \
 	mt7981_jcg_q30-pro \
+	mt7981_konka_komi-a31 \
 	mt7981_netis_nx31 \
 	mt7981_nokia_ea0326gmp \
 	mt7981_openwrt_one-snand \

package/boot/uboot-mediatek/patches/447-add-konka_komi-a31.patch

@@ -0,0 +1,329 @@
+--- /dev/null
++++ b/configs/mt7981_konka_komi-a31_defconfig
+@@ -0,0 +1,108 @@
++CONFIG_ARM=y
++CONFIG_SYS_HAS_NONCACHED_MEMORY=y
++CONFIG_POSITION_INDEPENDENT=y
++CONFIG_ARCH_MEDIATEK=y
++CONFIG_TEXT_BASE=0x41e00000
++CONFIG_SYS_MALLOC_F_LEN=0x4000
++CONFIG_NR_DRAM_BANKS=1
++CONFIG_DEFAULT_DEVICE_TREE="mt7981-konka-komi-a31"
++CONFIG_OF_LIBFDT_OVERLAY=y
++CONFIG_TARGET_MT7981=y
++CONFIG_SYS_LOAD_ADDR=0x46000000
++CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
++CONFIG_DEBUG_UART_BASE=0x11002000
++CONFIG_DEBUG_UART_CLOCK=40000000
++CONFIG_DEBUG_UART=y
++CONFIG_FIT=y
++CONFIG_BOOTDELAY=30
++CONFIG_AUTOBOOT_KEYED=y
++CONFIG_AUTOBOOT_MENU_SHOW=y
++CONFIG_DEFAULT_FDT_FILE="mediatek/mt7981-konka-komi-a31.dtb"
++CONFIG_LOGLEVEL=7
++CONFIG_PRE_CONSOLE_BUFFER=y
++CONFIG_LOG=y
++# CONFIG_BOARD_INIT is not set
++CONFIG_BOARD_LATE_INIT=y
++CONFIG_HUSH_PARSER=y
++CONFIG_SYS_PROMPT="MT7981> "
++CONFIG_CMD_CPU=y
++CONFIG_CMD_LICENSE=y
++CONFIG_CMD_BOOTMENU=y
++CONFIG_CMD_ASKENV=y
++CONFIG_CMD_ERASEENV=y
++CONFIG_CMD_ENV_FLAGS=y
++CONFIG_CMD_STRINGS=y
++CONFIG_CMD_DM=y
++CONFIG_CMD_GPIO=y
++CONFIG_CMD_GPT=y
++CONFIG_CMD_MTD=y
++CONFIG_CMD_PART=y
++CONFIG_CMD_TFTPSRV=y
++CONFIG_CMD_RARP=y
++CONFIG_CMD_CDP=y
++CONFIG_CMD_SNTP=y
++CONFIG_CMD_LINK_LOCAL=y
++CONFIG_CMD_DHCP=y
++CONFIG_CMD_DNS=y
++CONFIG_CMD_PING=y
++CONFIG_CMD_PXE=y
++CONFIG_CMD_CACHE=y
++CONFIG_CMD_PSTORE=y
++CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
++CONFIG_CMD_UUID=y
++CONFIG_CMD_HASH=y
++CONFIG_CMD_SMC=y
++CONFIG_CMD_UBI=y
++CONFIG_CMD_UBI_RENAME=y
++CONFIG_OF_EMBED=y
++CONFIG_ENV_OVERWRITE=y
++CONFIG_ENV_IS_IN_UBI=y
++CONFIG_ENV_REDUNDANT=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="ubootenv"
++CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
++CONFIG_ENV_RELOC_GD_ENV_ADDR=y
++CONFIG_ENV_USE_DEFAULT_ENV_TEXT_FILE=y
++CONFIG_ENV_DEFAULT_ENV_TEXT_FILE="defenvs/konka_komi-a31_env"
++CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
++CONFIG_VERSION_VARIABLE=y
++CONFIG_NETCONSOLE=y
++CONFIG_USE_IPADDR=y
++CONFIG_IPADDR="192.168.1.1"
++CONFIG_USE_SERVERIP=y
++CONFIG_SERVERIP="192.168.1.254"
++CONFIG_NET_RANDOM_ETHADDR=y
++CONFIG_REGMAP=y
++CONFIG_SYSCON=y
++CONFIG_BUTTON=y
++CONFIG_BUTTON_GPIO=y
++CONFIG_CLK=y
++CONFIG_GPIO_HOG=y
++CONFIG_LED=y
++CONFIG_LED_BLINK=y
++CONFIG_LED_GPIO=y
++# CONFIG_MMC is not set
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++CONFIG_MTD_UBI_FASTMAP=y
++CONFIG_PHY_FIXED=y
++CONFIG_MEDIATEK_ETH=y
++CONFIG_PHY=y
++CONFIG_PINCTRL=y
++CONFIG_PINCONF=y
++CONFIG_PINCTRL_MT7981=y
++CONFIG_POWER_DOMAIN=y
++CONFIG_MTK_POWER_DOMAIN=y
++CONFIG_DM_REGULATOR=y
++CONFIG_DM_REGULATOR_FIXED=y
++CONFIG_DM_REGULATOR_GPIO=y
++CONFIG_RAM=y
++CONFIG_DM_SERIAL=y
++CONFIG_SERIAL_RX_BUFFER=y
++CONFIG_MTK_SERIAL=y
++CONFIG_SPI=y
++CONFIG_DM_SPI=y
++CONFIG_MTK_SPIM=y
++CONFIG_ZSTD=y
++CONFIG_HEXDUMP=y
+--- /dev/null
++++ b/arch/arm/dts/mt7981-konka-komi-a31.dts
+@@ -0,0 +1,158 @@
++// SPDX-License-Identifier: GPL-2.0-or-later
++
++/dts-v1/;
++#include "mt7981.dtsi"
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/linux-event-codes.h>
++
++/ {
++	#address-cells = <1>;
++	#size-cells = <1>;
++	model = "Konka KOMI A31";
++	compatible = "mediatek,mt7981", "mediatek,mt7981-rfb";
++
++	chosen {
++		stdout-path = &uart0;
++		tick-timer = &timer0;
++	};
++
++	memory@40000000 {
++		device_type = "memory";
++		reg = <0x40000000 0x10000000>;
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++
++		button-mesh {
++			label = "mesh";
++			linux,code = <BTN_9>;
++			linux,input-type = <EV_SW>;
++			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
++		};
++
++		button-reset {
++			label = "reset";
++			linux,code = <KEY_RESTART>;
++			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
++		};
++	};
++
++	gpio-leds {
++		compatible = "gpio-leds";
++
++		green_led: led-0 {
++			label = "green:status";
++			gpios = <&pio 8 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++		};
++
++		led-1 {
++			label = "blue:status";
++			gpios = <&pio 13 GPIO_ACTIVE_LOW>;
++			default-state = "off";
++		};
++
++		red_led: led-2 {
++			label = "red:status";
++			gpios = <&pio 34 GPIO_ACTIVE_HIGH>;
++			default-state = "on";
++		};
++	};
++};
++
++&eth {
++	status = "okay";
++	mediatek,gmac-id = <0>;
++	phy-mode = "2500base-x";
++	mediatek,switch = "mt7531";
++	reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
++
++	fixed-link {
++		speed = <2500>;
++		full-duplex;
++	};
++};
++
++&pio {
++	spi_flash_pins: spi0-pins-func-1 {
++		mux {
++			function = "flash";
++			groups = "spi0", "spi0_wp_hold";
++		};
++
++		conf-pu {
++			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
++			drive-strength = <MTK_DRIVE_8mA>;
++			bias-pull-up = <MTK_PUPD_SET_R1R0_00>;
++		};
++
++		conf-pd {
++			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
++			drive-strength = <MTK_DRIVE_8mA>;
++			bias-pull-down = <MTK_PUPD_SET_R1R0_00>;
++		};
++	};
++};
++
++&spi0 {
++	#address-cells = <1>;
++	#size-cells = <0>;
++	pinctrl-names = "default";
++	pinctrl-0 = <&spi_flash_pins>;
++	status = "okay";
++	must_tx;
++	enhance_timing;
++	dma_ext;
++	ipm_design;
++	support_quad;
++	tick_dly = <2>;
++	sample_sel = <0>;
++
++	spi_nand@0 {
++		compatible = "spi-nand";
++		reg = <0>;
++		spi-max-frequency = <52000000>;
++
++		partitions {
++			compatible = "fixed-partitions";
++			#address-cells = <1>;
++			#size-cells = <1>;
++
++			partition@0 {
++				label = "bl2";
++				reg = <0x0 0x100000>;
++			};
++
++			partition@100000 {
++				label = "u-boot-env";
++				reg = <0x100000 0x80000>;
++			};
++
++			partition@180000 {
++				label = "factory";
++				reg = <0x180000 0x200000>;
++			};
++
++			partition@380000 {
++				label = "fip";
++				reg = <0x380000 0x200000>;
++			};
++
++			partition@580000 {
++				label = "ubi";
++				reg = <0x580000 0x7a80000>;
++				compatible = "linux,ubi";
++			};
++		};
++	};
++};
++
++&uart0 {
++	mediatek,force-highspeed;
++	status = "okay";
++};
++
++&watchdog {
++	status = "disabled";
++};
+--- /dev/null
++++ b/defenvs/konka_komi-a31_env
+@@ -0,0 +1,54 @@
++ipaddr=192.168.1.1
++serverip=192.168.1.254
++loadaddr=0x46000000
++console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
++bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
++bootconf=config-1
++bootdelay=0
++bootfile=openwrt-mediatek-filogic-konka_komi-a31-initramfs-recovery.itb
++bootfile_bl2=openwrt-mediatek-filogic-konka_komi-a31-preloader.bin
++bootfile_fip=openwrt-mediatek-filogic-konka_komi-a31-bl31-uboot.fip
++bootfile_upg=openwrt-mediatek-filogic-konka_komi-a31-squashfs-sysupgrade.itb
++bootled_pwr=red:status
++bootled_rec=blue:status
++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
++bootmenu_default=0
++bootmenu_delay=0
++bootmenu_title=      ( ( ( OpenWrt ) ) )
++bootmenu_0=Initialize environment.=run _firstboot
++bootmenu_0d=Run default boot command.=run boot_default
++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
++bootmenu_2=Boot production system from NAND.=run boot_production ; run bootmenu_confirm_return
++bootmenu_3=Boot recovery system from NAND.=run boot_recovery ; run bootmenu_confirm_return
++bootmenu_4=Load production system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
++bootmenu_5=Load recovery system via TFTP then write to NAND.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
++bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to NAND.=run boot_tftp_write_fip ; run bootmenu_confirm_return
++bootmenu_7=Load BL2 preloader via TFTP then write to NAND.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
++bootmenu_8=Reboot.=reset
++bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
++boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
++boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
++boot_recovery=led $bootled_rec on ; run ubi_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
++boot_ubi=run boot_production ; run boot_recovery ; run boot_tftp_forever
++boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run ubi_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
++boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
++boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
++reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
++mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
++mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
++ubi_create_env=ubi check ubootenv || ubi create ubootenv 0x100000 dynamic || run ubi_format ; ubi check ubootenv2 || ubi create ubootenv2 0x100000 dynamic || run ubi_format
++ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
++ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
++ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
++ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
++ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
++ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
++ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
++_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
++_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       $ver"

package/boot/uboot-sifiveu/patches/002-scripts-dtc-pylibfdt-libfdt-i_shipped-Use-SWIG_AppendOutp.patch

@@ -0,0 +1,55 @@
+From a63456b9191fae2fe49f4b121e025792022e3950 Mon Sep 17 00:00:00 2001
+From: Markus Volk <f_l_k@t-online.de>
+Date: Wed, 30 Oct 2024 06:07:16 +0100
+Subject: [PATCH] scripts/dtc/pylibfdt/libfdt.i_shipped: Use SWIG_AppendOutput
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Swig has changed language specific AppendOutput functions. The helper
+macro SWIG_AppendOutput remains unchanged. Use that instead
+of SWIG_Python_AppendOutput, which would require an extra parameter
+since swig 4.3.0.
+
+/home/flk/poky/build-test/tmp/work/qemux86_64-poky-linux/u-boot/2024.10/git/arch/x86/cpu/u-boot-64.lds
+| scripts/dtc/pylibfdt/libfdt_wrap.c: In function ‘_wrap_fdt_next_node’:
+| scripts/dtc/pylibfdt/libfdt_wrap.c:5581:17: error: too few arguments to function ‘SWIG_Python_AppendOutput’
+|  5581 |     resultobj = SWIG_Python_AppendOutput(resultobj, val);
+|       |                 ^~~~~~~~~~~~~~~~~~~~~~~~
+
+Signed-off-by: Markus Volk <f_l_k@t-online.de>
+Reported-by: Rudi Heitbaum <rudi@heitbaum.com>
+Link: https://github.com/dgibson/dtc/pull/154
+---
+ scripts/dtc/pylibfdt/libfdt.i_shipped | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/scripts/dtc/pylibfdt/libfdt.i_shipped
++++ b/scripts/dtc/pylibfdt/libfdt.i_shipped
+@@ -1037,7 +1037,7 @@ typedef uint32_t fdt32_t;
+ 			fdt_string(fdt1, fdt32_to_cpu($1->nameoff)));
+ 		buff = PyByteArray_FromStringAndSize(
+ 			(const char *)($1 + 1), fdt32_to_cpu($1->len));
+-		resultobj = SWIG_Python_AppendOutput(resultobj, buff);
++		resultobj = SWIG_AppendOutput(resultobj, buff);
+ 	}
+ }
+ 
+@@ -1076,7 +1076,7 @@ typedef uint32_t fdt32_t;
+ 
+ %typemap(argout) int *depth {
+         PyObject *val = Py_BuildValue("i", *arg$argnum);
+-        resultobj = SWIG_Python_AppendOutput(resultobj, val);
++        resultobj = SWIG_AppendOutput(resultobj, val);
+ }
+ 
+ %apply int *depth { int *depth };
+@@ -1092,7 +1092,7 @@ typedef uint32_t fdt32_t;
+            if (PyTuple_GET_SIZE(resultobj) == 0)
+               resultobj = val;
+            else
+-              resultobj = SWIG_Python_AppendOutput(resultobj, val);
++              resultobj = SWIG_AppendOutput(resultobj, val);
+         }
+ }
+ 

package/boot/uboot-tools/uboot-envtools/files/mediatek_filogic

@@ -28,6 +28,7 @@ cmcc,a10-ubootmod|\
 cudy,tr3000-v1-ubootmod|\
 h3c,magic-nx30-pro|\
 jcg,q30-pro|\
+konka,komi-a31|\
 mercusys,mr90x-v1-ubi|\
 netcore,n60|\
 netcore,n60-pro|\

package/devel/valgrind/Makefile

@@ -8,15 +8,15 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=valgrind
-PKG_VERSION:=3.23.0
+PKG_VERSION:=3.26.0
 PKG_RELEASE:=1
 
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
 PKG_SOURCE_URL:=https://sourceware.org/pub/valgrind/
-PKG_HASH:=c5c34a3380457b9b75606df890102e7df2c702b9420c2ebef9540f8b5d56264d
+PKG_HASH:=8d54c717029106f1644aadaf802ab9692e53d93dd015cbd19e74190eba616bd7
 
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
-PKG_LICENSE:=GPL-2.0+
+PKG_LICENSE:=GPL-3.0
 PKG_CPE_ID:=cpe:/a:valgrind:valgrind
 
 PKG_FIXUP = autoreconf
@@ -33,7 +33,7 @@ include $(INCLUDE_DIR)/kernel.mk
 define Package/valgrind
   SECTION:=devel
   CATEGORY:=Development
-  DEPENDS:=@mips||mipsel||mips64||mips64el||i386||x86_64||powerpc||arm_v7||aarch64 +libpthread +librt
+  DEPENDS:=@mips||mipsel||mips64||mips64el||i386||x86_64||powerpc||arm_v7||aarch64||riscv64 +libpthread +librt
   TITLE:=debugging and profiling tools for Linux
   URL:=http://www.valgrind.org
 endef
@@ -82,7 +82,7 @@ define Package/valgrind/description
 	to speed up and reduce memory use of your programs.
 endef
 
-CPU := $(patsubst x86_64,amd64,$(patsubst x86,i386,$(patsubst um,$(ARCH),$(LINUX_KARCH))))
+CPU := $(patsubst riscv,riscv64,$(patsubst x86_64,amd64,$(patsubst x86,i386,$(patsubst um,$(ARCH),$(LINUX_KARCH)))))
 
 CONFIGURE_VARS += \
 	UNAME_R=$(LINUX_VERSION)

package/devel/valgrind/patches/010-486180-Valgrind-MIPS-VexGuestArchState-has-no-member.patch

@@ -1,61 +0,0 @@
-From 7214886886bce9029f325214156c02dcfff760d5 Mon Sep 17 00:00:00 2001
-From: Paul Floyd <pjfloyd@wanadoo.fr>
-Date: Sat, 27 Apr 2024 13:07:07 +0200
-Subject: 486180  - [Valgrind][MIPS] 'VexGuestArchState' has no member named
- 'guest_IP_AT_SYSCALL'
-
----
- NEWS                          | 34 ++++++++++++++++++++++++++++++++++
- VEX/priv/guest_mips_helpers.c |  4 ++++
- VEX/pub/libvex_guest_mips32.h |  6 +++---
- VEX/pub/libvex_guest_mips64.h |  2 ++
- configure.ac                  |  6 +++---
- 5 files changed, 46 insertions(+), 6 deletions(-)
-
---- a/VEX/priv/guest_mips_helpers.c
-+++ b/VEX/priv/guest_mips_helpers.c
-@@ -187,6 +187,8 @@ void LibVEX_GuestMIPS32_initialise( /*OU
-    vex_state->guest_w1.w64[1] = 0;
-    vex_state->guest_w2.w64[0] = 0;
-    vex_state->guest_w2.w64[1] = 0;
-+
-+   vex_state->guest_IP_AT_SYSCALL = 0;
- }
- 
- void LibVEX_GuestMIPS64_initialise ( /*OUT*/ VexGuestMIPS64State * vex_state )
-@@ -294,6 +296,8 @@ void LibVEX_GuestMIPS64_initialise ( /*O
-    vex_state->guest_LLaddr = 0xFFFFFFFFFFFFFFFFULL;
-    vex_state->guest_LLdata = 0;
- 
-+   vex_state->guest_IP_AT_SYSCALL = 0;
-+
-    vex_state->guest_MSACSR = 0;
- }
- 
---- a/VEX/pub/libvex_guest_mips32.h
-+++ b/VEX/pub/libvex_guest_mips32.h
-@@ -188,10 +188,10 @@ typedef
- 
-       /*  1016 */ UInt guest_MSACSR;
- 
--      /*  1020 */ UInt _padding3;
-+      /*  1020 */ UInt guest_IP_AT_SYSCALL;
- 
--      /*  1020 */ ULong guest_LLdata64;
--      /*  1028 */ ULong _padding4;
-+      /*  1024 */ ULong guest_LLdata64;
-+      /*  1032 */ ULong _padding3;
- } VexGuestMIPS32State;
- /*---------------------------------------------------------------*/
- /*--- Utility functions for MIPS32 guest stuff.               ---*/
---- a/VEX/pub/libvex_guest_mips64.h
-+++ b/VEX/pub/libvex_guest_mips64.h
-@@ -184,6 +184,8 @@ typedef
-       /* 1144 */ UInt guest_MSACSR;
- 
-       /* 1148 */ UInt _padding2;
-+      /* 1152 */ ULong guest_IP_AT_SYSCALL;
-+      /* 1160 */ ULong _padding3;
- 
- } VexGuestMIPS64State;
- 

package/devel/valgrind/patches/020-mips-skip-using-shared-syscall-numbers-for-mips32.patch

@@ -1,159 +0,0 @@
-From 54d6ad3348fb50f5b972fe9c05d0d8757bfe73ba Mon Sep 17 00:00:00 2001
-From: Aleksandar Rikalo <arikalo@gmail.com>
-Date: Fri, 10 May 2024 17:59:28 +0200
-Subject: mips: skip using shared syscall numbers for mips32
-
-mips does not use shared syscall numbers, so we can not use
-vki-scnums-shared-linux.h.
-
-This partially fixes KDE #444781.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Aleksandar Rikalo <arikalo@gmail.com>
----
- coregrind/m_syswrap/syswrap-mips32-linux.c |   1 +
- include/pub_tool_vkiscnums_asm.h           |   2 -
- include/vki/vki-scnums-mips32-linux.h      | 105 ++++++++++++++++-----
- 3 files changed, 83 insertions(+), 25 deletions(-)
-
---- a/coregrind/m_syswrap/syswrap-mips32-linux.c
-+++ b/coregrind/m_syswrap/syswrap-mips32-linux.c
-@@ -1110,6 +1110,7 @@ static SyscallTableEntry syscall_main_ta
-    LINX_ (__NR_pwritev2,               sys_pwritev2),                // 362
-    //..
-    LINXY(__NR_statx,                   sys_statx),                   // 366
-+   GENX_(__NR_rseq,                    sys_ni_syscall),              // 367
- 
-    LINXY(__NR_clock_gettime64,         sys_clock_gettime64),         // 403
-    LINX_(__NR_clock_settime64,         sys_clock_settime64),         // 404
---- a/include/pub_tool_vkiscnums_asm.h
-+++ b/include/pub_tool_vkiscnums_asm.h
-@@ -63,8 +63,6 @@
- #  include "vki/vki-scnums-arm64-linux.h"
- 
- #elif defined(VGP_mips32_linux)
--#  include "vki/vki-scnums-shared-linux.h"
--#  include "vki/vki-scnums-32bit-linux.h"
- #  include "vki/vki-scnums-mips32-linux.h"
- 
- #elif defined(VGP_nanomips_linux)
---- a/include/vki/vki-scnums-mips32-linux.h
-+++ b/include/vki/vki-scnums-mips32-linux.h
-@@ -380,35 +380,94 @@
- #define __NR_setns                      (__NR_Linux + 343)
- #define __NR_process_vm_readv           (__NR_Linux + 345)
- #define __NR_process_vm_writev          (__NR_Linux + 346)
--#define __NR_kcmp			(__NR_Linux + 347)
--#define __NR_finit_module		(__NR_Linux + 348)
--#define __NR_sched_setattr		(__NR_Linux + 349)
--#define __NR_sched_getattr		(__NR_Linux + 350)
--#define __NR_renameat2			(__NR_Linux + 351)
--#define __NR_seccomp			(__NR_Linux + 352)
--#define __NR_getrandom			(__NR_Linux + 353)
--#define __NR_memfd_create		(__NR_Linux + 354)
--#define __NR_bpf			(__NR_Linux + 355)
--#define __NR_execveat			(__NR_Linux + 356)
--#define __NR_userfaultfd		(__NR_Linux + 357)
--#define __NR_membarrier			(__NR_Linux + 358)
--#define __NR_mlock2			(__NR_Linux + 359)
--#define __NR_copy_file_range		(__NR_Linux + 360)
--#define __NR_preadv2			(__NR_Linux + 361)
--#define __NR_pwritev2			(__NR_Linux + 362)
--#define __NR_pkey_mprotect		(__NR_Linux + 363)
--#define __NR_pkey_alloc			(__NR_Linux + 364)
--#define __NR_pkey_free			(__NR_Linux + 365)
--#define __NR_statx			(__NR_Linux + 366)
--
-+#define __NR_kcmp                       (__NR_Linux + 347)
-+#define __NR_finit_module               (__NR_Linux + 348)
-+#define __NR_sched_setattr              (__NR_Linux + 349)
-+#define __NR_sched_getattr              (__NR_Linux + 350)
-+#define __NR_renameat2                  (__NR_Linux + 351)
-+#define __NR_seccomp                    (__NR_Linux + 352)
-+#define __NR_getrandom                  (__NR_Linux + 353)
-+#define __NR_memfd_create               (__NR_Linux + 354)
-+#define __NR_bpf                        (__NR_Linux + 355)
-+#define __NR_execveat                   (__NR_Linux + 356)
-+#define __NR_userfaultfd                (__NR_Linux + 357)
-+#define __NR_membarrier                 (__NR_Linux + 358)
-+#define __NR_mlock2                     (__NR_Linux + 359)
-+#define __NR_copy_file_range            (__NR_Linux + 360)
-+#define __NR_preadv2                    (__NR_Linux + 361)
-+#define __NR_pwritev2                   (__NR_Linux + 362)
-+#define __NR_pkey_mprotect              (__NR_Linux + 363)
-+#define __NR_pkey_alloc                 (__NR_Linux + 364)
-+#define __NR_pkey_free                  (__NR_Linux + 365)
-+#define __NR_statx                      (__NR_Linux + 366)
-+#define __NR_rseq                       (__NR_Linux + 367)
-+#define __NR_io_pgetevents              (__NR_Linux + 368)
-+#define __NR_semget                     (__NR_Linux + 393)
-+#define __NR_semctl                     (__NR_Linux + 394)
-+#define __NR_shmget                     (__NR_Linux + 395)
-+#define __NR_shmctl                     (__NR_Linux + 396)
-+#define __NR_shmat                      (__NR_Linux + 397)
-+#define __NR_shmdt                      (__NR_Linux + 398)
-+#define __NR_msgget                     (__NR_Linux + 399)
-+#define __NR_msgsnd                     (__NR_Linux + 400)
-+#define __NR_msgrcv                     (__NR_Linux + 401)
-+#define __NR_msgctl                     (__NR_Linux + 402)
-+#define __NR_clock_gettime64            (__NR_Linux + 403)
-+#define __NR_clock_settime64            (__NR_Linux + 404)
-+#define __NR_clock_adjtime64            (__NR_Linux + 405)
-+#define __NR_clock_getres_time64        (__NR_Linux + 406)
-+#define __NR_clock_nanosleep_time64     (__NR_Linux + 407)
-+#define __NR_timer_gettime64            (__NR_Linux + 408)
-+#define __NR_timer_settime64            (__NR_Linux + 409)
-+#define __NR_timerfd_gettime64          (__NR_Linux + 410)
-+#define __NR_timerfd_settime64          (__NR_Linux + 411)
-+#define __NR_utimensat_time64           (__NR_Linux + 412)
-+#define __NR_pselect6_time64            (__NR_Linux + 413)
-+#define __NR_ppoll_time64               (__NR_Linux + 414)
-+#define __NR_io_pgetevents_time64       (__NR_Linux + 416)
-+#define __NR_recvmmsg_time64            (__NR_Linux + 417)
-+#define __NR_mq_timedsend_time64        (__NR_Linux + 418)
-+#define __NR_mq_timedreceive_time64     (__NR_Linux + 419)
-+#define __NR_semtimedop_time64          (__NR_Linux + 420)
-+#define __NR_rt_sigtimedwait_time64     (__NR_Linux + 421)
-+#define __NR_futex_time64               (__NR_Linux + 422)
-+#define __NR_sched_rr_get_interval_time64 (__NR_Linux + 423)
-+#define __NR_pidfd_send_signal          (__NR_Linux + 424)
-+#define __NR_io_uring_setup             (__NR_Linux + 425)
-+#define __NR_io_uring_enter             (__NR_Linux + 426)
-+#define __NR_io_uring_register          (__NR_Linux + 427)
-+#define __NR_open_tree                  (__NR_Linux + 428)
-+#define __NR_move_mount                 (__NR_Linux + 429)
-+#define __NR_fsopen                     (__NR_Linux + 430)
-+#define __NR_fsconfig                   (__NR_Linux + 431)
-+#define __NR_fsmount                    (__NR_Linux + 432)
-+#define __NR_fspick                     (__NR_Linux + 433)
-+#define __NR_pidfd_open                 (__NR_Linux + 434)
-+#define __NR_clone3                     (__NR_Linux + 435)
-+#define __NR_close_range                (__NR_Linux + 436)
-+#define __NR_openat2                    (__NR_Linux + 437)
-+#define __NR_pidfd_getfd                (__NR_Linux + 438)
-+#define __NR_faccessat2                 (__NR_Linux + 439)
-+#define __NR_process_madvise            (__NR_Linux + 440)
-+#define __NR_epoll_pwait2               (__NR_Linux + 441)
-+#define __NR_mount_setattr              (__NR_Linux + 442)
-+#define __NR_quotactl_fd                (__NR_Linux + 443)
-+#define __NR_landlock_create_ruleset    (__NR_Linux + 444)
-+#define __NR_landlock_add_rule          (__NR_Linux + 445)
-+#define __NR_landlock_restrict_self     (__NR_Linux + 446)
-+#define __NR_process_mrelease           (__NR_Linux + 448)
-+#define __NR_futex_waitv                (__NR_Linux + 449)
-+#define __NR_set_mempolicy_home_node    (__NR_Linux + 450)
-+#define __NR_cachestat                  (__NR_Linux + 451)
-+#define __NR_fchmodat2                  (__NR_Linux + 452)
- /*
-  * Offset of the last Linux o32 flavoured syscall
-  */
--#define __NR_Linux_syscalls	            366
-+#define __NR_Linux_syscalls             366
- 
- 
- #define __NR_O32_Linux                  4000
--#define __NR_O32_Linux_syscalls	        366
-+#define __NR_O32_Linux_syscalls         366
- 
- 
- #endif                          /* __VKI_SCNUMS_MIPS32_LINUX_H */

package/devel/valgrind/patches/021-mips-skip-using-shared-syscall-numbers-for-mips64.patch

@@ -1,152 +0,0 @@
-From efaa17e53a750d5f0f4c138b507b1b104729ed67 Mon Sep 17 00:00:00 2001
-From: Petar Jovanovic <mips32r2@gmail.com>
-Date: Mon, 24 Jun 2024 10:33:46 +0000
-Subject: mips: skip using shared syscall numbers for mips64
-
-mips does not use shared syscall numbers, so we can not use
-vki-scnums-shared-linux.h.
-
-This fixes KDE #444781.
-
-Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
-Signed-off-by: Aleksandar Rikalo <arikalo@gmail.com>
----
- coregrind/m_syswrap/syswrap-mips64-linux.c |  1 +
- include/pub_tool_vkiscnums_asm.h           |  1 -
- include/vki/vki-scnums-mips64-linux.h      | 98 ++++++++++++++++++++++
- 3 files changed, 99 insertions(+), 1 deletion(-)
-
---- a/coregrind/m_syswrap/syswrap-mips64-linux.c
-+++ b/coregrind/m_syswrap/syswrap-mips64-linux.c
-@@ -813,6 +813,7 @@ static SyscallTableEntry syscall_main_ta
-    LINX_ (__NR_pwritev2, sys_pwritev2),
-    LINX_ (__NR_syncfs, sys_syncfs),
-    LINXY (__NR_statx, sys_statx),
-+   GENX_ (__NR_rseq, sys_ni_syscall),
-    LINX_ (__NR_setns, sys_setns),
-    LINXY (__NR_io_uring_setup, sys_io_uring_setup),
-    LINXY (__NR_io_uring_enter, sys_io_uring_enter),
---- a/include/pub_tool_vkiscnums_asm.h
-+++ b/include/pub_tool_vkiscnums_asm.h
-@@ -70,7 +70,6 @@
- #  include "vki/vki-scnums-shared-linux.h"
- 
- #elif defined(VGP_mips64_linux)
--#  include "vki/vki-scnums-shared-linux.h"
- #  include "vki/vki-scnums-mips64-linux.h"
- 
- #elif defined(VGP_x86_freebsd) || defined(VGP_amd64_freebsd) || defined(VGP_arm64_freebsd)
---- a/include/vki/vki-scnums-mips64-linux.h
-+++ b/include/vki/vki-scnums-mips64-linux.h
-@@ -362,6 +362,45 @@
- #define __NR_pkey_alloc             (__NR_Linux + 324)
- #define __NR_pkey_free              (__NR_Linux + 325)
- #define __NR_statx                  (__NR_Linux + 326)
-+#define __NR_rseq                   (__NR_Linux + 327)
-+#define __NR_io_pgetevents          (__NR_Linux + 328)
-+#define __NR_pidfd_send_signal      (__NR_Linux + 424)
-+#define __NR_io_uring_setup         (__NR_Linux + 425)
-+#define __NR_io_uring_enter         (__NR_Linux + 426)
-+#define __NR_io_uring_register      (__NR_Linux + 427)
-+#define __NR_open_tree              (__NR_Linux + 428)
-+#define __NR_move_mount             (__NR_Linux + 429)
-+#define __NR_fsopen                 (__NR_Linux + 430)
-+#define __NR_fsconfig               (__NR_Linux + 431)
-+#define __NR_fsmount                (__NR_Linux + 432)
-+#define __NR_fspick                 (__NR_Linux + 433)
-+#define __NR_pidfd_open             (__NR_Linux + 434)
-+#define __NR_clone3                 (__NR_Linux + 435)
-+#define __NR_close_range            (__NR_Linux + 436)
-+#define __NR_openat2                (__NR_Linux + 437)
-+#define __NR_pidfd_getfd            (__NR_Linux + 438)
-+#define __NR_faccessat2             (__NR_Linux + 439)
-+#define __NR_process_madvise        (__NR_Linux + 440)
-+#define __NR_epoll_pwait2           (__NR_Linux + 441)
-+#define __NR_mount_setattr          (__NR_Linux + 442)
-+#define __NR_quotactl_fd            (__NR_Linux + 443)
-+#define __NR_landlock_create_ruleset (__NR_Linux + 444)
-+#define __NR_landlock_add_rule      (__NR_Linux + 445)
-+#define __NR_landlock_restrict_self (__NR_Linux + 446)
-+#define __NR_process_mrelease       (__NR_Linux + 448)
-+#define __NR_futex_waitv            (__NR_Linux + 449)
-+#define __NR_set_mempolicy_home_node (__NR_Linux + 450)
-+#define __NR_cachestat              (__NR_Linux + 451)
-+#define __NR_fchmodat2              (__NR_Linux + 452)
-+#define __NR_map_shadow_stack       (__NR_Linux + 453)
-+#define __NR_futex_wake             (__NR_Linux + 454)
-+#define __NR_futex_wait             (__NR_Linux + 455)
-+#define __NR_futex_requeue          (__NR_Linux + 456)
-+#define __NR_statmount              (__NR_Linux + 457)
-+#define __NR_listmount              (__NR_Linux + 458)
-+#define __NR_lsm_get_self_attr      (__NR_Linux + 459)
-+#define __NR_lsm_set_self_attr      (__NR_Linux + 460)
-+#define __NR_lsm_list_modules       (__NR_Linux + 461)
- 
- #elif defined(VGABI_N32)
- 
-@@ -701,6 +740,65 @@
- #define __NR_pkey_alloc              (__NR_Linux + 328)
- #define __NR_pkey_free               (__NR_Linux + 329)
- #define __NR_statx                   (__NR_Linux + 330)
-+#define __NR_rseq                    (__NR_Linux + 331)
-+#define __NR_io_pgetevents           (__NR_Linux + 332)
-+#define __NR_clock_gettime64         (__NR_Linux + 403)
-+#define __NR_clock_settime64         (__NR_Linux + 404)
-+#define __NR_clock_adjtime64         (__NR_Linux + 405)
-+#define __NR_clock_getres_time64     (__NR_Linux + 406)
-+#define __NR_clock_nanosleep_time64  (__NR_Linux + 407)
-+#define __NR_timer_gettime64         (__NR_Linux + 408)
-+#define __NR_timer_settime64         (__NR_Linux + 409)
-+#define __NR_timerfd_gettime64       (__NR_Linux + 410)
-+#define __NR_timerfd_settime64       (__NR_Linux + 411)
-+#define __NR_utimensat_time64        (__NR_Linux + 412)
-+#define __NR_pselect6_time64         (__NR_Linux + 413)
-+#define __NR_ppoll_time64            (__NR_Linux + 414)
-+#define __NR_io_pgetevents_time64    (__NR_Linux + 416)
-+#define __NR_recvmmsg_time64         (__NR_Linux + 417)
-+#define __NR_mq_timedsend_time64     (__NR_Linux + 418)
-+#define __NR_mq_timedreceive_time64  (__NR_Linux + 419)
-+#define __NR_semtimedop_time64       (__NR_Linux + 420)
-+#define __NR_rt_sigtimedwait_time64  (__NR_Linux + 421)
-+#define __NR_futex_time64            (__NR_Linux + 422)
-+#define __NR_sched_rr_get_interval_time64 (__NR_Linux + 423)
-+#define __NR_pidfd_send_signal       (__NR_Linux + 424)
-+#define __NR_io_uring_setup          (__NR_Linux + 425)
-+#define __NR_io_uring_enter          (__NR_Linux + 426)
-+#define __NR_io_uring_register       (__NR_Linux + 427)
-+#define __NR_open_tree               (__NR_Linux + 428)
-+#define __NR_move_mount              (__NR_Linux + 429)
-+#define __NR_fsopen                  (__NR_Linux + 430)
-+#define __NR_fsconfig                (__NR_Linux + 431)
-+#define __NR_fsmount                 (__NR_Linux + 432)
-+#define __NR_fspick                  (__NR_Linux + 433)
-+#define __NR_pidfd_open              (__NR_Linux + 434)
-+#define __NR_clone3                  (__NR_Linux + 435)
-+#define __NR_close_range             (__NR_Linux + 436)
-+#define __NR_openat2                 (__NR_Linux + 437)
-+#define __NR_pidfd_getfd             (__NR_Linux + 438)
-+#define __NR_faccessat2              (__NR_Linux + 439)
-+#define __NR_process_madvise         (__NR_Linux + 440)
-+#define __NR_epoll_pwait2            (__NR_Linux + 441)
-+#define __NR_mount_setattr           (__NR_Linux + 442)
-+#define __NR_quotactl_fd             (__NR_Linux + 443)
-+#define __NR_landlock_create_ruleset (__NR_Linux + 444)
-+#define __NR_landlock_add_rule       (__NR_Linux + 445)
-+#define __NR_landlock_restrict_self  (__NR_Linux + 446)
-+#define __NR_process_mrelease        (__NR_Linux + 448)
-+#define __NR_futex_waitv             (__NR_Linux + 449)
-+#define __NR_set_mempolicy_home_node (__NR_Linux + 450)
-+#define __NR_cachestat               (__NR_Linux + 451)
-+#define __NR_fchmodat2               (__NR_Linux + 452)
-+#define __NR_map_shadow_stack        (__NR_Linux + 453)
-+#define __NR_futex_wake              (__NR_Linux + 454)
-+#define __NR_futex_wait              (__NR_Linux + 455)
-+#define __NR_futex_requeue           (__NR_Linux + 456)
-+#define __NR_statmount               (__NR_Linux + 457)
-+#define __NR_listmount               (__NR_Linux + 458)
-+#define __NR_lsm_get_self_attr       (__NR_Linux + 459)
-+#define __NR_lsm_set_self_attr       (__NR_Linux + 460)
-+#define __NR_lsm_list_modules        (__NR_Linux + 461)
- 
- #else
- #error unknown mips64 abi

package/devel/valgrind/patches/100-fix_configure_check.patch

@@ -1,6 +1,6 @@
 --- a/configure.ac
 +++ b/configure.ac
-@@ -381,7 +381,7 @@ case "${host_os}" in
+@@ -362,7 +362,7 @@ case "${host_os}" in
          # Ok, this is linux. Check the kernel version
          AC_MSG_CHECKING([for the kernel version])
  

package/devel/valgrind/patches/130-mips_fix_soft_float.patch

@@ -48,7 +48,7 @@ This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
  
 --- a/coregrind/m_machine.c
 +++ b/coregrind/m_machine.c
-@@ -2119,6 +2119,7 @@ Bool VG_(machine_get_hwcaps)( void )
+@@ -2167,6 +2167,7 @@ Bool VG_(machine_get_hwcaps)( void )
             we are using alternative way to determine FP mode */
          ULong result = 0;
  
@@ -56,7 +56,7 @@ This fixes the following error message when compiling with a GCC 10 MIPS BE 32:
          if (!VG_MINIMAL_SETJMP(env_unsup_insn)) {
             __asm__ volatile (
                ".set push\n\t"
-@@ -2136,6 +2137,9 @@ Bool VG_(machine_get_hwcaps)( void )
+@@ -2184,6 +2185,9 @@ Bool VG_(machine_get_hwcaps)( void )
  
             fpmode = (result != 0x3FF0000000000000ull);
          }

package/firmware/linux-firmware/Makefile

@@ -8,12 +8,12 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=linux-firmware
-PKG_VERSION:=20251011
+PKG_VERSION:=20251021
 PKG_RELEASE:=1
 
 PKG_SOURCE_URL:=@KERNEL/linux/kernel/firmware
 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
-PKG_HASH:=b6c9a9c112b88417d985b87d6521b677fa2fa0d5d7ee5219c76dc8ca66945ad3
+PKG_HASH:=fa6130988ecd7968602938c77dd6f8d2dace4e03ba0da4c0e9624dfed657e6cf
 
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
 

package/network/config/wifi-scripts/files-ucode/usr/bin/iwinfo

@@ -72,7 +72,7 @@ function print_scan(cells) {
 		printf('\t  Mode: %s  Frequency: %s GHz  Band: %s GHz  Channel: %d\n', cell.mode, cell.frequency, cell.band, cell.channel);
 		printf('\t  Signal: %d dBm  Quality: %2d/70\n', cell.dbm, cell.quality);
 
-		if (!length(cell.crypto.key_mgmt))
+		if (!cell.crypto || !length(cell.crypto.key_mgmt))
 			printf('\t  Encryption: NONE\n');
 		else
 			printf('\t  Encryption: %s (%s)\n', join(' / ', cell.crypto.key_mgmt), join(' / ', cell.crypto.pair));

package/network/ipv6/odhcp6c/Makefile

@@ -12,9 +12,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/odhcp6c.git
-PKG_SOURCE_DATE:=2025-10-03
-PKG_SOURCE_VERSION:=96d9e0b6e81330c61c954c6bc73a2302276fcda1
-PKG_MIRROR_HASH:=7c778d0422ecefaa3170654fc1c01d56adc92aa585c7eb62d7f8823e6ad00679
+PKG_SOURCE_DATE:=2025-10-21
+PKG_SOURCE_VERSION:=77e1ae21e67f81840024ffe5bb7cf69a8fb0d2f0
+PKG_MIRROR_HASH:=78f1c2342330da5f6bf08a4be89df1d771661966bbff13bd15462035de46837b
 PKG_MAINTAINER:=Hans Dedecker <dedeckeh@gmail.com>
 PKG_LICENSE:=GPL-2.0
 

package/network/ipv6/odhcp6c/files/dhcpv6.sh

@@ -30,7 +30,7 @@ proto_dhcpv6_init_config() {
 	proto_config_add_string iface_464xlat
 	proto_config_add_string zone_464xlat
 	proto_config_add_string zone
-	proto_config_add_string 'ifaceid:ip6addr'
+	proto_config_add_string 'ip6ifaceid:ip6addr'
 	proto_config_add_string "userclass"
 	proto_config_add_string "vendorclass"
 	proto_config_add_array "sendopts:list(string)"
@@ -56,8 +56,8 @@ proto_dhcpv6_setup() {
 	local config="$1"
 	local iface="$2"
 
-	local reqaddress reqprefix clientid reqopts defaultreqopts noslaaconly forceprefix extendprefix norelease noserverunicast noclientfqdn noacceptreconfig ip6prefix ip6prefixes iface_dslite iface_map iface_464xlat ifaceid userclass vendorclass sendopts delegate zone_dslite zone_map zone_464xlat zone encaplimit_dslite encaplimit_map skpriority soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff verbose
-	json_get_vars reqaddress reqprefix clientid reqopts defaultreqopts noslaaconly forceprefix extendprefix norelease noserverunicast noclientfqdn noacceptreconfig iface_dslite iface_map iface_464xlat ifaceid userclass vendorclass delegate zone_dslite zone_map zone_464xlat zone encaplimit_dslite encaplimit_map skpriority soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff verbose
+	local reqaddress reqprefix clientid reqopts defaultreqopts noslaaconly forceprefix extendprefix norelease noserverunicast noclientfqdn noacceptreconfig ip6prefix ip6prefixes iface_dslite iface_map iface_464xlat ip6ifaceid userclass vendorclass sendopts delegate zone_dslite zone_map zone_464xlat zone encaplimit_dslite encaplimit_map skpriority soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff verbose
+	json_get_vars reqaddress reqprefix clientid reqopts defaultreqopts noslaaconly forceprefix extendprefix norelease noserverunicast noclientfqdn noacceptreconfig iface_dslite iface_map iface_464xlat ip6ifaceid userclass vendorclass delegate zone_dslite zone_map zone_464xlat zone encaplimit_dslite encaplimit_map skpriority soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff verbose
 	json_for_each_item proto_dhcpv6_add_prefix ip6prefix ip6prefixes
 
 	# Configure
@@ -84,7 +84,8 @@ proto_dhcpv6_setup() {
 
 	[ "$noacceptreconfig" = "1" ] && append opts "-a"
 
-	[ -n "$ifaceid" ] && append opts "-i$ifaceid"
+	[ -z "$ip6ifaceid" ] && json_get_var ip6ifaceid ifaceid
+	[ -n "$ip6ifaceid" ] && append opts "-i$ip6ifaceid"
 
 	[ -n "$vendorclass" ] && append opts "-V$vendorclass"
 

package/network/services/odhcpd/Makefile

@@ -12,9 +12,9 @@ PKG_RELEASE:=1
 
 PKG_SOURCE_PROTO:=git
 PKG_SOURCE_URL=$(PROJECT_GIT)/project/odhcpd.git
-PKG_MIRROR_HASH:=7c60dfc0ffcc1cde0e95f3898451a9e8e9b77e94aab732e3b8a0f052529378c3
-PKG_SOURCE_DATE:=2025-10-07
-PKG_SOURCE_VERSION:=5eac9c56ff3b0a013c5241f449ca144f70bf4c02
+PKG_MIRROR_HASH:=acb086731fd7d072ddddc1d5f3bad9377e89a05597ce004d24bd0cdb60586f0a
+PKG_SOURCE_DATE:=2025-10-26
+PKG_SOURCE_VERSION:=fc27940fe9939f99aeb988d021c7edfa54460123
 
 PKG_MAINTAINER:=Hans Dedecker <dedeckeh@gmail.com>
 PKG_LICENSE:=GPL-2.0

package/network/services/odhcpd/files/odhcpd-update

@@ -1,6 +1,8 @@
 #!/bin/sh
 # Make dnsmasq reread hostfile by sending SIGHUP signal
 
+initscript=$0
+
 . /lib/functions/procd.sh
 
 procd_send_signal dnsmasq

package/network/services/unetmsg/Makefile

@@ -8,7 +8,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=unetmsg
-PKG_RELEASE:=$(AUTORELEASE)
+PKG_RELEASE:=14
 
 PKG_LICENSE:=GPL-2.0
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>

package/utils/cli/Makefile

@@ -8,7 +8,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=cli
-PKG_RELEASE:=$(AUTORELEASE)
+PKG_RELEASE:=14
 
 PKG_LICENSE:=GPL-2.0
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>

package/utils/e2fsprogs/Makefile

@@ -168,7 +168,8 @@ CONFIGURE_ARGS += \
 	--disable-tls		\
 	--disable-nls		\
 	--disable-rpath		\
-	--disable-fuse2fs
+	--disable-fuse2fs	\
+	--without-libmagic
 
 ifneq ($(CONFIG_USE_MUSL),)
   CONFIGURE_VARS += ac_cv_func_lseek64=yes

package/utils/e2fsprogs/patches/002-fix-subst-host-build.patch

@@ -1,10 +0,0 @@
---- a/util/subst.c
-+++ b/util/subst.c
-@@ -10,6 +10,7 @@
- #else
- #define HAVE_SYS_STAT_H
- #define HAVE_SYS_TIME_H
-+#define HAVE_SYS_STAT_H
- #endif
- #include <stdio.h>
- #include <errno.h>

package/utils/e2fsprogs/patches/010-configure-make-libmagic-optional-and-configurable.patch

@@ -0,0 +1,315 @@
+From 29e42cd2429208d02288bd9e12a6e65b940ea7e5 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 22 Oct 2025 14:02:33 +0200
+Subject: [PATCH] configure: make libmagic optional and configurable
+
+Make libmagic optional and configurable. This is to address case where
+the libmagic library is detected but suppots wants to be disabled.
+
+While at it also add support for pkg-config and also apply the same
+workaround of libarchive for macos.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ configure               | 182 ++++++++++++++++++++++++++++++++++++++--
+ configure.ac            |  57 +++++++++++--
+ lib/support/plausible.c |   2 +-
+ 3 files changed, 230 insertions(+), 11 deletions(-)
+
+--- a/configure
++++ b/configure
+@@ -930,6 +930,7 @@ enable_rpath
+ with_libiconv_prefix
+ with_libintl_prefix
+ enable_largefile
++with_libmagic
+ with_libarchive
+ enable_fuse2fs
+ enable_lto
+@@ -1647,6 +1648,7 @@ Optional Packages:
+   --without-libiconv-prefix     don't search for libiconv in includedir and libdir
+   --with-libintl-prefix[=DIR]  search for libintl in DIR/include and DIR/lib
+   --without-libintl-prefix     don't search for libintl in includedir and libdir
++  --without-libmagic      disable use of libmagic
+   --without-libarchive    disable use of libarchive
+   --with-multiarch=ARCH   specify the multiarch triplet
+   --with-udev-rules-dir[=DIR]
+@@ -13690,7 +13692,155 @@ then :
+ fi
+ 
+ 
+-{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for magic_file in -lmagic" >&5
++
++# Check whether --with-libmagic was given.
++if test ${with_libmagic+y}
++then :
++  withval=$with_libmagic; if test "$withval" = "no"
++then
++	try_libmagic=""
++	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Disabling libmagic support" >&5
++printf "%s\n" "Disabling libmagic support" >&6; }
++
++printf "%s\n" "#define CONFIG_DISABLE_LIBMAGIC 1" >>confdefs.h
++
++elif test "$withval" = "direct"
++then
++	try_libmagic="direct"
++	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Testing for libmagic support (forced direct link)" >&5
++printf "%s\n" "Testing for libmagic support (forced direct link)" >&6; }
++else
++	try_libmagic="yes"
++	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Testing for libmagic support (with dlopen)" >&5
++printf "%s\n" "Testing for libmagic support (with dlopen)" >&6; }
++fi
++
++else $as_nop
++
++case "$host_os" in
++    darwin*)
++	try_libmagic="direct"
++	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Try testing for libmagic support (with static linking) by default" >&5
++printf "%s\n" "Try testing for libmagic support (with static linking) by default" >&6; }
++	 ;;
++    *)
++        try_libmagic="yes"
++	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: Try testing for libmagic support (with dlopen) by default" >&5
++printf "%s\n" "Try testing for libmagic support (with dlopen) by default" >&6; }
++	;;
++esac
++
++fi
++
++MAGIC_LIB=
++if test -n "$try_libmagic"
++then
++
++pkg_failed=no
++{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for libmagic" >&5
++printf %s "checking for libmagic... " >&6; }
++
++if test -n "$ARCHIVE_CFLAGS"; then
++    pkg_cv_ARCHIVE_CFLAGS="$ARCHIVE_CFLAGS"
++ elif test -n "$PKG_CONFIG"; then
++    if test -n "$PKG_CONFIG" && \
++    { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libmagic\""; } >&5
++  ($PKG_CONFIG --exists --print-errors "libmagic") 2>&5
++  ac_status=$?
++  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }; then
++  pkg_cv_ARCHIVE_CFLAGS=`$PKG_CONFIG --cflags "libmagic" 2>/dev/null`
++		      test "x$?" != "x0" && pkg_failed=yes
++else
++  pkg_failed=yes
++fi
++ else
++    pkg_failed=untried
++fi
++if test -n "$ARCHIVE_LIBS"; then
++    pkg_cv_ARCHIVE_LIBS="$ARCHIVE_LIBS"
++ elif test -n "$PKG_CONFIG"; then
++    if test -n "$PKG_CONFIG" && \
++    { { printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libmagic\""; } >&5
++  ($PKG_CONFIG --exists --print-errors "libmagic") 2>&5
++  ac_status=$?
++  printf "%s\n" "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }; then
++  pkg_cv_ARCHIVE_LIBS=`$PKG_CONFIG --libs "libmagic" 2>/dev/null`
++		      test "x$?" != "x0" && pkg_failed=yes
++else
++  pkg_failed=yes
++fi
++ else
++    pkg_failed=untried
++fi
++
++
++
++if test $pkg_failed = yes; then
++        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
++printf "%s\n" "no" >&6; }
++
++if $PKG_CONFIG --atleast-pkgconfig-version 0.20; then
++        _pkg_short_errors_supported=yes
++else
++        _pkg_short_errors_supported=no
++fi
++        if test $_pkg_short_errors_supported = yes; then
++                ARCHIVE_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libmagic" 2>&1`
++        else
++                ARCHIVE_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libmagic" 2>&1`
++        fi
++        # Put the nasty error message in config.log where it belongs
++        echo "$ARCHIVE_PKG_ERRORS" >&5
++
++
++        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for magic_file in -lmagic" >&5
++printf %s "checking for magic_file in -lmagic... " >&6; }
++if test ${ac_cv_lib_magic_magic_file+y}
++then :
++  printf %s "(cached) " >&6
++else $as_nop
++  ac_check_lib_save_LIBS=$LIBS
++LIBS="-lmagic  $LIBS"
++cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h.  */
++
++/* Override any GCC internal prototype to avoid an error.
++   Use char because int might match the return type of a GCC
++   builtin and then its argument prototype would still apply.  */
++char magic_file ();
++int
++main (void)
++{
++return magic_file ();
++  ;
++  return 0;
++}
++_ACEOF
++if ac_fn_c_try_link "$LINENO"
++then :
++  ac_cv_lib_magic_magic_file=yes
++else $as_nop
++  ac_cv_lib_magic_magic_file=no
++fi
++rm -f core conftest.err conftest.$ac_objext conftest.beam \
++    conftest$ac_exeext conftest.$ac_ext
++LIBS=$ac_check_lib_save_LIBS
++fi
++{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_magic_magic_file" >&5
++printf "%s\n" "$ac_cv_lib_magic_magic_file" >&6; }
++if test "x$ac_cv_lib_magic_magic_file" = xyes
++then :
++  MAGIC_LIB=-lmagic
++fi
++
++
++elif test $pkg_failed = untried; then
++        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: no" >&5
++printf "%s\n" "no" >&6; }
++
++        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for magic_file in -lmagic" >&5
+ printf %s "checking for magic_file in -lmagic... " >&6; }
+ if test ${ac_cv_lib_magic_magic_file+y}
+ then :
+@@ -13728,17 +13878,39 @@ printf "%s\n" "$ac_cv_lib_magic_magic_fi
+ if test "x$ac_cv_lib_magic_magic_file" = xyes
+ then :
+   MAGIC_LIB=-lmagic
+-ac_fn_c_check_header_compile "$LINENO" "magic.h" "ac_cv_header_magic_h" "$ac_includes_default"
++fi
++
++
++else
++        ARCHIVE_CFLAGS=$pkg_cv_ARCHIVE_CFLAGS
++        ARCHIVE_LIBS=$pkg_cv_ARCHIVE_LIBS
++        { printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: yes" >&5
++printf "%s\n" "yes" >&6; }
++
++	{ printf "%s\n" "$as_me:${as_lineno-$LINENO}: result: pkg-config found libmagic" >&5
++printf "%s\n" "pkg-config found libmagic" >&6; }
++	CFLAGS="$ARCHIVE_CFLAGS $CFLAGS"
++
++fi
++    if test -n "$MAGIC_LIB" ; then
++        ac_fn_c_check_header_compile "$LINENO" "magic.h" "ac_cv_header_magic_h" "$ac_includes_default"
+ if test "x$ac_cv_header_magic_h" = xyes
+ then :
+   printf "%s\n" "#define HAVE_MAGIC_H 1" >>confdefs.h
+ 
+ fi
+ 
+-fi
++        if test "$ac_cv_func_dlopen" = yes -a "$try_libmagic" != "direct"; then
++            MAGIC_LIB=$DLOPEN_LIB
+ 
+-if test "$ac_cv_func_dlopen" = yes ; then
+-   MAGIC_LIB=$DLOPEN_LIB
++printf "%s\n" "#define CONFIG_DLOPEN_LIBMAGIC 1" >>confdefs.h
++
++	fi
++    fi
++    if test "$ac_cv_header_magic_h" != "yes"
++    then
++        MAGIC_LIB=
++    fi
+ fi
+ 
+ 
+--- a/configure.ac
++++ b/configure.ac
+@@ -1295,12 +1295,59 @@ SOCKET_LIB=''
+ AC_CHECK_LIB(socket, socket, [SOCKET_LIB=-lsocket])
+ AC_SUBST(SOCKET_LIB)
+ dnl
+-dnl See if libmagic exists
++dnl libmagic
+ dnl
+-AC_CHECK_LIB(magic, magic_file, [MAGIC_LIB=-lmagic
+-AC_CHECK_HEADERS([magic.h])])
+-if test "$ac_cv_func_dlopen" = yes ; then
+-   MAGIC_LIB=$DLOPEN_LIB
++AC_ARG_WITH([libmagic],
++AS_HELP_STRING([--without-libmagic],[disable use of libmagic]),
++[if test "$withval" = "no"
++then
++	try_libmagic=""
++	AC_MSG_RESULT([Disabling libmagic support])
++	AC_DEFINE(CONFIG_DISABLE_LIBMAGIC, 1,
++		[Define to 1 to completely disable libmagic])
++elif test "$withval" = "direct"
++then
++	try_libmagic="direct"
++	AC_MSG_RESULT([Testing for libmagic support (forced direct link)])
++else
++	try_libmagic="yes"
++	AC_MSG_RESULT([Testing for libmagic support (with dlopen)])
++fi]
++,
++[
++case "$host_os" in
++    darwin*)
++	try_libmagic="direct"
++	AC_MSG_RESULT([Try testing for libmagic support (with static linking) by default])
++	 ;;
++    *)
++        try_libmagic="yes"
++	AC_MSG_RESULT([Try testing for libmagic support (with dlopen) by default])
++	;;
++esac
++])
++MAGIC_LIB=
++if test -n "$try_libmagic"
++then
++    PKG_CHECK_MODULES([ARCHIVE],[libmagic],
++    [
++	AC_MSG_RESULT([pkg-config found libmagic])
++	CFLAGS="$ARCHIVE_CFLAGS $CFLAGS"
++    ],[
++        AC_CHECK_LIB(magic, magic_file, [MAGIC_LIB=-lmagic])
++    ])
++    if test -n "$MAGIC_LIB" ; then
++        AC_CHECK_HEADERS([magic.h])
++        if test "$ac_cv_func_dlopen" = yes -a "$try_libmagic" != "direct"; then
++            MAGIC_LIB=$DLOPEN_LIB
++            AC_DEFINE(CONFIG_DLOPEN_LIBMAGIC, 1,
++		[Define to 1 if using dlopen to access libmagic])
++	fi
++    fi
++    if test "$ac_cv_header_magic_h" != "yes"
++    then
++        MAGIC_LIB=
++    fi
+ fi
+ AC_SUBST(MAGIC_LIB)
+ dnl
+--- a/lib/support/plausible.c
++++ b/lib/support/plausible.c
+@@ -54,7 +54,7 @@ static void (*dl_magic_close)(magic_t);
+ #define MAGIC_NO_CHECK_ELF 0x0010000
+ #endif
+ 
+-#ifdef HAVE_DLOPEN
++#ifdef CONFIG_DLOPEN_LIBMAGIC
+ #include <dlfcn.h>
+ 
+ static void *magic_handle;

package/utils/provision/Makefile

@@ -8,7 +8,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=provision
-PKG_RELEASE:=$(AUTORELEASE)
+PKG_RELEASE:=1
 
 PKG_LICENSE:=GPL-2.0
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>

package/utils/ucode-mod-uline/Makefile

@@ -1,7 +1,7 @@
 include $(TOPDIR)/rules.mk
 
 PKG_NAME:=ucode-mod-uline
-PKG_RELEASE:=$(AUTORELEASE)
+PKG_RELEASE:=8
 PKG_LICENSE:=GPL-2.0-or-later
 PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
 

rules.mk

@@ -515,6 +515,7 @@ define commitcount
 $(shell \
   if git log -1 --no-show-signature >/dev/null 2>/dev/null; then \
     if [ -n "$(1)" ]; then \
+      $(call ERROR_MESSAGE,DEPRECATION NOTICE: The use of AUTORELEASE has been deprecated. Fix your Makefile.); \
       last_bump="$$(git log --no-show-signature --pretty=format:'%h %s' . | \
         grep -m 1 -e ': [uU]pdate to ' -e ': [bB]ump to ' | \
         cut -f 1 -d ' ')"; \

scripts/mkits.sh

@@ -82,6 +82,11 @@ if [ -z "${ARCH}" ] || [ -z "${COMPRESS}" ] || [ -z "${LOAD_ADDR}" ] || \
 	usage
 fi
 
+if [ -n "${ROOTFS}" ] && [ ! -f "${ROOTFS}".pagesync ]; then
+	echo "Missing .pagesync blob for RootFS blob '${ROOTFS}'"
+	exit 1
+fi
+
 ARCH_UPPER=$(echo "$ARCH" | tr '[:lower:]' '[:upper:]')
 
 if [ -n "${COMPATIBLE}" ]; then
@@ -136,7 +141,6 @@ fi
 
 
 if [ -n "${ROOTFS}" ]; then
-	dd if="${ROOTFS}" of="${ROOTFS}.pagesync" bs=4096 conv=sync
 	ROOTFS_NODE="
 		rootfs${REFERENCE_CHAR}$ROOTFSNUM {
 			description = \"${ARCH_UPPER} OpenWrt ${DEVICE} rootfs\";

target/linux/airoha/an7581/base-files/etc/board.d/01_leds

@@ -0,0 +1,20 @@
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+board=$(board_name)
+
+case "$board" in
+airoha,an7581-evb)
+	ucidef_set_led_usbport "usb1" "USB 1" "green:usb-1" "usb1-port1" "usb2-port1"
+	ucidef_set_led_usbport "usb2" "USB 2" "green:usb-2" "usb3-port1" "usb4-port1"
+	;;
+esac
+
+board_config_flush
+
+exit 0

target/linux/airoha/an7581/base-files/etc/board.d/02_network

@@ -0,0 +1,28 @@
+#
+# Copyright (c) 2015 The Linux Foundation. All rights reserved.
+# Copyright (c) 2011-2015 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+. /lib/functions/system.sh
+
+an7581_setup_interfaces()
+{
+	local board="$1"
+
+	case "$board" in
+	airoha,an7581-evb)
+		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "eth1"
+		;;
+	*)
+		echo "Unsupported hardware. Network interfaces not initialized"
+		;;
+	esac
+}
+
+board_config_update
+board=$(board_name)
+an7581_setup_interfaces $board
+board_config_flush
+
+exit 0

target/linux/airoha/an7583/config-6.12

@@ -242,6 +242,7 @@ CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_NEED_SG_DMA_LENGTH=y
 CONFIG_NET_AIROHA=y
 CONFIG_NET_AIROHA_FLOW_STATS=y
+CONFIG_NET_AIROHA_NPU=y
 CONFIG_NET_DEVLINK=y
 CONFIG_NET_DSA=y
 CONFIG_NET_DSA_MT7530=y

target/linux/airoha/base-files/lib/preinit/04_set_netdev_label

@@ -0,0 +1,15 @@
+set_netdev_labels() {
+	local dir
+	local label
+	local netdev
+
+	for dir in /sys/class/net/*; do
+		[ -r "$dir/of_node/openwrt,netdev-name" ] || continue
+		read -r label < "$dir/of_node/openwrt,netdev-name"
+		netdev="${dir##*/}"
+		[ "$netdev" = "$label" ] && continue
+		ip link set "$netdev" name "$label"
+	done
+}
+
+boot_hook_add preinit_main set_netdev_labels

target/linux/airoha/dts/an7581-evb-emmc.dts

@@ -57,6 +57,13 @@
 		};
 	};
 
+	pcie2_rst_pins: pcie2-rst-pins {
+		conf {
+			pins = "pcie_reset2";
+			drive-open-drain = <1>;
+		};
+	};
+
 	gswp1_led0_pins: gswp1-led0-pins {
 		mux {
 			function = "phy1_led0";
@@ -99,6 +106,17 @@
 	};
 };
 
+&usb0 {
+	status = "okay";
+};
+
+&usb1 {
+	status = "okay";
+
+	mediatek,u3p-dis-msk = <0x1>;
+	phys = <&usb1_phy PHY_TYPE_USB2>;
+};
+
 &mmc0 {
 	pinctrl-names = "default", "state_uhs";
 	pinctrl-0 = <&mmc_pins>;
@@ -156,6 +174,46 @@
 	status = "okay";
 };
 
+&pcie2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie2_rst_pins>;
+	status = "okay";
+};
+
+&mdio {
+	as21xx_1: ethernet-phy@1d {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x1d>;
+
+		firmware-name = "as21x1x_fw.bin";
+
+		reset-deassert-us = <1000000>;
+		reset-assert-us = <1000000>;
+		reset-gpios = <&en7581_pinctrl 31 GPIO_ACTIVE_LOW>;
+
+		leds {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			led@0 {
+				reg = <0>;
+				color = <LED_COLOR_ID_GREEN>;
+				function = LED_FUNCTION_LAN;
+				function-enumerator = <0>;
+				default-state = "keep";
+			};
+
+			led@1 {
+				reg = <1>;
+				color = <LED_COLOR_ID_GREEN>;
+				function = LED_FUNCTION_LAN;
+				function-enumerator = <1>;
+				default-state = "keep";
+			};
+		};
+	};
+};
+
 &eth {
 	status = "okay";
 };
@@ -164,6 +222,13 @@
 	status = "okay";
 };
 
+&gdm4 {
+	status = "okay";
+
+	phy-handle = <&as21xx_1>;
+	phy-mode = "usxgmii";
+};
+
 &switch {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio_pins>;

target/linux/airoha/dts/an7581.dtsi

@@ -3,6 +3,9 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/en7523-clk.h>
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/phy/airoha,an7581-usb-phy.h>
+#include <dt-bindings/soc/airoha,scu-ssr.h>
 #include <dt-bindings/reset/airoha,en7581-reset.h>
 #include <dt-bindings/leds/common.h>
 #include <dt-bindings/thermal/thermal.h>
@@ -503,6 +506,52 @@
 			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		usb0: usb@1fab0000 {
+			compatible = "mediatek,mtk-xhci";
+			reg = <0x0 0x1fab0000 0x0 0x3e00>,
+				<0x0 0x1fab3e00 0x0 0x100>;
+			reg-names = "mac", "ippc";
+			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+
+			phys = <&usb0_phy PHY_TYPE_USB2>, <&usb0_phy PHY_TYPE_USB3>;
+
+			status = "disabled";
+		};
+
+		usb0_phy: phy@1fac0000 {
+			compatible = "airoha,an7581-usb-phy";
+			reg = <0x0 0x1fac0000 0x0 0x10000>;
+
+			airoha,scu = <&scuclk>;
+			airoha,usb2-monitor-clk-sel = <AIROHA_USB2_MONCLK_SEL1>;
+			airoha,serdes-port = <AIROHA_SCU_SERDES_USB1>;
+
+			#phy-cells = <1>;
+		};
+
+		usb1: usb@1fad0000 {
+			compatible = "mediatek,mtk-xhci";
+			reg = <0x0 0x1fad0000 0x0 0x3e00>,
+				<0x0 0x1fad3e00 0x0 0x100>;
+			reg-names = "mac", "ippc";
+			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+
+			phys = <&usb1_phy PHY_TYPE_USB2>, <&usb1_phy PHY_TYPE_USB3>;
+
+			status = "disabled";
+		};
+
+		usb1_phy: phy@1fae0000 {
+			compatible = "airoha,an7581-usb-phy";
+			reg = <0x0 0x1fae0000 0x0 0x10000>;
+
+			airoha,scu = <&scuclk>;
+			airoha,usb2-monitor-clk-sel = <AIROHA_USB2_MONCLK_SEL2>;
+			airoha,serdes-port = <AIROHA_SCU_SERDES_USB2>;
+
+			#phy-cells = <1>;
+		};
+
 		crypto@1e004000 {
 			compatible = "inside-secure,safexcel-eip93ies";
 			reg = <0x0 0x1fb70000 0x0 0x1000>;
@@ -718,6 +767,49 @@
 			};
 		};
 
+		pcie2: pcie@1fc40000 {
+			compatible = "airoha,en7581-pcie";
+			device_type = "pci";
+			linux,pci-domain = <2>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+
+			reg = <0x0 0x1fc40000 0x0 0x1670>;
+			reg-names = "pcie-mac";
+
+			clocks = <&scuclk EN7523_CLK_PCIE>;
+			clock-names = "sys-ck";
+
+			phys = <&usb1_phy PHY_TYPE_USB3>;
+			phy-names = "pcie-phy";
+
+			ranges = <0x02000000 0 0x28000000 0x0 0x28000000 0 0x4000000>;
+
+			resets = <&scuclk EN7581_PCIE0_RST>,
+				 <&scuclk EN7581_PCIE1_RST>,
+				 <&scuclk EN7581_PCIE2_RST>;
+			reset-names = "phy-lane0", "phy-lane1", "phy-lane2";
+
+			mediatek,pbus-csr = <&pbus_csr 0x10 0x14>;
+
+			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+			bus-range = <0x00 0xff>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 7>;
+			interrupt-map = <0 0 0 1 &pcie_intc2 0>,
+					<0 0 0 2 &pcie_intc2 1>,
+					<0 0 0 3 &pcie_intc2 2>,
+					<0 0 0 4 &pcie_intc2 3>;
+
+			status = "disabled";
+
+			pcie_intc2: interrupt-controller {
+				interrupt-controller;
+				#address-cells = <0>;
+				#interrupt-cells = <1>;
+			};
+		};
+
 		npu: npu@1e900000 {
 			compatible = "airoha,en7581-npu";
 			reg = <0x0 0x1e900000 0x0 0x313000>;
@@ -874,7 +966,7 @@
 				};
 			};
 
-			mdio {
+			mdio: mdio {
 				#address-cells = <1>;
 				#size-cells = <0>;
 

target/linux/airoha/dts/an7583-evb-emmc.dts

@@ -0,0 +1,297 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "an7583.dtsi"
+
+/ {
+	model = "Airoha AN7583 Evaluation Board";
+	compatible = "airoha,an7583-evb", "airoha,an7583", "airoha,en7583";
+
+	aliases {
+		serial0 = &uart1;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200 earlycon";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x0 0x80000000 0x2 0x00000000>;
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		poll-interval = <100>;
+
+		btn-reset {
+			label = "reset";
+			linux,code = <BTN_0>;
+			gpios = <&an7583_pinctrl 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-1 {
+			label = "pon";
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&an7583_pinctrl 12 GPIO_ACTIVE_LOW>;
+		};
+
+		led-2 {
+			label = "internet";
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&an7583_pinctrl 26 GPIO_ACTIVE_LOW>;
+		};
+
+		led-3 {
+			label = "wps";
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&an7583_pinctrl 31 GPIO_ACTIVE_LOW>;
+		};
+
+		led-4 {
+			label = "los";
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&an7583_pinctrl 27 GPIO_ACTIVE_LOW>;
+		};
+
+		led-5 {
+			label = "voip_hook";
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&an7583_pinctrl 29 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&an7583_pinctrl {
+	gpio-ranges = <&an7583_pinctrl 0 2 53>;
+
+	mdio0_pins: mdio0-pins {
+		conf {
+			pins = "mdio_0";
+			output-high;
+		};
+	};
+
+	pcie0_rst_pins: pcie0-rst-pins {
+		conf {
+			pins = "pcie_reset0";
+			drive-open-drain = <1>;
+		};
+	};
+
+	pcie1_rst_pins: pcie1-rst-pins {
+		conf {
+			pins = "pcie_reset1";
+			drive-open-drain = <1>;
+		};
+	};
+
+	gswp1_led0_pins: gswp1-led0-pins {
+		mux {
+			function = "phy1_led0";
+			pins = "gpio1";
+		};
+	};
+
+	gswp2_led0_pins: gswp2-led0-pins {
+		mux {
+			function = "phy2_led0";
+			pins = "gpio2";
+		};
+	};
+
+	gswp3_led0_pins: gswp3-led0-pins {
+		mux {
+			function = "phy3_led0";
+			pins = "gpio3";
+		};
+	};
+
+	gswp4_led0_pins: gswp4-led0-pins {
+		mux {
+			function = "phy4_led0";
+			pins = "gpio4";
+		};
+	};
+
+	mmc_pins: mmc-pins {
+		mux {
+			function = "emmc";
+			groups = "emmc";
+		};
+	};
+};
+
+&mmc0 {
+	pinctrl-names = "default", "state_uhs";
+	pinctrl-0 = <&mmc_pins>;
+	pinctrl-1 = <&mmc_pins>;
+	status = "okay";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	card@0 {
+		compatible = "mmc-card";
+		reg = <0>;
+
+		block {
+			compatible = "block-device";
+			partitions {
+				block-partition-factory {
+					partname = "art";
+
+					nvmem-layout {
+						compatible = "fixed-layout";
+						#address-cells = <1>;
+						#size-cells = <1>;
+
+						eeprom_factory_0: eeprom@0 {
+							reg = <0x40000 0x1e00>;
+						};
+
+						mac_factory_2c0000: mac@2c0000 {
+							reg = <0x2c0000 0x6>;
+						};
+
+						pon_mac_factory_2c0006: pon_mac@2c0006 {
+							reg = <0x2c0006 0x6>;
+						};
+
+						onu_type_factory_2e0000: onu_type@2e0000 {
+							reg = <0x2e0000 0x10>;
+						};
+
+						board_config_factory_2e0010: board_config@2e0010 {
+							reg = <0x2e0010 0x8>;
+						};
+					};
+				};
+			};
+		};
+	};
+};
+
+&i2c0 {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&mdio_0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mdio0_pins>;
+
+	en8811: ethernet-phy@f {
+		reg = <0xf>;
+
+		reset-gpios = <&an7583_pinctrl 28 GPIO_ACTIVE_LOW>;
+		reset-assert-us = <10000>;
+		reset-deassert-us = <20000>;
+
+		leds {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			led@0 {
+				reg = <0>;
+				function = LED_FUNCTION_LAN;
+				color = <LED_COLOR_ID_GREEN>;
+				function-enumerator = <0>;
+				default-state = "keep";
+			};
+
+			led@1 {
+				reg = <1>;
+				function = LED_FUNCTION_LAN;
+				color = <LED_COLOR_ID_GREEN>;
+				function-enumerator = <1>;
+				default-state = "keep";
+			};
+		};
+	};
+};
+
+&npu {
+	status = "okay";
+};
+
+&eth {
+	status = "okay";
+	nvmem-cells = <&mac_factory_2c0000>;
+	nvmem-cell-names = "mac";
+};
+
+&gdm1 {
+	status = "okay";
+};
+
+&gdm3 {
+	status = "okay";
+
+	phy-handle = <&en8811>;
+	phy-mode = "2500base-x";
+};
+
+&switch {
+	status = "okay";
+};
+
+&gsw_phy1 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gswp1_led0_pins>;
+	status = "okay";
+};
+
+&gsw_phy1_led0 {
+	status = "okay";
+	active-low;
+};
+
+&gsw_phy2 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gswp2_led0_pins>;
+	status = "okay";
+};
+
+&gsw_phy2_led0 {
+	status = "okay";
+	active-low;
+};
+
+&gsw_phy3 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gswp3_led0_pins>;
+	status = "okay";
+};
+
+&gsw_phy3_led0 {
+	status = "okay";
+	active-low;
+};
+
+&gsw_phy4 {
+	pinctrl-names = "gbe-led";
+	pinctrl-0 = <&gswp4_led0_pins>;
+	status = "okay";
+};
+
+&gsw_phy4_led0 {
+	status = "okay";
+	active-low;
+};

target/linux/airoha/dts/an7583-evb.dts

@@ -84,6 +84,10 @@
 	status = "okay";
 };
 
+&npu {
+	status = "okay";
+};
+
 &eth {
 	status = "okay";
 };
@@ -135,37 +139,41 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&mdio0_pins>;
 
-	as21xx_0: ethernet-phy@1d {
-		reg = <0x1d>;
-		compatible = "ethernet-phy-ieee802.3-c45";
-
-		firmware-name = "as21x1x_fw.bin";
-
-		reset-deassert-us = <350000>;
-		reset-assert-us = <200000>;
-		reset-gpios = <&an7583_pinctrl 34 GPIO_ACTIVE_LOW>;
-
-		leds {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			led@0 {
-				reg = <0>;
-				color = <LED_COLOR_ID_GREEN>;
-				function = LED_FUNCTION_LAN;
-				function-enumerator = <0>;
-				default-state = "keep";
-			};
-
-			led@1 {
-				reg = <1>;
-				color = <LED_COLOR_ID_GREEN>;
-				function = LED_FUNCTION_LAN;
-				function-enumerator = <1>;
-				default-state = "keep";
-			};
-		};
-	};
+	/* Present but not HW connected to GDM port */
+	/*
+	 * as21xx_0: ethernet-phy@1d {
+	 *		reg = <0x1d>;
+	 *		compatible = "ethernet-phy-ieee802.3-c45";
+	 *		status = "disabled";
+	 *
+	 *		firmware-name = "as21x1x_fw.bin";
+	 *
+	 *		reset-deassert-us = <350000>;
+	 *		reset-assert-us = <200000>;
+	 *		reset-gpios = <&an7583_pinctrl 34 GPIO_ACTIVE_LOW>;
+	 *
+	 *		leds {
+	 *			#address-cells = <1>;
+	 *			#size-cells = <0>;
+	 *
+	 *			led@0 {
+	 *				reg = <0>;
+	 *				color = <LED_COLOR_ID_GREEN>;
+	 *				function = LED_FUNCTION_LAN;
+	 *				function-enumerator = <0>;
+	 *				default-state = "keep";
+	 *			};
+	 *
+	 *			led@1 {
+	 *				reg = <1>;
+	 *				color = <LED_COLOR_ID_GREEN>;
+	 *				function = LED_FUNCTION_LAN;
+	 *				function-enumerator = <1>;
+	 *				default-state = "keep";
+	 *			};
+	 *		};
+	 * };
+	 */
 
 	as21xx_1: ethernet-phy@1f {
 		reg = <0x1f>;
@@ -200,16 +208,19 @@
 	};
 };
 
+/* GDM2 seems to be connected to PON */
+/*
+ *&gdm2 {
+ *	status = "disabled";
+ *
+ *	phy-handle = <&as21xx_0>;
+ *	phy-mode = "usxgmii";
+ *};
+ */
+
 &gdm3 {
 	status = "okay";
 
 	phy-handle = <&as21xx_1>;
 	phy-mode = "usxgmii";
 };
-
-&gdm2 {
-	status = "okay";
-
-	phy-handle = <&as21xx_0>;
-	phy-mode = "usxgmii";
-};

target/linux/airoha/dts/an7583.dtsi

@@ -546,6 +546,30 @@
 			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		npu: npu@1e900000 {
+			compatible = "airoha,an7583-npu";
+			reg = <0x0 0x1e900000 0x0 0x313000>;
+			interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+			memory-region = <&npu_binary>;
+			memory-region-names = "binary";
+
+			status = "disabled";
+		};
+
 		pon_pcs: pcs@1fa08000 {
 			compatible = "airoha,an7583-pcs-pon";
 			reg = <0x0 0x1fa08000 0x0 0x1000>,
@@ -620,6 +644,8 @@
 			memory-region = <&qdma0_buf>, <&qdma1_buf>;
 			memory-region-names = "qdma0-buf", "qdma1-buf";
 
+			airoha,npu = <&npu>;
+
 			status = "disabled";
 
 			#address-cells = <1>;

target/linux/airoha/image/Makefile

@@ -1,6 +1,10 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/image.mk
 
+loadaddr-$(CONFIG_TARGET_airoha_an7581) := 0x80200000
+loadaddr-$(CONFIG_TARGET_airoha_an7583) := 0x80200000
+loadaddr-$(CONFIG_TARGET_airoha_en7523) := 0x80200000
+
 # default all platform image(fit) build
 define Device/Default
   PROFILES = Default $$(DEVICE_NAME)
@@ -9,6 +13,7 @@ define Device/Default
 	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
   KERNEL_INITRAMFS = kernel-bin | lzma | \
 	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
+  KERNEL_LOADADDR = $(loadaddr-y)
   FILESYSTEMS := squashfs
   DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1)))
   DEVICE_DTS_DIR := ../dts

target/linux/airoha/image/an7581.mk

@@ -1,3 +1,17 @@
+define Build/an7581-emmc-bl2-bl31-uboot
+  head -c $$((0x800)) /dev/zero > $@
+  cat $(STAGING_DIR_IMAGE)/an7581_$1-bl2.fip >> $@
+  dd if=$(STAGING_DIR_IMAGE)/an7581_$1-bl31-u-boot.fip of=$@ bs=1 seek=$$((0x20000)) conv=notrunc
+endef
+
+define Build/an7581-preloader
+  cat $(STAGING_DIR_IMAGE)/an7581_$1-bl2.fip >> $@
+endef
+
+define Build/an7581-bl31-uboot
+  cat $(STAGING_DIR_IMAGE)/an7581_$1-bl31-u-boot.fip >> $@
+endef
+
 define Device/FitImageLzma
 	KERNEL_SUFFIX := -uImage.itb
 	KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb
@@ -11,8 +25,10 @@ define Device/airoha_an7581-evb
   DEVICE_PACKAGES := kmod-leds-pwm kmod-i2c-an7581 kmod-pwm-airoha kmod-input-gpio-keys-polled
   DEVICE_DTS := an7581-evb
   DEVICE_DTS_CONFIG := config@1
-  KERNEL_LOADADDR := 0x80088000
   IMAGE/sysupgrade.bin := append-kernel | pad-to 128k | append-rootfs | pad-rootfs | append-metadata
+  ARTIFACT/preloader.bin := an7581-preloader rfb
+  ARTIFACT/bl31-uboot.fip := an7581-bl31-uboot rfb
+  ARTIFACTS := preloader.bin bl31-uboot.fip
 endef
 TARGET_DEVICES += airoha_an7581-evb
 
@@ -21,5 +37,8 @@ define Device/airoha_an7581-evb-emmc
   DEVICE_MODEL := AN7581 Evaluation Board (EMMC)
   DEVICE_DTS := an7581-evb-emmc
   DEVICE_PACKAGES := kmod-i2c-an7581
+  ARTIFACT/preloader.bin := an7581-preloader rfb
+  ARTIFACT/bl31-uboot.fip := an7581-bl31-uboot rfb
+  ARTIFACTS := preloader.bin bl31-uboot.fip
 endef
 TARGET_DEVICES += airoha_an7581-evb-emmc

target/linux/airoha/image/an7583.mk

@@ -1,23 +1,3 @@
-define Build/an7583-bl2-bl31-uboot
-  head -c $$((0x800)) /dev/zero > $@
-  cat $(STAGING_DIR_IMAGE)/an7583_$1-bl2.fip >> $@
-  dd if=$(STAGING_DIR_IMAGE)/an7583_$1-bl31-uboot.img of=$@ bs=1 seek=$$((0x20000)) conv=notrunc
-endef
-
-define Build/an7583-emmc-bl2-bl31-uboot
-  head -c $$((0x800)) /dev/zero > $@
-  cat $(STAGING_DIR_IMAGE)/an7583_$1-bl2.fip >> $@
-  dd if=$(STAGING_DIR_IMAGE)/an7583_$1-bl31-u-boot.fip of=$@ bs=1 seek=$$((0x20000)) conv=notrunc
-endef
-
-define Build/an7583-preloader
-  cat $(STAGING_DIR_IMAGE)/an7583_$1-bl2.fip >> $@
-endef
-
-define Build/an7583-bl31-uboot
-  cat $(STAGING_DIR_IMAGE)/an7583_$1-bl31-u-boot.fip >> $@
-endef
-
 define Device/FitImageLzma
 	KERNEL_SUFFIX := -uImage.itb
 	KERNEL = kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(DEVICE_DTS).dtb
@@ -28,15 +8,11 @@ define Device/airoha_an7583-evb
   $(call Device/FitImageLzma)
   DEVICE_VENDOR := Airoha
   DEVICE_MODEL := AN7583 Evaluation Board (SNAND)
-  DEVICE_PACKAGES := kmod-leds-pwm kmod-input-gpio-keys-polled
+  DEVICE_PACKAGES := kmod-phy-aeonsemi-as21xxx kmod-leds-pwm kmod-pwm-airoha kmod-input-gpio-keys-polled
   DEVICE_DTS := an7583-evb
   DEVICE_DTS_CONFIG := config@1
   KERNEL_LOADADDR := 0x80088000
   IMAGE/sysupgrade.bin := append-kernel | pad-to 128k | append-rootfs | pad-rootfs | append-metadata
-  ARTIFACT/bl2-bl31-uboot.bin := an7583-bl2-bl31-uboot rfb
-  ARTIFACT/preloader.bin := an7583-preloader rfb
-  ARTIFACT/bl31-uboot.fip := an7583-bl31-uboot rfb
-  ARTIFACTS := bl2-bl31-uboot.bin preloader.bin bl31-uboot.fip
 endef
 TARGET_DEVICES += airoha_an7583-evb
 
@@ -44,10 +20,6 @@ define Device/airoha_an7583-evb-emmc
   DEVICE_VENDOR := Airoha
   DEVICE_MODEL := AN7583 Evaluation Board (EMMC)
   DEVICE_DTS := an7583-evb-emmc
-  DEVICE_PACKAGES := kmod-i2c-an7581
-  ARTIFACT/preloader.bin := an7583-preloader rfb
-  ARTIFACT/bl31-uboot.fip := an7583-bl31-uboot rfb
-  ARTIFACT/bl2-bl31-uboot.bin := an7583-emmc-bl2-bl31-uboot rfb
-  ARTIFACTS := bl2-bl31-uboot.bin preloader.bin bl31-uboot.fip
+  DEVICE_PACKAGES := kmod-phy-airoha-en8811h kmod-i2c-an7581
 endef
 TARGET_DEVICES += airoha_an7583-evb-emmc

target/linux/airoha/image/en7523.mk

@@ -1,5 +1,3 @@
-KERNEL_LOADADDR := 0x80208000
-
 define Target/Description
 	Build firmware images for Airoha EN7523 ARM based boards.
 endef

target/linux/airoha/patches-6.12/100-v6.17-net-airoha-npu-Add-missing-MODULE_FIRMWARE-macros.patch

@@ -0,0 +1,27 @@
+From 4e7e471e2e3f9085fe1dbe821c4dd904a917c66a Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Fri, 1 Aug 2025 09:12:25 +0200
+Subject: [PATCH] net: airoha: npu: Add missing MODULE_FIRMWARE macros
+
+Introduce missing MODULE_FIRMWARE definitions for firmware autoload.
+
+Fixes: 23290c7bc190d ("net: airoha: Introduce Airoha NPU support")
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://patch.msgid.link/20250801-airoha-npu-missing-module-firmware-v2-1-e860c824d515@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_npu.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/net/ethernet/airoha/airoha_npu.c
++++ b/drivers/net/ethernet/airoha/airoha_npu.c
+@@ -741,6 +741,8 @@ static struct platform_driver airoha_npu
+ };
+ module_platform_driver(airoha_npu_driver);
+ 
++MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_DATA);
++MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_RV32);
+ MODULE_LICENSE("GPL");
+ MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
+ MODULE_DESCRIPTION("Airoha Network Processor Unit driver");

target/linux/airoha/patches-6.12/101-v6.17-net-airoha-Fix-a-NULL-vs-IS_ERR-bug-in-airoha_npu_ru.patch

@@ -0,0 +1,31 @@
+From 1e5e40f2558c07f6bc60a8983000309cc0a9d600 Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@linaro.org>
+Date: Tue, 15 Jul 2025 18:01:10 -0500
+Subject: [PATCH] net: airoha: Fix a NULL vs IS_ERR() bug in
+ airoha_npu_run_firmware()
+
+The devm_ioremap_resource() function returns error pointers.  It never
+returns NULL.  Update the check to match.
+
+Fixes: e27dba1951ce ("net: Use of_reserved_mem_region_to_resource{_byname}() for "memory-region"")
+Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
+Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://patch.msgid.link/fc6d194e-6bf5-49ca-bc77-3fdfda62c434@sabinyo.mountain
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_npu.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_npu.c
++++ b/drivers/net/ethernet/airoha/airoha_npu.c
+@@ -201,8 +201,8 @@ static int airoha_npu_run_firmware(struc
+ 	}
+ 
+ 	addr = devm_ioremap(dev, rmem->base, rmem->size);
+-	if (!addr) {
+-		ret = -ENOMEM;
++	if (IS_ERR(addr)) {
++		ret = PTR_ERR(addr);
+ 		goto out;
+ 	}
+ 

target/linux/airoha/patches-6.12/102-02-v6.19-net-airoha-npu-Add-airoha_npu_soc_data-struct.patch

@@ -0,0 +1,136 @@
+From 0850ae496d534847ec2c26744521c1bce04ec59d Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Mon, 13 Oct 2025 15:58:50 +0200
+Subject: [PATCH 2/3] net: airoha: npu: Add airoha_npu_soc_data struct
+
+Introduce airoha_npu_soc_data structure in order to generalize per-SoC
+NPU firmware info. Introduce airoha_npu_load_firmware utility routine.
+This is a preliminary patch in order to introduce AN7583 NPU support.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Simon Horman <horms@kernel.org>
+Link: https://patch.msgid.link/20251013-airoha-npu-7583-v3-2-00f748b5a0c7@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_npu.c | 77 ++++++++++++++++--------
+ 1 file changed, 51 insertions(+), 26 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_npu.c
++++ b/drivers/net/ethernet/airoha/airoha_npu.c
+@@ -103,6 +103,16 @@ enum {
+ 	QDMA_WAN_PON_XDSL,
+ };
+ 
++struct airoha_npu_fw {
++	const char *name;
++	int max_size;
++};
++
++struct airoha_npu_soc_data {
++	struct airoha_npu_fw fw_rv32;
++	struct airoha_npu_fw fw_data;
++};
++
+ #define MBOX_MSG_FUNC_ID	GENMASK(14, 11)
+ #define MBOX_MSG_STATIC_BUF	BIT(5)
+ #define MBOX_MSG_STATUS		GENMASK(4, 2)
+@@ -182,49 +192,53 @@ static int airoha_npu_send_msg(struct ai
+ 	return ret;
+ }
+ 
+-static int airoha_npu_run_firmware(struct device *dev, void __iomem *base,
+-				   struct reserved_mem *rmem)
++static int airoha_npu_load_firmware(struct device *dev, void __iomem *addr,
++				    const struct airoha_npu_fw *fw_info)
+ {
+ 	const struct firmware *fw;
+-	void __iomem *addr;
+ 	int ret;
+ 
+-	ret = request_firmware(&fw, NPU_EN7581_FIRMWARE_RV32, dev);
++	ret = request_firmware(&fw, fw_info->name, dev);
+ 	if (ret)
+ 		return ret == -ENOENT ? -EPROBE_DEFER : ret;
+ 
+-	if (fw->size > NPU_EN7581_FIRMWARE_RV32_MAX_SIZE) {
++	if (fw->size > fw_info->max_size) {
+ 		dev_err(dev, "%s: fw size too overlimit (%zu)\n",
+-			NPU_EN7581_FIRMWARE_RV32, fw->size);
++			fw_info->name, fw->size);
+ 		ret = -E2BIG;
+ 		goto out;
+ 	}
+ 
+-	addr = devm_ioremap(dev, rmem->base, rmem->size);
+-	if (IS_ERR(addr)) {
+-		ret = PTR_ERR(addr);
+-		goto out;
+-	}
+-
+ 	memcpy_toio(addr, fw->data, fw->size);
++out:
+ 	release_firmware(fw);
+ 
+-	ret = request_firmware(&fw, NPU_EN7581_FIRMWARE_DATA, dev);
+-	if (ret)
+-		return ret == -ENOENT ? -EPROBE_DEFER : ret;
++	return ret;
++}
+ 
+-	if (fw->size > NPU_EN7581_FIRMWARE_DATA_MAX_SIZE) {
+-		dev_err(dev, "%s: fw size too overlimit (%zu)\n",
+-			NPU_EN7581_FIRMWARE_DATA, fw->size);
+-		ret = -E2BIG;
+-		goto out;
+-	}
++static int airoha_npu_run_firmware(struct device *dev, void __iomem *base,
++				   struct reserved_mem *rmem)
++{
++	const struct airoha_npu_soc_data *soc;
++	void __iomem *addr;
++	int ret;
+ 
+-	memcpy_toio(base + REG_NPU_LOCAL_SRAM, fw->data, fw->size);
+-out:
+-	release_firmware(fw);
++	soc = of_device_get_match_data(dev);
++	if (!soc)
++		return -EINVAL;
+ 
+-	return ret;
++	addr = devm_ioremap(dev, rmem->base, rmem->size);
++	if (IS_ERR(addr))
++		return PTR_ERR(addr);
++
++	/* Load rv32 npu firmware */
++	ret = airoha_npu_load_firmware(dev, addr, &soc->fw_rv32);
++	if (ret)
++		return ret;
++
++	/* Load data npu firmware */
++	return airoha_npu_load_firmware(dev, base + REG_NPU_LOCAL_SRAM,
++					&soc->fw_data);
+ }
+ 
+ static irqreturn_t airoha_npu_mbox_handler(int irq, void *npu_instance)
+@@ -596,8 +610,19 @@ void airoha_npu_put(struct airoha_npu *n
+ }
+ EXPORT_SYMBOL_GPL(airoha_npu_put);
+ 
++static const struct airoha_npu_soc_data en7581_npu_soc_data = {
++	.fw_rv32 = {
++		.name = NPU_EN7581_FIRMWARE_RV32,
++		.max_size = NPU_EN7581_FIRMWARE_RV32_MAX_SIZE,
++	},
++	.fw_data = {
++		.name = NPU_EN7581_FIRMWARE_DATA,
++		.max_size = NPU_EN7581_FIRMWARE_DATA_MAX_SIZE,
++	},
++};
++
+ static const struct of_device_id of_airoha_npu_match[] = {
+-	{ .compatible = "airoha,en7581-npu" },
++	{ .compatible = "airoha,en7581-npu", .data = &en7581_npu_soc_data },
+ 	{ /* sentinel */ }
+ };
+ MODULE_DEVICE_TABLE(of, of_airoha_npu_match);

target/linux/airoha/patches-6.12/102-03-v6.19-net-airoha-npu-Add-7583-SoC-support.patch

@@ -0,0 +1,56 @@
+From 4478596f71d92060c9093bdf1d2d940881f41bcc Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Mon, 13 Oct 2025 15:58:51 +0200
+Subject: [PATCH 3/3] net: airoha: npu: Add 7583 SoC support
+
+Introduce support for Airoha 7583 SoC NPU selecting proper firmware images.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Simon Horman <horms@kernel.org>
+Link: https://patch.msgid.link/20251013-airoha-npu-7583-v3-3-00f748b5a0c7@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_npu.c | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+--- a/drivers/net/ethernet/airoha/airoha_npu.c
++++ b/drivers/net/ethernet/airoha/airoha_npu.c
+@@ -16,6 +16,8 @@
+ 
+ #define NPU_EN7581_FIRMWARE_DATA		"airoha/en7581_npu_data.bin"
+ #define NPU_EN7581_FIRMWARE_RV32		"airoha/en7581_npu_rv32.bin"
++#define NPU_AN7583_FIRMWARE_DATA		"airoha/an7583_npu_data.bin"
++#define NPU_AN7583_FIRMWARE_RV32		"airoha/an7583_npu_rv32.bin"
+ #define NPU_EN7581_FIRMWARE_RV32_MAX_SIZE	0x200000
+ #define NPU_EN7581_FIRMWARE_DATA_MAX_SIZE	0x10000
+ #define NPU_DUMP_SIZE				512
+@@ -621,8 +623,20 @@ static const struct airoha_npu_soc_data
+ 	},
+ };
+ 
++static const struct airoha_npu_soc_data an7583_npu_soc_data = {
++	.fw_rv32 = {
++		.name = NPU_AN7583_FIRMWARE_RV32,
++		.max_size = NPU_EN7581_FIRMWARE_RV32_MAX_SIZE,
++	},
++	.fw_data = {
++		.name = NPU_AN7583_FIRMWARE_DATA,
++		.max_size = NPU_EN7581_FIRMWARE_DATA_MAX_SIZE,
++	},
++};
++
+ static const struct of_device_id of_airoha_npu_match[] = {
+ 	{ .compatible = "airoha,en7581-npu", .data = &en7581_npu_soc_data },
++	{ .compatible = "airoha,an7583-npu", .data = &an7583_npu_soc_data },
+ 	{ /* sentinel */ }
+ };
+ MODULE_DEVICE_TABLE(of, of_airoha_npu_match);
+@@ -768,6 +782,8 @@ module_platform_driver(airoha_npu_driver
+ 
+ MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_DATA);
+ MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_RV32);
++MODULE_FIRMWARE(NPU_AN7583_FIRMWARE_DATA);
++MODULE_FIRMWARE(NPU_AN7583_FIRMWARE_RV32);
+ MODULE_LICENSE("GPL");
+ MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
+ MODULE_DESCRIPTION("Airoha Network Processor Unit driver");

target/linux/airoha/patches-6.12/103-v6.19-net-airoha-Remove-code-duplication-in-airoha_regs.h.patch

@@ -0,0 +1,342 @@
+From 99ad2b6815f41acbec15ab051ccc79b11b05710a Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Wed, 22 Oct 2025 09:11:12 +0200
+Subject: [PATCH] net: airoha: Remove code duplication in airoha_regs.h
+
+This patch does not introduce any logical change, it just removes
+duplicated code in airoha_regs.h.
+Fix naming conventions in airoha_regs.h.
+
+Reviewed-by: Simon Horman <horms@kernel.org>
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://patch.msgid.link/20251022-airoha-regs-cosmetics-v2-1-e0425b3f2c2c@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_eth.c  | 102 ++++++++++----------
+ drivers/net/ethernet/airoha/airoha_regs.h | 109 ++++++++++------------
+ 2 files changed, 100 insertions(+), 111 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_eth.c
++++ b/drivers/net/ethernet/airoha/airoha_eth.c
+@@ -137,11 +137,11 @@ static void airoha_fe_maccr_init(struct
+ 
+ 	for (p = 1; p <= ARRAY_SIZE(eth->ports); p++)
+ 		airoha_fe_set(eth, REG_GDM_FWD_CFG(p),
+-			      GDM_TCP_CKSUM | GDM_UDP_CKSUM | GDM_IP4_CKSUM |
+-			      GDM_DROP_CRC_ERR);
++			      GDM_TCP_CKSUM_MASK | GDM_UDP_CKSUM_MASK |
++			      GDM_IP4_CKSUM_MASK | GDM_DROP_CRC_ERR_MASK);
+ 
+-	airoha_fe_rmw(eth, REG_CDM1_VLAN_CTRL, CDM1_VLAN_MASK,
+-		      FIELD_PREP(CDM1_VLAN_MASK, 0x8100));
++	airoha_fe_rmw(eth, REG_CDM_VLAN_CTRL(1), CDM_VLAN_MASK,
++		      FIELD_PREP(CDM_VLAN_MASK, 0x8100));
+ 
+ 	airoha_fe_set(eth, REG_FE_CPORT_CFG, FE_CPORT_PAD);
+ }
+@@ -403,46 +403,46 @@ static int airoha_fe_mc_vlan_clear(struc
+ static void airoha_fe_crsn_qsel_init(struct airoha_eth *eth)
+ {
+ 	/* CDM1_CRSN_QSEL */
+-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_22 >> 2),
+-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_22),
+-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_22),
++	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_22 >> 2),
++		      CDM_CRSN_QSEL_REASON_MASK(CRSN_22),
++		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_22),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_08 >> 2),
+-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_08),
+-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_08),
++	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_08 >> 2),
++		      CDM_CRSN_QSEL_REASON_MASK(CRSN_08),
++		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_08),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_21 >> 2),
+-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_21),
+-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_21),
++	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_21 >> 2),
++		      CDM_CRSN_QSEL_REASON_MASK(CRSN_21),
++		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_21),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_24 >> 2),
+-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_24),
+-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_24),
++	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_24 >> 2),
++		      CDM_CRSN_QSEL_REASON_MASK(CRSN_24),
++		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_24),
+ 				 CDM_CRSN_QSEL_Q6));
+-	airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_25 >> 2),
+-		      CDM1_CRSN_QSEL_REASON_MASK(CRSN_25),
+-		      FIELD_PREP(CDM1_CRSN_QSEL_REASON_MASK(CRSN_25),
++	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_25 >> 2),
++		      CDM_CRSN_QSEL_REASON_MASK(CRSN_25),
++		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_25),
+ 				 CDM_CRSN_QSEL_Q1));
+ 	/* CDM2_CRSN_QSEL */
+-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_08 >> 2),
+-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_08),
+-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_08),
++	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_08 >> 2),
++		      CDM_CRSN_QSEL_REASON_MASK(CRSN_08),
++		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_08),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_21 >> 2),
+-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_21),
+-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_21),
++	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_21 >> 2),
++		      CDM_CRSN_QSEL_REASON_MASK(CRSN_21),
++		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_21),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_22 >> 2),
+-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_22),
+-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_22),
++	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_22 >> 2),
++		      CDM_CRSN_QSEL_REASON_MASK(CRSN_22),
++		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_22),
+ 				 CDM_CRSN_QSEL_Q1));
+-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_24 >> 2),
+-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_24),
+-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_24),
++	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_24 >> 2),
++		      CDM_CRSN_QSEL_REASON_MASK(CRSN_24),
++		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_24),
+ 				 CDM_CRSN_QSEL_Q6));
+-	airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_25 >> 2),
+-		      CDM2_CRSN_QSEL_REASON_MASK(CRSN_25),
+-		      FIELD_PREP(CDM2_CRSN_QSEL_REASON_MASK(CRSN_25),
++	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_25 >> 2),
++		      CDM_CRSN_QSEL_REASON_MASK(CRSN_25),
++		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_25),
+ 				 CDM_CRSN_QSEL_Q1));
+ }
+ 
+@@ -462,18 +462,18 @@ static int airoha_fe_init(struct airoha_
+ 	airoha_fe_wr(eth, REG_FE_PCE_CFG,
+ 		     PCE_DPI_EN_MASK | PCE_KA_EN_MASK | PCE_MC_EN_MASK);
+ 	/* set vip queue selection to ring 1 */
+-	airoha_fe_rmw(eth, REG_CDM1_FWD_CFG, CDM1_VIP_QSEL_MASK,
+-		      FIELD_PREP(CDM1_VIP_QSEL_MASK, 0x4));
+-	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_VIP_QSEL_MASK,
+-		      FIELD_PREP(CDM2_VIP_QSEL_MASK, 0x4));
++	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(1), CDM_VIP_QSEL_MASK,
++		      FIELD_PREP(CDM_VIP_QSEL_MASK, 0x4));
++	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(2), CDM_VIP_QSEL_MASK,
++		      FIELD_PREP(CDM_VIP_QSEL_MASK, 0x4));
+ 	/* set GDM4 source interface offset to 8 */
+-	airoha_fe_rmw(eth, REG_GDM4_SRC_PORT_SET,
+-		      GDM4_SPORT_OFF2_MASK |
+-		      GDM4_SPORT_OFF1_MASK |
+-		      GDM4_SPORT_OFF0_MASK,
+-		      FIELD_PREP(GDM4_SPORT_OFF2_MASK, 8) |
+-		      FIELD_PREP(GDM4_SPORT_OFF1_MASK, 8) |
+-		      FIELD_PREP(GDM4_SPORT_OFF0_MASK, 8));
++	airoha_fe_rmw(eth, REG_GDM_SRC_PORT_SET(4),
++		      GDM_SPORT_OFF2_MASK |
++		      GDM_SPORT_OFF1_MASK |
++		      GDM_SPORT_OFF0_MASK,
++		      FIELD_PREP(GDM_SPORT_OFF2_MASK, 8) |
++		      FIELD_PREP(GDM_SPORT_OFF1_MASK, 8) |
++		      FIELD_PREP(GDM_SPORT_OFF0_MASK, 8));
+ 
+ 	/* set PSE Page as 128B */
+ 	airoha_fe_rmw(eth, REG_FE_DMA_GLO_CFG,
+@@ -499,8 +499,8 @@ static int airoha_fe_init(struct airoha_
+ 	airoha_fe_set(eth, REG_GDM_MISC_CFG,
+ 		      GDM2_RDM_ACK_WAIT_PREF_MASK |
+ 		      GDM2_CHN_VLD_MODE_MASK);
+-	airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK,
+-		      FIELD_PREP(CDM2_OAM_QSEL_MASK, 15));
++	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(2), CDM_OAM_QSEL_MASK,
++		      FIELD_PREP(CDM_OAM_QSEL_MASK, 15));
+ 
+ 	/* init fragment and assemble Force Port */
+ 	/* NPU Core-3, NPU Bridge Channel-3 */
+@@ -514,8 +514,8 @@ static int airoha_fe_init(struct airoha_
+ 		      FIELD_PREP(IP_ASSEMBLE_PORT_MASK, 0) |
+ 		      FIELD_PREP(IP_ASSEMBLE_NBQ_MASK, 22));
+ 
+-	airoha_fe_set(eth, REG_GDM3_FWD_CFG, GDM3_PAD_EN_MASK);
+-	airoha_fe_set(eth, REG_GDM4_FWD_CFG, GDM4_PAD_EN_MASK);
++	airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN_MASK);
++	airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN_MASK);
+ 
+ 	airoha_fe_crsn_qsel_init(eth);
+ 
+@@ -523,7 +523,7 @@ static int airoha_fe_init(struct airoha_
+ 	airoha_fe_set(eth, REG_FE_CPORT_CFG, FE_CPORT_PORT_XFC_MASK);
+ 
+ 	/* default aging mode for mbi unlock issue */
+-	airoha_fe_rmw(eth, REG_GDM2_CHN_RLS,
++	airoha_fe_rmw(eth, REG_GDM_CHN_RLS(2),
+ 		      MBI_RX_AGE_SEL_MASK | MBI_TX_AGE_SEL_MASK,
+ 		      FIELD_PREP(MBI_RX_AGE_SEL_MASK, 3) |
+ 		      FIELD_PREP(MBI_TX_AGE_SEL_MASK, 3));
+@@ -1697,7 +1697,7 @@ static int airhoha_set_gdm2_loopback(str
+ 	pse_port = port->id == AIROHA_GDM3_IDX ? FE_PSE_PORT_GDM3
+ 					       : FE_PSE_PORT_GDM4;
+ 	airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(2), pse_port);
+-	airoha_fe_clear(eth, REG_GDM_FWD_CFG(2), GDM_STRIP_CRC);
++	airoha_fe_clear(eth, REG_GDM_FWD_CFG(2), GDM_STRIP_CRC_MASK);
+ 
+ 	/* Enable GDM2 loopback */
+ 	airoha_fe_wr(eth, REG_GDM_TXCHN_EN(2), 0xffffffff);
+--- a/drivers/net/ethernet/airoha/airoha_regs.h
++++ b/drivers/net/ethernet/airoha/airoha_regs.h
+@@ -23,6 +23,8 @@
+ #define GDM3_BASE			0x1100
+ #define GDM4_BASE			0x2500
+ 
++#define CDM_BASE(_n)			\
++	((_n) == 2 ? CDM2_BASE : CDM1_BASE)
+ #define GDM_BASE(_n)			\
+ 	((_n) == 4 ? GDM4_BASE :	\
+ 	 (_n) == 3 ? GDM3_BASE :	\
+@@ -109,30 +111,24 @@
+ #define PATN_DP_MASK			GENMASK(31, 16)
+ #define PATN_SP_MASK			GENMASK(15, 0)
+ 
+-#define REG_CDM1_VLAN_CTRL		CDM1_BASE
+-#define CDM1_VLAN_MASK			GENMASK(31, 16)
++#define REG_CDM_VLAN_CTRL(_n)		CDM_BASE(_n)
++#define CDM_VLAN_MASK			GENMASK(31, 16)
+ 
+-#define REG_CDM1_FWD_CFG		(CDM1_BASE + 0x08)
+-#define CDM1_VIP_QSEL_MASK		GENMASK(24, 20)
++#define REG_CDM_FWD_CFG(_n)		(CDM_BASE(_n) + 0x08)
++#define CDM_OAM_QSEL_MASK		GENMASK(31, 27)
++#define CDM_VIP_QSEL_MASK		GENMASK(24, 20)
+ 
+-#define REG_CDM1_CRSN_QSEL(_n)		(CDM1_BASE + 0x10 + ((_n) << 2))
+-#define CDM1_CRSN_QSEL_REASON_MASK(_n)	\
+-	GENMASK(4 + (((_n) % 4) << 3),	(((_n) % 4) << 3))
+-
+-#define REG_CDM2_FWD_CFG		(CDM2_BASE + 0x08)
+-#define CDM2_OAM_QSEL_MASK		GENMASK(31, 27)
+-#define CDM2_VIP_QSEL_MASK		GENMASK(24, 20)
+-
+-#define REG_CDM2_CRSN_QSEL(_n)		(CDM2_BASE + 0x10 + ((_n) << 2))
+-#define CDM2_CRSN_QSEL_REASON_MASK(_n)	\
++#define REG_CDM_CRSN_QSEL(_n, _m)	(CDM_BASE(_n) + 0x10 + ((_m) << 2))
++#define CDM_CRSN_QSEL_REASON_MASK(_n)	\
+ 	GENMASK(4 + (((_n) % 4) << 3),	(((_n) % 4) << 3))
+ 
+ #define REG_GDM_FWD_CFG(_n)		GDM_BASE(_n)
+-#define GDM_DROP_CRC_ERR		BIT(23)
+-#define GDM_IP4_CKSUM			BIT(22)
+-#define GDM_TCP_CKSUM			BIT(21)
+-#define GDM_UDP_CKSUM			BIT(20)
+-#define GDM_STRIP_CRC			BIT(16)
++#define GDM_PAD_EN_MASK			BIT(28)
++#define GDM_DROP_CRC_ERR_MASK		BIT(23)
++#define GDM_IP4_CKSUM_MASK		BIT(22)
++#define GDM_TCP_CKSUM_MASK		BIT(21)
++#define GDM_UDP_CKSUM_MASK		BIT(20)
++#define GDM_STRIP_CRC_MASK		BIT(16)
+ #define GDM_UCFQ_MASK			GENMASK(15, 12)
+ #define GDM_BCFQ_MASK			GENMASK(11, 8)
+ #define GDM_MCFQ_MASK			GENMASK(7, 4)
+@@ -156,6 +152,10 @@
+ #define LBK_CHAN_MODE_MASK		BIT(1)
+ #define LPBK_EN_MASK			BIT(0)
+ 
++#define REG_GDM_CHN_RLS(_n)		(GDM_BASE(_n) + 0x20)
++#define MBI_RX_AGE_SEL_MASK		GENMASK(26, 25)
++#define MBI_TX_AGE_SEL_MASK		GENMASK(18, 17)
++
+ #define REG_GDM_TXCHN_EN(_n)		(GDM_BASE(_n) + 0x24)
+ #define REG_GDM_RXCHN_EN(_n)		(GDM_BASE(_n) + 0x28)
+ 
+@@ -168,10 +168,10 @@
+ #define FE_GDM_MIB_RX_CLEAR_MASK	BIT(1)
+ #define FE_GDM_MIB_TX_CLEAR_MASK	BIT(0)
+ 
+-#define REG_FE_GDM1_MIB_CFG		(GDM1_BASE + 0xf4)
++#define REG_FE_GDM_MIB_CFG(_n)		(GDM_BASE(_n) + 0xf4)
+ #define FE_STRICT_RFC2819_MODE_MASK	BIT(31)
+-#define FE_GDM1_TX_MIB_SPLIT_EN_MASK	BIT(17)
+-#define FE_GDM1_RX_MIB_SPLIT_EN_MASK	BIT(16)
++#define FE_GDM_TX_MIB_SPLIT_EN_MASK	BIT(17)
++#define FE_GDM_RX_MIB_SPLIT_EN_MASK	BIT(16)
+ #define FE_TX_MIB_ID_MASK		GENMASK(15, 8)
+ #define FE_RX_MIB_ID_MASK		GENMASK(7, 0)
+ 
+@@ -214,6 +214,33 @@
+ #define REG_FE_GDM_RX_ETH_L511_CNT_L(_n)	(GDM_BASE(_n) + 0x198)
+ #define REG_FE_GDM_RX_ETH_L1023_CNT_L(_n)	(GDM_BASE(_n) + 0x19c)
+ 
++#define REG_GDM_SRC_PORT_SET(_n)		(GDM_BASE(_n) + 0x23c)
++#define GDM_SPORT_OFF2_MASK			GENMASK(19, 16)
++#define GDM_SPORT_OFF1_MASK			GENMASK(15, 12)
++#define GDM_SPORT_OFF0_MASK			GENMASK(11, 8)
++
++#define REG_FE_GDM_TX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x280)
++#define REG_FE_GDM_TX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x284)
++#define REG_FE_GDM_TX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x288)
++#define REG_FE_GDM_TX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x28c)
++
++#define REG_FE_GDM_RX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x290)
++#define REG_FE_GDM_RX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x294)
++#define REG_FE_GDM_RX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x298)
++#define REG_FE_GDM_RX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x29c)
++#define REG_FE_GDM_TX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2b8)
++#define REG_FE_GDM_TX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2bc)
++#define REG_FE_GDM_TX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2c0)
++#define REG_FE_GDM_TX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2c4)
++#define REG_FE_GDM_TX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2c8)
++#define REG_FE_GDM_TX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2cc)
++#define REG_FE_GDM_RX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2e8)
++#define REG_FE_GDM_RX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2ec)
++#define REG_FE_GDM_RX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2f0)
++#define REG_FE_GDM_RX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2f4)
++#define REG_FE_GDM_RX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2f8)
++#define REG_FE_GDM_RX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2fc)
++
+ #define REG_PPE_GLO_CFG(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x200)
+ #define PPE_GLO_CFG_BUSY_MASK			BIT(31)
+ #define PPE_GLO_CFG_FLOW_DROP_UPDATE_MASK	BIT(9)
+@@ -326,44 +353,6 @@
+ 
+ #define REG_UPDMEM_DATA(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x374)
+ 
+-#define REG_FE_GDM_TX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x280)
+-#define REG_FE_GDM_TX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x284)
+-#define REG_FE_GDM_TX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x288)
+-#define REG_FE_GDM_TX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x28c)
+-
+-#define REG_FE_GDM_RX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x290)
+-#define REG_FE_GDM_RX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x294)
+-#define REG_FE_GDM_RX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x298)
+-#define REG_FE_GDM_RX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x29c)
+-#define REG_FE_GDM_TX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2b8)
+-#define REG_FE_GDM_TX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2bc)
+-#define REG_FE_GDM_TX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2c0)
+-#define REG_FE_GDM_TX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2c4)
+-#define REG_FE_GDM_TX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2c8)
+-#define REG_FE_GDM_TX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2cc)
+-#define REG_FE_GDM_RX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2e8)
+-#define REG_FE_GDM_RX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2ec)
+-#define REG_FE_GDM_RX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2f0)
+-#define REG_FE_GDM_RX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2f4)
+-#define REG_FE_GDM_RX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2f8)
+-#define REG_FE_GDM_RX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2fc)
+-
+-#define REG_GDM2_CHN_RLS		(GDM2_BASE + 0x20)
+-#define MBI_RX_AGE_SEL_MASK		GENMASK(26, 25)
+-#define MBI_TX_AGE_SEL_MASK		GENMASK(18, 17)
+-
+-#define REG_GDM3_FWD_CFG		GDM3_BASE
+-#define GDM3_PAD_EN_MASK		BIT(28)
+-
+-#define REG_GDM4_FWD_CFG		GDM4_BASE
+-#define GDM4_PAD_EN_MASK		BIT(28)
+-#define GDM4_SPORT_OFFSET0_MASK		GENMASK(11, 8)
+-
+-#define REG_GDM4_SRC_PORT_SET		(GDM4_BASE + 0x23c)
+-#define GDM4_SPORT_OFF2_MASK		GENMASK(19, 16)
+-#define GDM4_SPORT_OFF1_MASK		GENMASK(15, 12)
+-#define GDM4_SPORT_OFF0_MASK		GENMASK(11, 8)
+-
+ #define REG_IP_FRAG_FP			0x2010
+ #define IP_ASSEMBLE_PORT_MASK		GENMASK(24, 21)
+ #define IP_ASSEMBLE_NBQ_MASK		GENMASK(20, 16)

target/linux/airoha/patches-6.12/104-6.19-net-airoha-Fix-a-copy-and-paste-bug-in-probe.patch

@@ -0,0 +1,37 @@
+From 05e090620bacf317020f9591cfff8926093380bd Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@linaro.org>
+Date: Fri, 24 Oct 2025 14:23:35 +0300
+Subject: [PATCH] net: airoha: Fix a copy and paste bug in probe()
+
+This code has a copy and paste bug where it accidentally checks "if (err)"
+instead of checking if "xsi_rsts" is NULL.  Also, as a free bonus, I
+changed the allocation from kzalloc() to  kcalloc() which is a kernel
+hardening measure to protect against integer overflows.
+
+Fixes: 5863b4e065e2 ("net: airoha: Add airoha_eth_soc_data struct")
+Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
+Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://patch.msgid.link/aPtht6y5DRokn9zv@stanley.mountain
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_eth.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_eth.c
++++ b/drivers/net/ethernet/airoha/airoha_eth.c
+@@ -2990,11 +2990,11 @@ static int airoha_probe(struct platform_
+ 		return err;
+ 	}
+ 
+-	xsi_rsts = devm_kzalloc(eth->dev,
+-				eth->soc->num_xsi_rsts * sizeof(*xsi_rsts),
++	xsi_rsts = devm_kcalloc(eth->dev,
++				eth->soc->num_xsi_rsts, sizeof(*xsi_rsts),
+ 				GFP_KERNEL);
+-	if (err)
+-		return err;
++	if (!xsi_rsts)
++		return -ENOMEM;
+ 
+ 	eth->xsi_rsts = xsi_rsts;
+ 	for (i = 0; i < eth->soc->num_xsi_rsts; i++)

target/linux/airoha/patches-6.12/104-v6.16-net-airoha-Fix-an-error-handling-path-in-airoha_prob.patch

@@ -0,0 +1,29 @@
+From 3ef07434c7dbfba302df477bb6c70e082965f232 Mon Sep 17 00:00:00 2001
+From: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
+Date: Sat, 5 Jul 2025 10:34:32 +0200
+Subject: [PATCH] net: airoha: Fix an error handling path in airoha_probe()
+
+If an error occurs after a successful airoha_hw_init() call,
+airoha_ppe_deinit() needs to be called as already done in the remove
+function.
+
+Fixes: 00a7678310fe ("net: airoha: Introduce flowtable offload support")
+Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
+Reviewed-by: Simon Horman <horms@kernel.org>
+Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Link: https://patch.msgid.link/1c940851b4fa3c3ed2a142910c821493a136f121.1746715755.git.christophe.jaillet@wanadoo.fr
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_eth.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/airoha/airoha_eth.c
++++ b/drivers/net/ethernet/airoha/airoha_eth.c
+@@ -3044,6 +3044,7 @@ static int airoha_probe(struct platform_
+ error_napi_stop:
+ 	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ 		airoha_qdma_stop_napi(&eth->qdma[i]);
++	airoha_ppe_deinit(eth);
+ error_hw_cleanup:
+ 	for (i = 0; i < ARRAY_SIZE(eth->qdma); i++)
+ 		airoha_hw_cleanup(&eth->qdma[i]);

target/linux/airoha/patches-6.12/105-6.17-net-airoha-Get-rid-of-dma_sync_single_for_device-in-.patch

@@ -0,0 +1,40 @@
+From 4cd9d227ab838b3590c4b27e3707b8c3ef14d7e9 Mon Sep 17 00:00:00 2001
+From: Lorenzo Bianconi <lorenzo@kernel.org>
+Date: Wed, 25 Jun 2025 16:43:15 +0200
+Subject: [PATCH] net: airoha: Get rid of dma_sync_single_for_device() in
+ airoha_qdma_fill_rx_queue()
+
+Since the page_pool for airoha_eth driver is created with
+PP_FLAG_DMA_SYNC_DEV flag, we do not need to sync_for_device each page
+received from the pool since it is already done by the page_pool codebase.
+
+Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
+Reviewed-by: Alexander Lobakin <aleksander.lobakin@intel.com>
+Link: https://patch.msgid.link/20250625-airoha-sync-for-device-v1-1-923741deaabf@kernel.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_eth.c | 5 -----
+ 1 file changed, 5 deletions(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_eth.c
++++ b/drivers/net/ethernet/airoha/airoha_eth.c
+@@ -539,9 +539,7 @@ static int airoha_fe_init(struct airoha_
+ 
+ static int airoha_qdma_fill_rx_queue(struct airoha_queue *q)
+ {
+-	enum dma_data_direction dir = page_pool_get_dma_dir(q->page_pool);
+ 	struct airoha_qdma *qdma = q->qdma;
+-	struct airoha_eth *eth = qdma->eth;
+ 	int qid = q - &qdma->q_rx[0];
+ 	int nframes = 0;
+ 
+@@ -565,9 +563,6 @@ static int airoha_qdma_fill_rx_queue(str
+ 		e->dma_addr = page_pool_get_dma_addr(page) + offset;
+ 		e->dma_len = SKB_WITH_OVERHEAD(q->buf_size);
+ 
+-		dma_sync_single_for_device(eth->dev, e->dma_addr, e->dma_len,
+-					   dir);
+-
+ 		val = FIELD_PREP(QDMA_DESC_LEN_MASK, e->dma_len);
+ 		WRITE_ONCE(desc->ctrl, cpu_to_le32(val));
+ 		WRITE_ONCE(desc->addr, cpu_to_le32(e->dma_addr));

target/linux/airoha/patches-6.12/106-6.16-net-airoha-fix-potential-use-after-free-in-airoha_np.patch

@@ -0,0 +1,41 @@
+From 3cd582e7d0787506990ef0180405eb6224fa90a6 Mon Sep 17 00:00:00 2001
+From: Alok Tiwari <alok.a.tiwari@oracle.com>
+Date: Tue, 15 Jul 2025 07:30:58 -0700
+Subject: [PATCH] net: airoha: fix potential use-after-free in airoha_npu_get()
+
+np->name was being used after calling of_node_put(np), which
+releases the node and can lead to a use-after-free bug.
+Previously, of_node_put(np) was called unconditionally after
+of_find_device_by_node(np), which could result in a use-after-free if
+pdev is NULL.
+
+This patch moves of_node_put(np) after the error check to ensure
+the node is only released after both the error and success cases
+are handled appropriately, preventing potential resource issues.
+
+Fixes: 23290c7bc190 ("net: airoha: Introduce Airoha NPU support")
+Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://patch.msgid.link/20250715143102.3458286-1-alok.a.tiwari@oracle.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/ethernet/airoha/airoha_npu.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/airoha/airoha_npu.c
++++ b/drivers/net/ethernet/airoha/airoha_npu.c
+@@ -567,12 +567,13 @@ struct airoha_npu *airoha_npu_get(struct
+ 		return ERR_PTR(-ENODEV);
+ 
+ 	pdev = of_find_device_by_node(np);
+-	of_node_put(np);
+ 
+ 	if (!pdev) {
+ 		dev_err(dev, "cannot find device node %s\n", np->name);
++		of_node_put(np);
+ 		return ERR_PTR(-ENODEV);
+ 	}
++	of_node_put(np);
+ 
+ 	if (!try_module_get(THIS_MODULE)) {
+ 		dev_err(dev, "failed to get the device driver module\n");

target/linux/airoha/patches-6.12/116-02-net-airoha-deassert-XSI-line-on-hw-init.patch

@@ -13,7 +13,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 
 --- a/drivers/net/ethernet/airoha/airoha_eth.c
 +++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -1388,6 +1388,10 @@ static int airoha_hw_init(struct platfor
+@@ -1383,6 +1383,10 @@ static int airoha_hw_init(struct platfor
  	if (err)
  		return err;
  

target/linux/airoha/patches-6.12/116-03-net-airoha-add-reference-for-SPORT-GDM4-in-qdma_get_.patch

@@ -16,7 +16,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 
 --- a/drivers/net/ethernet/airoha/airoha_eth.c
 +++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -593,8 +593,11 @@ static int airoha_qdma_get_gdm_port(stru
+@@ -588,8 +588,11 @@ static int airoha_qdma_get_gdm_port(stru
  
  	sport = FIELD_GET(QDMA_ETH_RXMSG_SPORT_MASK, msg1);
  	switch (sport) {

target/linux/airoha/patches-6.12/116-05-net-airoha-drop-redundant-GDM3-4-define.patch

@@ -1,52 +0,0 @@
-From 6fbb7d72520393a3d447399799d436f17c03ff24 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Fri, 17 Jan 2025 10:29:52 +0100
-Subject: [PATCH 5/9] net: airoha: drop redundant GDM3/4 define
-
-The GDM FWD register are all the same hence it's redundant to have
-specific define for GDM3 and GDM4. Drop the redundant define and use the
-generic macro.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
----
- drivers/net/ethernet/airoha/airoha_eth.c  | 4 ++--
- drivers/net/ethernet/airoha/airoha_regs.h | 8 +-------
- 2 files changed, 3 insertions(+), 9 deletions(-)
-
---- a/drivers/net/ethernet/airoha/airoha_eth.c
-+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -514,8 +514,8 @@ static int airoha_fe_init(struct airoha_
- 		      FIELD_PREP(IP_ASSEMBLE_PORT_MASK, 0) |
- 		      FIELD_PREP(IP_ASSEMBLE_NBQ_MASK, 22));
- 
--	airoha_fe_set(eth, REG_GDM3_FWD_CFG, GDM3_PAD_EN_MASK);
--	airoha_fe_set(eth, REG_GDM4_FWD_CFG, GDM4_PAD_EN_MASK);
-+	airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN);
-+	airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN);
- 
- 	airoha_fe_crsn_qsel_init(eth);
- 
---- a/drivers/net/ethernet/airoha/airoha_regs.h
-+++ b/drivers/net/ethernet/airoha/airoha_regs.h
-@@ -128,6 +128,7 @@
- 	GENMASK(4 + (((_n) % 4) << 3),	(((_n) % 4) << 3))
- 
- #define REG_GDM_FWD_CFG(_n)		GDM_BASE(_n)
-+#define GDM_PAD_EN			BIT(28)
- #define GDM_DROP_CRC_ERR		BIT(23)
- #define GDM_IP4_CKSUM			BIT(22)
- #define GDM_TCP_CKSUM			BIT(21)
-@@ -352,13 +353,6 @@
- #define MBI_RX_AGE_SEL_MASK		GENMASK(26, 25)
- #define MBI_TX_AGE_SEL_MASK		GENMASK(18, 17)
- 
--#define REG_GDM3_FWD_CFG		GDM3_BASE
--#define GDM3_PAD_EN_MASK		BIT(28)
--
--#define REG_GDM4_FWD_CFG		GDM4_BASE
--#define GDM4_PAD_EN_MASK		BIT(28)
--#define GDM4_SPORT_OFFSET0_MASK		GENMASK(11, 8)
--
- #define REG_GDM4_SRC_PORT_SET		(GDM4_BASE + 0x23c)
- #define GDM4_SPORT_OFF2_MASK		GENMASK(19, 16)
- #define GDM4_SPORT_OFF1_MASK		GENMASK(15, 12)

target/linux/airoha/patches-6.12/116-06-net-airoha-add-initial-fixup-for-GDM3-4-port-support.patch

@@ -19,16 +19,16 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  		      FIELD_PREP(IP_ASSEMBLE_PORT_MASK, 0) |
  		      FIELD_PREP(IP_ASSEMBLE_NBQ_MASK, 22));
  
--	airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN);
--	airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN);
+-	airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN_MASK);
+-	airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN_MASK);
 +	airoha_fe_set(eth, REG_GDM_FWD_CFG(3),
-+		      GDM_PAD_EN | GDM_STRIP_CRC);
++		      GDM_PAD_EN_MASK | GDM_STRIP_CRC_MASK);
 +	airoha_fe_set(eth, REG_GDM_FWD_CFG(4),
-+		      GDM_PAD_EN | GDM_STRIP_CRC);
++		      GDM_PAD_EN_MASK | GDM_STRIP_CRC_MASK);
  
  	airoha_fe_crsn_qsel_init(eth);
  
-@@ -1630,7 +1632,8 @@ static int airoha_dev_open(struct net_de
+@@ -1625,7 +1627,8 @@ static int airoha_dev_open(struct net_de
  	if (err)
  		return err;
  

target/linux/airoha/patches-6.12/116-07-airoha-ethernet-drop-xsi-mac-reset.patch

@@ -15,7 +15,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 
 --- a/drivers/net/ethernet/airoha/airoha_eth.c
 +++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -3099,7 +3099,6 @@ static void airoha_remove(struct platfor
+@@ -3095,7 +3095,6 @@ static void airoha_remove(struct platfor
  }
  
  static const char * const en7581_xsi_rsts_names[] = {
@@ -23,7 +23,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  	"hsi0-mac",
  	"hsi1-mac",
  	"hsi-mac",
-@@ -3131,7 +3130,6 @@ static int airoha_en7581_get_src_port_id
+@@ -3127,7 +3126,6 @@ static int airoha_en7581_get_src_port_id
  }
  
  static const char * const an7583_xsi_rsts_names[] = {

target/linux/airoha/patches-6.12/116-10-net-airoha-add-phylink-support-for-GDM2-4.patch

@@ -35,7 +35,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  static void airoha_set_macaddr(struct airoha_gdm_port *port, const u8 *addr)
  {
  	struct airoha_eth *eth = port->qdma->eth;
-@@ -1627,6 +1633,17 @@ static int airoha_dev_open(struct net_de
+@@ -1622,6 +1628,17 @@ static int airoha_dev_open(struct net_de
  	struct airoha_gdm_port *port = netdev_priv(dev);
  	struct airoha_qdma *qdma = port->qdma;
  
@@ -53,7 +53,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  	netif_tx_start_all_queues(dev);
  	err = airoha_set_vip_for_gdm_port(port, true);
  	if (err)
-@@ -1680,6 +1697,11 @@ static int airoha_dev_stop(struct net_de
+@@ -1675,6 +1692,11 @@ static int airoha_dev_stop(struct net_de
  		}
  	}
  
@@ -65,7 +65,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  	return 0;
  }
  
-@@ -2828,6 +2850,20 @@ static const struct ethtool_ops airoha_e
+@@ -2823,6 +2845,20 @@ static const struct ethtool_ops airoha_e
  	.get_link		= ethtool_op_get_link,
  };
  
@@ -86,7 +86,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  static int airoha_metadata_dst_alloc(struct airoha_gdm_port *port)
  {
  	int i;
-@@ -2872,6 +2908,99 @@ bool airoha_is_valid_gdm_port(struct air
+@@ -2867,6 +2903,99 @@ bool airoha_is_valid_gdm_port(struct air
  	return false;
  }
  
@@ -186,7 +186,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  static int airoha_alloc_gdm_port(struct airoha_eth *eth,
  				 struct device_node *np, int index)
  {
-@@ -2950,6 +3079,12 @@ static int airoha_alloc_gdm_port(struct
+@@ -2945,6 +3074,12 @@ static int airoha_alloc_gdm_port(struct
  	if (err)
  		return err;
  
@@ -199,7 +199,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  	err = register_netdev(dev);
  	if (err)
  		goto free_metadata_dst;
-@@ -3064,6 +3199,10 @@ error_hw_cleanup:
+@@ -3060,6 +3195,10 @@ error_hw_cleanup:
  		if (port && port->dev->reg_state == NETREG_REGISTERED) {
  			unregister_netdev(port->dev);
  			airoha_metadata_dst_free(port);
@@ -210,7 +210,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  		}
  	}
  	free_netdev(eth->napi_dev);
-@@ -3091,6 +3230,10 @@ static void airoha_remove(struct platfor
+@@ -3087,6 +3226,10 @@ static void airoha_remove(struct platfor
  		airoha_dev_stop(port->dev);
  		unregister_netdev(port->dev);
  		airoha_metadata_dst_free(port);
@@ -236,7 +236,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  	DECLARE_BITMAP(qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS);
 --- a/drivers/net/ethernet/airoha/airoha_regs.h
 +++ b/drivers/net/ethernet/airoha/airoha_regs.h
-@@ -364,6 +364,18 @@
+@@ -359,6 +359,18 @@
  #define IP_FRAGMENT_PORT_MASK		GENMASK(8, 5)
  #define IP_FRAGMENT_NBQ_MASK		GENMASK(4, 0)
  

target/linux/airoha/patches-6.12/220-04-dt-bindings-soc-Add-bindings-for-Airoha-SCU-Serdes-l.patch

@@ -0,0 +1,35 @@
+From 39537b6b334dfac001aba395229adb9318627463 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 28 Oct 2025 12:09:57 +0100
+Subject: [PATCH 04/10] dt-bindings: soc: Add bindings for Airoha SCU Serdes
+ lines
+
+The Airoha AN7581 SoC have can configure the SCU serdes lines for
+multiple purpose. For example the Serdes for the USB1 port can be both
+used for USB 3.0 operation or for Ethernet. Or the USB2 serdes can both
+used for USB 3.0 operation or for PCIe.
+
+Add bindings to permit correct reference of the different ports in DT,
+mostly to differenciate the different supported modes internally to the
+drivers.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ include/dt-bindings/soc/airoha,scu-ssr.h | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+ create mode 100644 include/dt-bindings/soc/airoha,scu-ssr.h
+
+--- /dev/null
++++ b/include/dt-bindings/soc/airoha,scu-ssr.h
+@@ -0,0 +1,11 @@
++/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
++
++#ifndef __DT_BINDINGS_AIROHA_SCU_SSR_H
++#define __DT_BINDINGS_AIROHA_SCU_SSR_H
++
++#define AIROHA_SCU_SERDES_WIFI1		0
++#define AIROHA_SCU_SERDES_WIFI2		1
++#define AIROHA_SCU_SERDES_USB1		2
++#define AIROHA_SCU_SERDES_USB2		3
++
++#endif /* __DT_BINDINGS_AIROHA_SCU_SSR_H */

target/linux/airoha/patches-6.12/220-05-dt-bindings-phy-Add-documentation-for-Airoha-AN7581-.patch

@@ -0,0 +1,141 @@
+From e0095e21dd9179250c304d6df2643e9a50d48edb Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Fri, 7 Feb 2025 13:25:28 +0100
+Subject: [PATCH 05/10] dt-bindings: phy: Add documentation for Airoha AN7581
+ USB PHY
+
+Add documentation for Airoha AN7581 USB PHY that describe the USB PHY
+for the USB controller.
+
+Airoha AN7581 SoC support a maximum of 2 USB port. The USB 2.0 mode is
+always supported. The USB 3.0 mode is optional and depends on the Serdes
+mode currently configured on the system for the USB port.
+
+If the airoha,serdes-port property is not declared, it's assumed USB 3.0
+mode is not supported, as the Serdes mode can't be validated.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ .../bindings/phy/airoha,an7581-usb-phy.yaml   | 83 +++++++++++++++++++
+ MAINTAINERS                                   |  7 ++
+ .../dt-bindings/phy/airoha,an7581-usb-phy.h   | 11 +++
+ 3 files changed, 101 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yaml
+ create mode 100644 include/dt-bindings/phy/airoha,an7581-usb-phy.h
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yaml
+@@ -0,0 +1,83 @@
++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
++%YAML 1.2
++---
++$id: http://devicetree.org/schemas/phy/airoha,an7581-usb-phy.yaml#
++$schema: http://devicetree.org/meta-schemas/core.yaml#
++
++title: Airoha AN7581 SoC USB PHY
++
++maintainers:
++  - Christian Marangi <ansuelsmth@gmail.com>
++
++description: >
++  The Airoha AN7581 SoC USB PHY describes the USB PHY for the USB controller.
++
++  Airoha AN7581 SoC support a maximum of 2 USB port. The USB 2.0 mode is
++  always supported. The USB 3.0 mode is optional and depends on the Serdes
++  mode currently configured on the system for the USB port.
++
++  If the airoha,serdes-port property is not declared, it's assumed USB 3.0
++  mode is not supported, as the Serdes mode can't be validated.
++
++properties:
++  compatible:
++    const: airoha,an7581-usb-phy
++
++  reg:
++    maxItems: 1
++
++
++  airoha,usb2-monitor-clk-sel:
++    description: Describe what oscillator across the available 4
++      should be selected for USB 2.0 Slew Rate calibration.
++    $ref: /schemas/types.yaml#/definitions/uint32
++    enum: [0, 1, 2, 3]
++
++  airoha,serdes-port:
++    description: Describe what Serdes Port is attached to the USB 3.0 port.
++    $ref: /schemas/types.yaml#/definitions/uint32
++    enum: [0, 1, 2, 3]
++
++  airoha,scu:
++    description: Phandle to the SCU node for USB 3.0 Serdes mode validation.
++    $ref: /schemas/types.yaml#/definitions/phandle
++
++  '#phy-cells':
++    const: 1
++
++required:
++  - compatible
++  - reg
++  - airoha,usb2-monitor-clk-sel
++  - '#phy-cells'
++
++dependentRequired:
++  airoha,serdes-port: [ 'airoha,scu' ]
++
++additionalProperties: false
++
++examples:
++  - |
++    #include <dt-bindings/phy/airoha,an7581-usb-phy.h>
++    #include <dt-bindings/soc/airoha,scu-ssr.h>
++
++    phy@1fac0000 {
++        compatible = "airoha,an7581-usb-phy";
++        reg = <0x1fac0000 0x10000>;
++
++        airoha,usb2-monitor-clk-sel = <AIROHA_USB2_MONCLK_SEL1>;
++        airoha,scu = <&scu>;
++        airoha,serdes-port = <AIROHA_SCU_SERDES_USB1>;
++
++        #phy-cells = <1>;
++    };
++
++    phy@1fae0000 {
++        compatible = "airoha,an7581-usb-phy";
++        reg = <0x1fae0000 0x10000>;
++
++        airoha,usb2-monitor-clk-sel = <AIROHA_USB2_MONCLK_SEL2>;
++
++        #phy-cells = <1>;
++    };
++
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -737,6 +737,13 @@ S:	Maintained
+ F:	Documentation/devicetree/bindings/spi/airoha,en7581-snand.yaml
+ F:	drivers/spi/spi-airoha-snfi.c
+ 
++AIROHA USB PHY DRIVER
++M:	Christian Marangi <ansuelsmth@gmail.com>
++L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
++S:	Maintained
++F:	Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yaml
++F:	include/dt-bindings/phy/airoha,an7581-usb-phy.h
++
+ AIRSPY MEDIA DRIVER
+ L:	linux-media@vger.kernel.org
+ S:	Orphan
+--- /dev/null
++++ b/include/dt-bindings/phy/airoha,an7581-usb-phy.h
+@@ -0,0 +1,11 @@
++/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
++
++#ifndef _DT_BINDINGS_AIROHA_AN7581_USB_PHY_H_
++#define _DT_BINDINGS_AIROHA_AN7581_USB_PHY_H_
++
++#define AIROHA_USB2_MONCLK_SEL0                 0
++#define AIROHA_USB2_MONCLK_SEL1                 1
++#define AIROHA_USB2_MONCLK_SEL2                 2
++#define AIROHA_USB2_MONCLK_SEL3                 3
++
++#endif

target/linux/airoha/patches-6.12/220-07-phy-airoha-Add-support-for-Airoha-AN7581-USB-PHY.patch

@@ -0,0 +1,667 @@
+From fadd22890b239e5a251dbe47367cfbeb1ea105f7 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Fri, 7 Feb 2025 13:28:40 +0100
+Subject: [PATCH 07/10] phy: airoha: Add support for Airoha AN7581 USB PHY
+
+Add support for Airoha AN7581 USB PHY driver. AN7581 supports up to 2
+USB port with USB 2.0 mode always supported and USB 3.0 mode available
+only if the Serdes port is correctly configured for USB 3.0.
+
+The second USB port on the SoC can be both used for USB 3.0 operation or
+PCIe. (toggled by the SCU SSR register and configured by the USB PHY
+driver)
+
+If the USB 3.0 mode is not configured, the modes needs to be also
+disabled in the xHCI node or the driver will report unsable clock and
+fail probe.
+
+Also USB 3.0 PHY instance are provided only if the airoha,serdes-port
+and airoha,scu property is defined in DT, if it's not then USB 3.0 PHY
+is assumed not supported.
+
+For USB 2.0 Slew Rate calibration, airoha,usb2-monitor-clk-sel is
+mandatory and is used to select the monitor clock for calibration.
+
+Normally it's 1 for USB port 1 and 2 for USB port 2.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ MAINTAINERS                         |   1 +
+ drivers/phy/airoha/Kconfig          |  10 +
+ drivers/phy/airoha/Makefile         |   1 +
+ drivers/phy/airoha/phy-airoha-usb.c | 597 ++++++++++++++++++++++++++++
+ 4 files changed, 609 insertions(+)
+ create mode 100644 drivers/phy/airoha/phy-airoha-usb.c
+
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -742,6 +742,7 @@ M:	Christian Marangi <ansuelsmth@gmail.c
+ L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+ S:	Maintained
+ F:	Documentation/devicetree/bindings/phy/airoha,an7581-usb-phy.yaml
++F:	drivers/phy/airoha/phy-airoha-usb.c
+ F:	include/dt-bindings/phy/airoha,an7581-usb-phy.h
+ 
+ AIRSPY MEDIA DRIVER
+--- a/drivers/phy/airoha/Kconfig
++++ b/drivers/phy/airoha/Kconfig
+@@ -11,3 +11,13 @@ config PHY_AIROHA_PCIE
+ 	  Say Y here to add support for Airoha PCIe PHY driver.
+ 	  This driver create the basic PHY instance and provides initialize
+ 	  callback for PCIe GEN3 port.
++
++config PHY_AIROHA_USB
++	tristate "Airoha USB PHY Driver"
++	depends on ARCH_AIROHA || COMPILE_TEST
++	depends on OF
++	select GENERIC_PHY
++	help
++	  Say 'Y' here to add support for Airoha USB PHY driver.
++	  This driver create the basic PHY instance and provides initialize
++	  callback for USB port.
+--- a/drivers/phy/airoha/Makefile
++++ b/drivers/phy/airoha/Makefile
+@@ -1,3 +1,4 @@
+ # SPDX-License-Identifier: GPL-2.0
+ 
+ obj-$(CONFIG_PHY_AIROHA_PCIE)		+= phy-airoha-pcie.o
++obj-$(CONFIG_PHY_AIROHA_USB)		+= phy-airoha-usb.o
+--- /dev/null
++++ b/drivers/phy/airoha/phy-airoha-usb.c
+@@ -0,0 +1,596 @@
++// SPDX-License-Identifier: GPL-2.0
++/*
++ * Author: Christian Marangi <ansuelsmth@gmail.com>
++ */
++
++#include <dt-bindings/phy/phy.h>
++#include <dt-bindings/soc/airoha,scu-ssr.h>
++#include <linux/bitfield.h>
++#include <linux/math.h>
++#include <linux/module.h>
++#include <linux/mfd/syscon.h>
++#include <linux/phy/phy.h>
++#include <linux/platform_device.h>
++#include <linux/regmap.h>
++
++/* SCU */
++#define AIROHA_SCU_SSTR				0x9c
++#define   AIROHA_SCU_SSTR_USB_PCIE_SEL		BIT(3)
++#define   AIROHA_SCU_SSTR_USB_PCIE_SEL_PCIE	FIELD_PREP_CONST(AIROHA_SCU_SSTR_USB_PCIE_SEL, 0x0)
++#define   AIROHA_SCU_SSTR_USB_PCIE_SEL_USB	FIELD_PREP_CONST(AIROHA_SCU_SSTR_USB_PCIE_SEL, 0x1)
++
++/* U2PHY */
++#define AIROHA_USB_PHY_FMCR0			0x100
++#define   AIROHA_USB_PHY_MONCLK_SEL		GENMASK(27, 26)
++#define   AIROHA_USB_PHY_MONCLK_SEL0		FIELD_PREP_CONST(AIROHA_USB_PHY_MONCLK_SEL, 0x0)
++#define   AIROHA_USB_PHY_MONCLK_SEL1		FIELD_PREP_CONST(AIROHA_USB_PHY_MONCLK_SEL, 0x1)
++#define   AIROHA_USB_PHY_MONCLK_SEL2		FIELD_PREP_CONST(AIROHA_USB_PHY_MONCLK_SEL, 0x2)
++#define   AIROHA_USB_PHY_MONCLK_SEL3		FIELD_PREP_CONST(AIROHA_USB_PHY_MONCLK_SEL, 0x3)
++#define   AIROHA_USB_PHY_FREQDET_EN		BIT(24)
++#define   AIROHA_USB_PHY_CYCLECNT		GENMASK(23, 0)
++#define AIROHA_USB_PHY_FMMONR0			0x10c
++#define   AIROHA_USB_PHY_USB_FM_OUT		GENMASK(31, 0)
++#define AIROHA_USB_PHY_FMMONR1			0x110
++#define   AIROHA_USB_PHY_FRCK_EN		BIT(8)
++
++#define AIROHA_USB_PHY_USBPHYACR4		0x310
++#define   AIROHA_USB_PHY_USB20_FS_CR		GENMASK(10, 8)
++#define   AIROHA_USB_PHY_USB20_FS_CR_MAX	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_FS_CR, 0x0)
++#define   AIROHA_USB_PHY_USB20_FS_CR_NORMAL	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_FS_CR, 0x2)
++#define   AIROHA_USB_PHY_USB20_FS_CR_SMALLER	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_FS_CR, 0x4)
++#define   AIROHA_USB_PHY_USB20_FS_CR_MIN	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_FS_CR, 0x6)
++#define   AIROHA_USB_PHY_USB20_FS_SR		GENMASK(2, 0)
++#define   AIROHA_USB_PHY_USB20_FS_SR_MAX	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_FS_SR, 0x0)
++#define   AIROHA_USB_PHY_USB20_FS_SR_NORMAL	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_FS_SR, 0x2)
++#define   AIROHA_USB_PHY_USB20_FS_SR_SMALLER	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_FS_SR, 0x4)
++#define   AIROHA_USB_PHY_USB20_FS_SR_MIN	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_FS_SR, 0x6)
++#define AIROHA_USB_PHY_USBPHYACR5		0x314
++#define   AIROHA_USB_PHY_USB20_HSTX_SRCAL_EN	BIT(15)
++#define   AIROHA_USB_PHY_USB20_HSTX_SRCTRL	GENMASK(14, 12)
++#define AIROHA_USB_PHY_USBPHYACR6		0x318
++#define   AIROHA_USB_PHY_USB20_BC11_SW_EN	BIT(23)
++#define   AIROHA_USB_PHY_USB20_DISCTH		GENMASK(7, 4)
++#define   AIROHA_USB_PHY_USB20_DISCTH_400	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0x0)
++#define   AIROHA_USB_PHY_USB20_DISCTH_420	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0x1)
++#define   AIROHA_USB_PHY_USB20_DISCTH_440	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0x2)
++#define   AIROHA_USB_PHY_USB20_DISCTH_460	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0x3)
++#define   AIROHA_USB_PHY_USB20_DISCTH_480	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0x4)
++#define   AIROHA_USB_PHY_USB20_DISCTH_500	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0x5)
++#define   AIROHA_USB_PHY_USB20_DISCTH_520	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0x6)
++#define   AIROHA_USB_PHY_USB20_DISCTH_540	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0x7)
++#define   AIROHA_USB_PHY_USB20_DISCTH_560	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0x8)
++#define   AIROHA_USB_PHY_USB20_DISCTH_580	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0x9)
++#define   AIROHA_USB_PHY_USB20_DISCTH_600	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0xa)
++#define   AIROHA_USB_PHY_USB20_DISCTH_620	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0xb)
++#define   AIROHA_USB_PHY_USB20_DISCTH_640	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0xc)
++#define   AIROHA_USB_PHY_USB20_DISCTH_660	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0xd)
++#define   AIROHA_USB_PHY_USB20_DISCTH_680	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0xe)
++#define   AIROHA_USB_PHY_USB20_DISCTH_700	FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_DISCTH, 0xf)
++#define   AIROHA_USB_PHY_USB20_SQTH		GENMASK(3, 0)
++#define   AIROHA_USB_PHY_USB20_SQTH_85		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0x0)
++#define   AIROHA_USB_PHY_USB20_SQTH_90		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0x1)
++#define   AIROHA_USB_PHY_USB20_SQTH_95		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0x2)
++#define   AIROHA_USB_PHY_USB20_SQTH_100		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0x3)
++#define   AIROHA_USB_PHY_USB20_SQTH_105		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0x4)
++#define   AIROHA_USB_PHY_USB20_SQTH_110		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0x5)
++#define   AIROHA_USB_PHY_USB20_SQTH_115		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0x6)
++#define   AIROHA_USB_PHY_USB20_SQTH_120		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0x7)
++#define   AIROHA_USB_PHY_USB20_SQTH_125		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0x8)
++#define   AIROHA_USB_PHY_USB20_SQTH_130		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0x9)
++#define   AIROHA_USB_PHY_USB20_SQTH_135		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0xa)
++#define   AIROHA_USB_PHY_USB20_SQTH_140		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0xb)
++#define   AIROHA_USB_PHY_USB20_SQTH_145		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0xc)
++#define   AIROHA_USB_PHY_USB20_SQTH_150		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0xd)
++#define   AIROHA_USB_PHY_USB20_SQTH_155		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0xe)
++#define   AIROHA_USB_PHY_USB20_SQTH_160		FIELD_PREP_CONST(AIROHA_USB_PHY_USB20_SQTH, 0xf)
++
++#define AIROHA_USB_PHY_U2PHYDTM1		0x36c
++#define   AIROHA_USB_PHY_FORCE_IDDIG		BIT(9)
++#define   AIROHA_USB_PHY_IDDIG			BIT(1)
++
++#define AIROHA_USB_PHY_GPIO_CTLD		0x80c
++#define   AIROHA_USB_PHY_C60802_GPIO_CTLD	GENMASK(31, 0)
++#define     AIROHA_USB_PHY_SSUSB_IP_SW_RST	BIT(31)
++#define     AIROHA_USB_PHY_MCU_BUS_CK_GATE_EN	BIT(30)
++#define     AIROHA_USB_PHY_FORCE_SSUSB_IP_SW_RST BIT(29)
++#define     AIROHA_USB_PHY_SSUSB_SW_RST		BIT(28)
++
++#define AIROHA_USB_PHY_U3_PHYA_REG0		0xb00
++#define   AIROHA_USB_PHY_SSUSB_BG_DIV		GENMASK(29, 28)
++#define   AIROHA_USB_PHY_SSUSB_BG_DIV_2		FIELD_PREP_CONST(AIROHA_USB_PHY_SSUSB_BG_DIV, 0x0)
++#define   AIROHA_USB_PHY_SSUSB_BG_DIV_4		FIELD_PREP_CONST(AIROHA_USB_PHY_SSUSB_BG_DIV, 0x1)
++#define   AIROHA_USB_PHY_SSUSB_BG_DIV_8		FIELD_PREP_CONST(AIROHA_USB_PHY_SSUSB_BG_DIV, 0x2)
++#define   AIROHA_USB_PHY_SSUSB_BG_DIV_16	FIELD_PREP_CONST(AIROHA_USB_PHY_SSUSB_BG_DIV, 0x3)
++#define AIROHA_USB_PHY_U3_PHYA_REG1		0xb04
++#define   AIROHA_USB_PHY_SSUSB_XTAL_TOP_RESERVE	GENMASK(25, 10)
++#define AIROHA_USB_PHY_U3_PHYA_REG6		0xb18
++#define   AIROHA_USB_PHY_SSUSB_CDR_RESERVE	GENMASK(31, 24)
++#define AIROHA_USB_PHY_U3_PHYA_REG8		0xb20
++#define   AIROHA_USB_PHY_SSUSB_CDR_RST_DLY	GENMASK(7, 6)
++#define   AIROHA_USB_PHY_SSUSB_CDR_RST_DLY_32	FIELD_PREP_CONST(AIROHA_USB_PHY_SSUSB_CDR_RST_DLY, 0x0)
++#define   AIROHA_USB_PHY_SSUSB_CDR_RST_DLY_64	FIELD_PREP_CONST(AIROHA_USB_PHY_SSUSB_CDR_RST_DLY, 0x1)
++#define   AIROHA_USB_PHY_SSUSB_CDR_RST_DLY_128	FIELD_PREP_CONST(AIROHA_USB_PHY_SSUSB_CDR_RST_DLY, 0x2)
++#define   AIROHA_USB_PHY_SSUSB_CDR_RST_DLY_216	FIELD_PREP_CONST(AIROHA_USB_PHY_SSUSB_CDR_RST_DLY, 0x3)
++
++#define AIROHA_USB_PHY_U3_PHYA_DA_REG19		0xc38
++#define   AIROHA_USB_PHY_SSUSB_PLL_SSC_DELTA1_U3 GENMASK(15, 0)
++
++#define AIROHA_USB_PHY_U2_FM_DET_CYCLE_CNT	1024
++#define AIROHA_USB_PHY_REF_CK			20
++#define AIROHA_USB_PHY_U2_SR_COEF		28
++#define AIROHA_USB_PHY_U2_SR_COEF_DIVISOR	1000
++
++#define AIROHA_USB_PHY_DEFAULT_SR_CALIBRATION	0x5
++#define AIROHA_USB_PHY_FREQDET_SLEEP		1000 /* 1ms */
++#define AIROHA_USB_PHY_FREQDET_TIMEOUT		(AIROHA_USB_PHY_FREQDET_SLEEP * 10)
++
++struct airoha_usb_phy_instance {
++	struct phy *phy;
++	u32 type;
++};
++
++enum airoha_usb_phy_instance_type {
++	AIROHA_PHY_USB2,
++	AIROHA_PHY_USB3,
++
++	AIROHA_PHY_USB_MAX,
++};
++
++struct airoha_usb_phy_priv {
++	struct device *dev;
++	struct regmap *regmap;
++	struct regmap *scu;
++
++	unsigned int monclk_sel;
++	unsigned int serdes_port;
++
++	struct airoha_usb_phy_instance *phys[AIROHA_PHY_USB_MAX];
++};
++
++static void airoha_usb_phy_u2_slew_rate_calibration(struct airoha_usb_phy_priv *priv)
++{
++	u32 fm_out;
++	u32 srctrl;
++
++	/* Enable HS TX SR calibration */
++	regmap_set_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR5,
++			AIROHA_USB_PHY_USB20_HSTX_SRCAL_EN);
++
++	usleep_range(1000, 1500);
++
++	/* Enable Free run clock */
++	regmap_set_bits(priv->regmap, AIROHA_USB_PHY_FMMONR1,
++			AIROHA_USB_PHY_FRCK_EN);
++
++	/* Select Monitor Clock */
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_FMCR0,
++			   AIROHA_USB_PHY_MONCLK_SEL,
++			   FIELD_PREP(AIROHA_USB_PHY_MONCLK_SEL,
++				      priv->monclk_sel));
++
++	/* Set cyclecnt */
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_FMCR0,
++			   AIROHA_USB_PHY_CYCLECNT,
++			   FIELD_PREP(AIROHA_USB_PHY_CYCLECNT,
++				      AIROHA_USB_PHY_U2_FM_DET_CYCLE_CNT));
++
++	/* Enable Frequency meter */
++	regmap_set_bits(priv->regmap, AIROHA_USB_PHY_FMCR0,
++			AIROHA_USB_PHY_FREQDET_EN);
++
++	/* Timeout can happen and we will apply workaround at the end */
++	regmap_read_poll_timeout(priv->regmap, AIROHA_USB_PHY_FMMONR0, fm_out,
++				 fm_out, AIROHA_USB_PHY_FREQDET_SLEEP,
++				 AIROHA_USB_PHY_FREQDET_TIMEOUT);
++
++	/* Disable Frequency meter */
++	regmap_clear_bits(priv->regmap, AIROHA_USB_PHY_FMCR0,
++			  AIROHA_USB_PHY_FREQDET_EN);
++
++	/* Disable Free run clock */
++	regmap_clear_bits(priv->regmap, AIROHA_USB_PHY_FMMONR1,
++			  AIROHA_USB_PHY_FRCK_EN);
++
++	/* Disable HS TX SR calibration */
++	regmap_clear_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR5,
++			  AIROHA_USB_PHY_USB20_HSTX_SRCAL_EN);
++
++	usleep_range(1000, 1500);
++
++	/* Frequency was not detected, use default SR calibration value */
++	if (!fm_out) {
++		srctrl = AIROHA_USB_PHY_DEFAULT_SR_CALIBRATION;
++		dev_err(priv->dev, "Frequency not detected, using default SR calibration.\n");
++	} else {
++		/* (1024 / FM_OUT) * REF_CK * U2_SR_COEF (round to the nearest digits) */
++		srctrl = AIROHA_USB_PHY_REF_CK * AIROHA_USB_PHY_U2_SR_COEF;
++		srctrl = (srctrl * AIROHA_USB_PHY_U2_FM_DET_CYCLE_CNT) / fm_out;
++		srctrl = DIV_ROUND_CLOSEST(srctrl, AIROHA_USB_PHY_U2_SR_COEF_DIVISOR);
++		dev_dbg(priv->dev, "SR calibration applied: %x\n", srctrl);
++	}
++
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR5,
++			   AIROHA_USB_PHY_USB20_HSTX_SRCTRL,
++			   FIELD_PREP(AIROHA_USB_PHY_USB20_HSTX_SRCTRL, srctrl));
++}
++
++static void airoha_usb_phy_u2_init(struct airoha_usb_phy_priv *priv)
++{
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR4,
++			   AIROHA_USB_PHY_USB20_FS_CR,
++			   AIROHA_USB_PHY_USB20_FS_CR_MIN);
++
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR4,
++			   AIROHA_USB_PHY_USB20_FS_SR,
++			   AIROHA_USB_PHY_USB20_FS_SR_NORMAL);
++
++	/* FIXME: evaluate if needed */
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR6,
++			   AIROHA_USB_PHY_USB20_SQTH,
++			   AIROHA_USB_PHY_USB20_SQTH_130);
++
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR6,
++			   AIROHA_USB_PHY_USB20_DISCTH,
++			   AIROHA_USB_PHY_USB20_DISCTH_600);
++
++	/* Enable the USB port and then disable after calibration */
++	regmap_clear_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR6,
++			  AIROHA_USB_PHY_USB20_BC11_SW_EN);
++
++	airoha_usb_phy_u2_slew_rate_calibration(priv);
++
++	regmap_set_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR6,
++			AIROHA_USB_PHY_USB20_BC11_SW_EN);
++
++	usleep_range(1000, 1500);
++}
++
++/*
++ * USB 3.0 mode can only work if USB serdes is correctly set.
++ * This is validated in xLate function.
++ */
++static void airoha_usb_phy_u3_init(struct airoha_usb_phy_priv *priv)
++{
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_U3_PHYA_REG8,
++			   AIROHA_USB_PHY_SSUSB_CDR_RST_DLY,
++			   AIROHA_USB_PHY_SSUSB_CDR_RST_DLY_32);
++
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_U3_PHYA_REG6,
++			   AIROHA_USB_PHY_SSUSB_CDR_RESERVE,
++			   FIELD_PREP(AIROHA_USB_PHY_SSUSB_CDR_RESERVE, 0xe));
++
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_U3_PHYA_REG0,
++			   AIROHA_USB_PHY_SSUSB_BG_DIV,
++			   AIROHA_USB_PHY_SSUSB_BG_DIV_4);
++
++	regmap_set_bits(priv->regmap, AIROHA_USB_PHY_U3_PHYA_REG1,
++			FIELD_PREP(AIROHA_USB_PHY_SSUSB_XTAL_TOP_RESERVE, 0x600));
++
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_U3_PHYA_DA_REG19,
++			   AIROHA_USB_PHY_SSUSB_PLL_SSC_DELTA1_U3,
++			   FIELD_PREP(AIROHA_USB_PHY_SSUSB_PLL_SSC_DELTA1_U3, 0x43));
++}
++
++static int airoha_usb_phy_init(struct phy *phy)
++{
++	struct airoha_usb_phy_instance *instance = phy_get_drvdata(phy);
++	struct airoha_usb_phy_priv *priv = dev_get_drvdata(phy->dev.parent);
++
++	switch (instance->type) {
++	case PHY_TYPE_USB2:
++		airoha_usb_phy_u2_init(priv);
++		break;
++	case PHY_TYPE_USB3:
++		if (phy_get_mode(phy) == PHY_MODE_PCIE)
++			return 0;
++
++		airoha_usb_phy_u3_init(priv);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++static int airoha_usb_phy_u2_power_on(struct airoha_usb_phy_priv *priv)
++{
++	regmap_clear_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR6,
++			  AIROHA_USB_PHY_USB20_BC11_SW_EN);
++
++	usleep_range(1000, 1500);
++
++	return 0;
++}
++
++static int airoha_usb_phy_u3_power_on(struct airoha_usb_phy_priv *priv)
++{
++	regmap_clear_bits(priv->regmap, AIROHA_USB_PHY_GPIO_CTLD,
++			  AIROHA_USB_PHY_SSUSB_IP_SW_RST |
++			  AIROHA_USB_PHY_MCU_BUS_CK_GATE_EN |
++			  AIROHA_USB_PHY_FORCE_SSUSB_IP_SW_RST |
++			  AIROHA_USB_PHY_SSUSB_SW_RST);
++
++	usleep_range(1000, 1500);
++
++	return 0;
++}
++
++static int airoha_usb_phy_power_on(struct phy *phy)
++{
++	struct airoha_usb_phy_instance *instance = phy_get_drvdata(phy);
++	struct airoha_usb_phy_priv *priv = dev_get_drvdata(phy->dev.parent);
++
++	switch (instance->type) {
++	case PHY_TYPE_USB2:
++		airoha_usb_phy_u2_power_on(priv);
++		break;
++	case PHY_TYPE_USB3:
++		if (phy_get_mode(phy) == PHY_MODE_PCIE)
++			return 0;
++
++		airoha_usb_phy_u3_power_on(priv);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++static int airoha_usb_phy_u2_power_off(struct airoha_usb_phy_priv *priv)
++{
++	regmap_set_bits(priv->regmap, AIROHA_USB_PHY_USBPHYACR6,
++			AIROHA_USB_PHY_USB20_BC11_SW_EN);
++
++	usleep_range(1000, 1500);
++
++	return 0;
++}
++
++static int airoha_usb_phy_u3_power_off(struct airoha_usb_phy_priv *priv)
++{
++	regmap_set_bits(priv->regmap, AIROHA_USB_PHY_GPIO_CTLD,
++			AIROHA_USB_PHY_SSUSB_IP_SW_RST |
++			AIROHA_USB_PHY_FORCE_SSUSB_IP_SW_RST);
++
++	usleep_range(1000, 1500);
++
++	return 0;
++}
++
++static int airoha_usb_phy_power_off(struct phy *phy)
++{
++	struct airoha_usb_phy_instance *instance = phy_get_drvdata(phy);
++	struct airoha_usb_phy_priv *priv = dev_get_drvdata(phy->dev.parent);
++
++	switch (instance->type) {
++	case PHY_TYPE_USB2:
++		airoha_usb_phy_u2_power_off(priv);
++		break;
++	case PHY_TYPE_USB3:
++		if (phy_get_mode(phy) == PHY_MODE_PCIE)
++			return 0;
++
++		airoha_usb_phy_u3_power_off(priv);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++static int airoha_usb_phy_u2_set_mode(struct airoha_usb_phy_priv *priv,
++				      enum phy_mode mode)
++{
++	u32 val;
++
++	/*
++	 * For Device and Host mode, enable force IDDIG.
++	 * For Device set IDDIG, for Host clear IDDIG.
++	 * For OTG disable force and clear IDDIG bit while at it.
++	 */
++	switch (mode) {
++	case PHY_MODE_USB_DEVICE:
++		val = AIROHA_USB_PHY_IDDIG;
++		break;
++	case PHY_MODE_USB_HOST:
++		val = AIROHA_USB_PHY_FORCE_IDDIG |
++		      AIROHA_USB_PHY_FORCE_IDDIG;
++		break;
++	case PHY_MODE_USB_OTG:
++		val = 0;
++		break;
++	default:
++		return 0;
++	}
++
++	regmap_update_bits(priv->regmap, AIROHA_USB_PHY_U2PHYDTM1,
++			   AIROHA_USB_PHY_FORCE_IDDIG |
++			   AIROHA_USB_PHY_IDDIG, val);
++
++	return 0;
++}
++
++static int airoha_usb_phy_u3_set_mode(struct airoha_usb_phy_priv *priv,
++				      enum phy_mode mode)
++{
++	u32 sel;
++
++	/* Only USB2 supports PCIe mode */
++	if (mode == PHY_MODE_PCIE &&
++	    priv->serdes_port != AIROHA_SCU_SERDES_USB2)
++		return -EINVAL;
++
++	if (mode == PHY_MODE_PCIE)
++		sel = AIROHA_SCU_SSTR_USB_PCIE_SEL_PCIE;
++	else
++		sel = AIROHA_SCU_SSTR_USB_PCIE_SEL_USB;
++
++	regmap_update_bits(priv->scu, AIROHA_SCU_SSTR,
++			   AIROHA_SCU_SSTR_USB_PCIE_SEL, sel);
++
++	return 0;
++}
++
++static int airoha_usb_phy_set_mode(struct phy *phy, enum phy_mode mode, int submode)
++{
++	struct airoha_usb_phy_instance *instance = phy_get_drvdata(phy);
++	struct airoha_usb_phy_priv *priv = dev_get_drvdata(phy->dev.parent);
++
++	switch (instance->type) {
++	case PHY_TYPE_USB2:
++		return airoha_usb_phy_u2_set_mode(priv, mode);
++	case PHY_TYPE_USB3:
++		return airoha_usb_phy_u3_set_mode(priv, mode);
++	default:
++		return 0;
++	}
++}
++
++static struct phy *airoha_usb_phy_xlate(struct device *dev,
++					const struct of_phandle_args *args)
++{
++	struct airoha_usb_phy_priv *priv = dev_get_drvdata(dev);
++	struct airoha_usb_phy_instance *instance = NULL;
++	unsigned int index, phy_type;
++
++	if (args->args_count != 1) {
++		dev_err(dev, "invalid number of cells in 'phy' property\n");
++		return ERR_PTR(-EINVAL);
++	}
++
++	phy_type = args->args[0];
++	if (!(phy_type == PHY_TYPE_USB2 || phy_type == PHY_TYPE_USB3)) {
++		dev_err(dev, "unsupported device type: %d\n", phy_type);
++		return ERR_PTR(-EINVAL);
++	}
++
++	for (index = 0; index < AIROHA_PHY_USB_MAX; index++)
++		if (priv->phys[index] &&
++		    phy_type == priv->phys[index]->type) {
++			instance = priv->phys[index];
++			break;
++		}
++
++	if (!instance) {
++		dev_err(dev, "failed to find appropriate phy\n");
++		return ERR_PTR(-EINVAL);
++	}
++
++	return instance->phy;
++}
++
++static const struct phy_ops airoha_phy = {
++	.init		= airoha_usb_phy_init,
++	.power_on	= airoha_usb_phy_power_on,
++	.power_off	= airoha_usb_phy_power_off,
++	.set_mode	= airoha_usb_phy_set_mode,
++	.owner		= THIS_MODULE,
++};
++
++static const struct regmap_config airoha_usb_phy_regmap_config = {
++	.reg_bits = 32,
++	.val_bits = 32,
++	.reg_stride = 4,
++};
++
++static int airoha_usb_phy_probe(struct platform_device *pdev)
++{
++	struct phy_provider *phy_provider;
++	struct airoha_usb_phy_priv *priv;
++	struct device *dev = &pdev->dev;
++	unsigned int index;
++	void *base;
++	int ret;
++
++	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++
++	priv->dev = dev;
++
++	ret = of_property_read_u32(dev->of_node, "airoha,usb2-monitor-clk-sel",
++				   &priv->monclk_sel);
++	if (ret)
++		return dev_err_probe(dev, ret, "Monitor clock selection is mandatory for USB PHY calibration.\n");
++
++	if (priv->monclk_sel > 3)
++		return dev_err_probe(dev, -EINVAL, "only 4 Monitor clock are selectable on the SoC.\n");
++
++	base = devm_platform_ioremap_resource(pdev, 0);
++	if (IS_ERR(base))
++		return PTR_ERR(base);
++
++	priv->regmap = devm_regmap_init_mmio(dev, base, &airoha_usb_phy_regmap_config);
++	if (IS_ERR(priv->regmap))
++		return PTR_ERR(priv->regmap);
++
++	platform_set_drvdata(pdev, priv);
++
++	for (index = 0; index < AIROHA_PHY_USB_MAX; index++) {
++		enum airoha_usb_phy_instance_type phy_type;
++		struct airoha_usb_phy_instance *instance;
++
++		switch (index) {
++		case AIROHA_PHY_USB2:
++			phy_type = PHY_TYPE_USB2;
++			break;
++		case AIROHA_PHY_USB3:
++			phy_type = PHY_TYPE_USB3;
++			break;
++		}
++
++		/* Skip registering USB3 instance if not supported */
++		if (phy_type == PHY_TYPE_USB3) {
++			ret = of_property_read_u32(dev->of_node, "airoha,serdes-port",
++						   &priv->serdes_port);
++			if (ret)
++				continue;
++
++			/* With Serdes Port property, SCU is required */
++			priv->scu = syscon_regmap_lookup_by_phandle(dev->of_node,
++								    "airoha,scu");
++			if (IS_ERR(priv->scu))
++				return dev_err_probe(dev, PTR_ERR(priv->scu), "failed to get SCU syscon.\n");
++		}
++
++		instance = devm_kzalloc(dev, sizeof(*instance), GFP_KERNEL);
++		if (!instance)
++			return -ENOMEM;
++
++		instance->type = phy_type;
++		priv->phys[index] = instance;
++
++		instance->phy = devm_phy_create(dev, NULL, &airoha_phy);
++		if (IS_ERR(instance->phy))
++			return dev_err_probe(dev, PTR_ERR(instance->phy), "failed to create phy\n");
++
++		phy_set_drvdata(instance->phy, instance);
++	}
++
++	phy_provider = devm_of_phy_provider_register(&pdev->dev, airoha_usb_phy_xlate);
++
++	return PTR_ERR_OR_ZERO(phy_provider);
++}
++
++static const struct of_device_id airoha_phy_id_table[] = {
++	{ .compatible = "airoha,an7581-usb-phy" },
++	{ },
++};
++MODULE_DEVICE_TABLE(of, airoha_phy_id_table);
++
++static struct platform_driver airoha_usb_driver = {
++	.probe		= airoha_usb_phy_probe,
++	.driver		= {
++		.name	= "airoha-usb-phy",
++		.of_match_table = airoha_phy_id_table,
++	},
++};
++
++module_platform_driver(airoha_usb_driver);
++
++MODULE_AUTHOR("Christian Marangi <ansuelsmth@gmail.com>");
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Airoha USB PHY driver");

target/linux/airoha/patches-6.12/220-08-usb-host-add-ARCH_AIROHA-in-XHCI-MTK-dependency.patch

@@ -0,0 +1,25 @@
+From 3d3a406dea89b789dfb550bd05d0eba5ae926755 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Fri, 7 Feb 2025 14:17:06 +0100
+Subject: [PATCH 08/10] usb: host: add ARCH_AIROHA in XHCI MTK dependency
+
+Airoha SoC use the same register map a logic of the Mediatek xHCI
+driver, hence add it to the dependency list to permit compilation also
+on this ARCH.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/usb/host/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/usb/host/Kconfig
++++ b/drivers/usb/host/Kconfig
+@@ -71,7 +71,7 @@ config USB_XHCI_HISTB
+ config USB_XHCI_MTK
+ 	tristate "xHCI support for MediaTek SoCs"
+ 	select MFD_SYSCON
+-	depends on (MIPS && SOC_MT7621) || ARCH_MEDIATEK || COMPILE_TEST
++	depends on (MIPS && SOC_MT7621) || ARCH_MEDIATEK || ARCH_AIROHA || COMPILE_TEST
+ 	help
+ 	  Say 'Y' to enable the support for the xHCI host controller
+ 	  found in MediaTek SoCs.

target/linux/airoha/patches-6.12/220-10-PCI-mediatek-gen3-set-PHY-mode-for-Airoha-EN7581.patch

@@ -0,0 +1,34 @@
+From 112c6ea7ac356dab16e11084f2183e653a289e91 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 28 Oct 2025 12:35:41 +0100
+Subject: [PATCH 10/10] PCI: mediatek-gen3: set PHY mode for Airoha EN7581
+
+For the Airoha EN7581 SoC, the 3rd PCIe line is attached to a special
+PHY that can be both used for USB 3.0 operation or PCIe.
+
+Configure the PHY for PCIe operation before init it to correctly
+configure the SCU Serdes register.
+
+This permits correct functionality and enumeration of PCIe devices on
+the 3rd PCIe line present on the SoC.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/pci/controller/pcie-mediatek-gen3.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/pci/controller/pcie-mediatek-gen3.c
++++ b/drivers/pci/controller/pcie-mediatek-gen3.c
+@@ -925,6 +925,12 @@ static int mtk_pcie_en7581_power_up(stru
+ 	size = lower_32_bits(resource_size(entry->res));
+ 	regmap_write(pbus_regmap, args[1], GENMASK(31, __fls(size)));
+ 
++	err = phy_set_mode(pcie->phy, PHY_MODE_PCIE);
++	if (err) {
++		dev_err(dev, "failed to set PHY mode\n");
++		return err;
++	}
++
+ 	/*
+ 	 * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581
+ 	 * requires PHY initialization and power-on before PHY reset deassert.

target/linux/airoha/patches-6.12/604-02-net-ethernet-airoha-define-sport-value-for-GDM3.patch

@@ -14,7 +14,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
 
 --- a/drivers/net/ethernet/airoha/airoha_eth.c
 +++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -604,6 +604,9 @@ static int airoha_qdma_get_gdm_port(stru
+@@ -599,6 +599,9 @@ static int airoha_qdma_get_gdm_port(stru
  	case 0x18:
  		port = 3; /* GDM4 */
  		break;

target/linux/airoha/patches-6.12/606-net-airoha-disable-external-phy-code-if-PCS_AIROHA-i.patch

@@ -28,7 +28,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
  
  static void airoha_set_macaddr(struct airoha_gdm_port *port, const u8 *addr)
  {
-@@ -1636,6 +1638,7 @@ static int airoha_dev_open(struct net_de
+@@ -1631,6 +1633,7 @@ static int airoha_dev_open(struct net_de
  	struct airoha_gdm_port *port = netdev_priv(dev);
  	struct airoha_qdma *qdma = port->qdma;
  
@@ -36,7 +36,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
  	if (airhoa_is_phy_external(port)) {
  		err = phylink_of_phy_connect(port->phylink, dev->dev.of_node, 0);
  		if (err) {
-@@ -1646,6 +1649,7 @@ static int airoha_dev_open(struct net_de
+@@ -1641,6 +1644,7 @@ static int airoha_dev_open(struct net_de
  
  		phylink_start(port->phylink);
  	}
@@ -44,7 +44,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
  
  	netif_tx_start_all_queues(dev);
  	err = airoha_set_vip_for_gdm_port(port, true);
-@@ -1700,10 +1704,12 @@ static int airoha_dev_stop(struct net_de
+@@ -1695,10 +1699,12 @@ static int airoha_dev_stop(struct net_de
  		}
  	}
  
@@ -57,7 +57,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
  
  	return 0;
  }
-@@ -2853,6 +2859,7 @@ static const struct ethtool_ops airoha_e
+@@ -2848,6 +2854,7 @@ static const struct ethtool_ops airoha_e
  	.get_link		= ethtool_op_get_link,
  };
  
@@ -65,7 +65,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
  static struct phylink_pcs *airoha_phylink_mac_select_pcs(struct phylink_config *config,
  							 phy_interface_t interface)
  {
-@@ -2866,6 +2873,7 @@ static void airoha_mac_config(struct phy
+@@ -2861,6 +2868,7 @@ static void airoha_mac_config(struct phy
  			      const struct phylink_link_state *state)
  {
  }
@@ -73,7 +73,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
  
  static int airoha_metadata_dst_alloc(struct airoha_gdm_port *port)
  {
-@@ -2911,6 +2919,7 @@ bool airoha_is_valid_gdm_port(struct air
+@@ -2906,6 +2914,7 @@ bool airoha_is_valid_gdm_port(struct air
  	return false;
  }
  
@@ -81,7 +81,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
  static void airoha_mac_link_up(struct phylink_config *config, struct phy_device *phy,
  			       unsigned int mode, phy_interface_t interface,
  			       int speed, int duplex, bool tx_pause, bool rx_pause)
-@@ -3003,6 +3012,7 @@ static int airoha_setup_phylink(struct n
+@@ -2998,6 +3007,7 @@ static int airoha_setup_phylink(struct n
  
  	return 0;
  }
@@ -89,7 +89,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
  
  static int airoha_alloc_gdm_port(struct airoha_eth *eth,
  				 struct device_node *np, int index)
-@@ -3082,11 +3092,13 @@ static int airoha_alloc_gdm_port(struct
+@@ -3077,11 +3087,13 @@ static int airoha_alloc_gdm_port(struct
  	if (err)
  		return err;
  
@@ -103,7 +103,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
  
  	err = register_netdev(dev);
  	if (err)
-@@ -3202,10 +3214,12 @@ error_hw_cleanup:
+@@ -3198,10 +3210,12 @@ error_hw_cleanup:
  		if (port && port->dev->reg_state == NETREG_REGISTERED) {
  			unregister_netdev(port->dev);
  			airoha_metadata_dst_free(port);
@@ -116,7 +116,7 @@ Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
  		}
  	}
  	free_netdev(eth->napi_dev);
-@@ -3233,10 +3247,12 @@ static void airoha_remove(struct platfor
+@@ -3229,10 +3243,12 @@ static void airoha_remove(struct platfor
  		airoha_dev_stop(port->dev);
  		unregister_netdev(port->dev);
  		airoha_metadata_dst_free(port);

target/linux/airoha/patches-6.12/801-01-net-phy-add-PHY_DETACH_NO_HW_RESET-PHY-flag.patch

@@ -0,0 +1,129 @@
+From f2c6f8711c3866caafee997cfa60af4f38879be0 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 25 Jun 2025 00:45:11 +0200
+Subject: [PATCH 1/2] net: phy: add PHY_DETACH_NO_HW_RESET PHY flag
+
+Some PHY require a firmware to correctly work and such firmware might
+get reset when the GPIO reset is assert.
+
+This is the case for the Aeonsemi PHY where when the PHY is torn down,
+phy_detach() is called that assert the GPIO reset pin resetting the
+firmware.
+
+To handle this introduce a flag, PHY_DETACH_NO_HW_RESET that instruct
+phy_detach() to skip asserting the GPIO reset on detaching the PHY.
+
+The PHY is still reset in all other case where it's removed or the PHY
+fails to probe.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c    | 10 ++++++++++
+ drivers/net/phy/phy_device.c |  3 ++-
+ include/linux/phy.h          |  1 +
+ 3 files changed, 13 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/phy/as21xxx.c
++++ b/drivers/net/phy/as21xxx.c
+@@ -964,6 +964,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
++		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21011PB1),
+@@ -976,6 +977,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
++		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21010PB1),
+@@ -988,6 +990,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
++		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21010JB1),
+@@ -1000,6 +1003,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
++		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21210PB1),
+@@ -1012,6 +1016,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
++		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21510JB1),
+@@ -1024,6 +1029,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
++		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21510PB1),
+@@ -1036,6 +1042,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
++		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21511JB1),
+@@ -1048,6 +1055,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
++		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21210JB1),
+@@ -1060,6 +1068,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
++		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21511PB1),
+@@ -1072,6 +1081,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
++		.flags = PHY_DETACH_NO_RESET,
+ 	},
+ };
+ module_phy_driver(as21xxx_drivers);
+--- a/drivers/net/phy/phy_device.c
++++ b/drivers/net/phy/phy_device.c
+@@ -2074,7 +2074,8 @@ void phy_detach(struct phy_device *phyde
+ 		device_release_driver(&phydev->mdio.dev);
+ 
+ 	/* Assert the reset signal */
+-	phy_device_reset(phydev, 1);
++	if (!(phydev->drv->flags & PHY_DETACH_NO_HW_RESET))
++		phy_device_reset(phydev, 1);
+ 
+ 	/*
+ 	 * The phydev might go away on the put_device() below, so avoid
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -90,6 +90,7 @@ extern const int phy_10gbit_features_arr
+ #define PHY_RST_AFTER_CLK_EN	0x00000002
+ #define PHY_POLL_CABLE_TEST	0x00000004
+ #define PHY_ALWAYS_CALL_SUSPEND	0x00000008
++#define PHY_DETACH_NO_HW_RESET	0x00000010
+ #define MDIO_DEVICE_IS_PHY	0x80000000
+ 
+ /**

target/linux/airoha/patches-6.12/801-02-net-phy-as21xxx-add-flag-PHY_DETACH_NO_HW_RESET.patch

@@ -0,0 +1,108 @@
+From 7ad1470c3d08c1abea747aa0c789e924f63fcbc4 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Wed, 25 Jun 2025 00:51:45 +0200
+Subject: [PATCH 2/2] net: phy: as21xxx: add flag PHY_DETACH_NO_HW_RESET
+
+Add flag PHY_DETACH_NO_HW_RESET to handle firmware getting reset on
+calling phy_detach() if the GPIO reset PIN is defined in DT.
+
+This will skip the firmware from getting reset permitting the PHY to
+continue work when the PHY is torn down and gets up again.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c | 20 ++++++++++----------
+ 1 file changed, 10 insertions(+), 10 deletions(-)
+
+--- a/drivers/net/phy/as21xxx.c
++++ b/drivers/net/phy/as21xxx.c
+@@ -964,7 +964,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
++		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21011PB1),
+@@ -977,7 +977,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
++		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21010PB1),
+@@ -990,7 +990,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
++		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21010JB1),
+@@ -1003,7 +1003,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
++		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21210PB1),
+@@ -1016,7 +1016,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
++		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21510JB1),
+@@ -1029,7 +1029,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
++		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21510PB1),
+@@ -1042,7 +1042,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
++		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21511JB1),
+@@ -1055,7 +1055,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
++		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21210JB1),
+@@ -1068,7 +1068,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
++		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ 	{
+ 		PHY_ID_MATCH_EXACT(PHY_ID_AS21511PB1),
+@@ -1081,7 +1081,7 @@ static struct phy_driver as21xxx_drivers
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+ 		.led_hw_control_get = as21xxx_led_hw_control_get,
+ 		.led_polarity_set = as21xxx_led_polarity_set,
+-		.flags = PHY_DETACH_NO_RESET,
++		.flags = PHY_DETACH_NO_HW_RESET,
+ 	},
+ };
+ module_phy_driver(as21xxx_drivers);

target/linux/airoha/patches-6.12/802-01-net-phy-as21xxx-handle-corner-case-with-link-and-aut.patch

@@ -0,0 +1,31 @@
+From 0146a02d9d182796c3d8e4a432c4d94cac042f8e Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Mon, 7 Jul 2025 18:58:25 +0200
+Subject: [PATCH 1/4] net: phy: as21xxx: handle corner case with link and
+ autoneg complete
+
+Add missing case in custom read_link, when autoneg is started, autoneg
+complete bit is reset but link is still not up.
+
+Fixes: 830877d89edc ("net: phy: Add support for Aeonsemi AS21xxx PHYs")
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/net/phy/as21xxx.c
++++ b/drivers/net/phy/as21xxx.c
+@@ -658,6 +658,13 @@ static int as21xxx_read_link(struct phy_
+ 		return status;
+ 
+ 	phydev->link = !!(status & MDIO_STAT1_LSTATUS);
++	phydev->autoneg_complete = !!(status & MDIO_AN_STAT1_COMPLETE);
++
++	/* Consider the case that autoneg was started and "aneg complete"
++	 * bit has been reset, but "link up" bit not yet.
++	 */
++	if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete)
++		phydev->link = 0;
+ 
+ 	return 0;
+ }

target/linux/airoha/patches-6.12/802-02-net-phy-as21xxx-fix-read_status-speed-handling.patch

@@ -0,0 +1,156 @@
+From d90186b1e48dd4a428abf889b1eb17d2469de08b Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 8 Jul 2025 10:50:42 +0200
+Subject: [PATCH 2/4] net: phy: as21xxx: fix read_status speed handling
+
+With further test with 2.5G NIC it was discovered that
+phy_resolve_aneg_linkmode is not enough to detect speed higher that 1G
+when autoneg is enabled.
+
+Also in the switch case there is a typo where the speed mask is AND with
+VEND1_SPEED_STATUS instead of the correct mask VEND1_SPEED_MASK.
+
+Rework the read_status code to always read the speed from the vendor
+register and parse the generic bit only for the pause frame.
+
+Fixes: 830877d89edc ("net: phy: Add support for Aeonsemi AS21xxx PHYs")
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c | 96 +++++++++++++++++++++------------------
+ 1 file changed, 53 insertions(+), 43 deletions(-)
+
+--- a/drivers/net/phy/as21xxx.c
++++ b/drivers/net/phy/as21xxx.c
+@@ -671,7 +671,7 @@ static int as21xxx_read_link(struct phy_
+ 
+ static int as21xxx_read_c22_lpa(struct phy_device *phydev)
+ {
+-	int lpagb;
++	int lpagb, lpa;
+ 
+ 	/* MII_STAT1000 are only filled in the mapped C22
+ 	 * in C45, use that to fill lpagb values and check.
+@@ -698,12 +698,20 @@ static int as21xxx_read_c22_lpa(struct p
+ 	mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising,
+ 					lpagb);
+ 
++	lpa = phy_read_mmd(phydev, MDIO_MMD_AN,
++			   AS21XXX_MDIO_AN_C22 + MII_LPA);
++	if (lpa < 0)
++		return lpa;
++
++	mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
++
+ 	return 0;
+ }
+ 
+ static int as21xxx_read_status(struct phy_device *phydev)
+ {
+ 	int bmcr, old_link = phydev->link;
++	int speed;
+ 	int ret;
+ 
+ 	ret = as21xxx_read_link(phydev, &bmcr);
+@@ -720,58 +728,60 @@ static int as21xxx_read_status(struct ph
+ 	phydev->asym_pause = 0;
+ 
+ 	if (phydev->autoneg == AUTONEG_ENABLE) {
+-		ret = genphy_c45_read_lpa(phydev);
+-		if (ret)
+-			return ret;
++		if (!phydev->autoneg_complete) {
++			mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising,
++							0);
++			mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, 0);
++			return 0;
++		}
+ 
+ 		ret = as21xxx_read_c22_lpa(phydev);
+ 		if (ret)
+ 			return ret;
+-
+-		phy_resolve_aneg_linkmode(phydev);
+ 	} else {
+-		int speed;
+-
+ 		linkmode_zero(phydev->lp_advertising);
++	}
+ 
+-		speed = phy_read_mmd(phydev, MDIO_MMD_VEND1,
+-				     VEND1_SPEED_STATUS);
+-		if (speed < 0)
+-			return speed;
+-
+-		switch (speed & VEND1_SPEED_STATUS) {
+-		case VEND1_SPEED_10000:
+-			phydev->speed = SPEED_10000;
++	speed = phy_read_mmd(phydev, MDIO_MMD_VEND1,
++			     VEND1_SPEED_STATUS);
++	if (speed < 0)
++		return speed;
++
++	switch (speed & VEND1_SPEED_MASK) {
++	case VEND1_SPEED_10000:
++		phydev->speed = SPEED_10000;
++		phydev->duplex = DUPLEX_FULL;
++		break;
++	case VEND1_SPEED_5000:
++		phydev->speed = SPEED_5000;
++		phydev->duplex = DUPLEX_FULL;
++		break;
++	case VEND1_SPEED_2500:
++		phydev->speed = SPEED_2500;
++		phydev->duplex = DUPLEX_FULL;
++		break;
++	case VEND1_SPEED_1000:
++		phydev->speed = SPEED_1000;
++		if (bmcr & BMCR_FULLDPLX)
+ 			phydev->duplex = DUPLEX_FULL;
+-			break;
+-		case VEND1_SPEED_5000:
+-			phydev->speed = SPEED_5000;
+-			phydev->duplex = DUPLEX_FULL;
+-			break;
+-		case VEND1_SPEED_2500:
+-			phydev->speed = SPEED_2500;
+-			phydev->duplex = DUPLEX_FULL;
+-			break;
+-		case VEND1_SPEED_1000:
+-			phydev->speed = SPEED_1000;
+-			if (bmcr & BMCR_FULLDPLX)
+-				phydev->duplex = DUPLEX_FULL;
+-			else
+-				phydev->duplex = DUPLEX_HALF;
+-			break;
+-		case VEND1_SPEED_100:
+-			phydev->speed = SPEED_100;
+-			phydev->duplex = DUPLEX_FULL;
+-			break;
+-		case VEND1_SPEED_10:
+-			phydev->speed = SPEED_10;
+-			phydev->duplex = DUPLEX_FULL;
+-			break;
+-		default:
+-			return -EINVAL;
+-		}
++		else
++			phydev->duplex = DUPLEX_HALF;
++		break;
++	case VEND1_SPEED_100:
++		phydev->speed = SPEED_100;
++		phydev->duplex = DUPLEX_FULL;
++		break;
++	case VEND1_SPEED_10:
++		phydev->speed = SPEED_10;
++		phydev->duplex = DUPLEX_FULL;
++		break;
++	default:
++		return -EINVAL;
+ 	}
+ 
++	if (phydev->autoneg == AUTONEG_ENABLE)
++		phy_resolve_aneg_pause(phydev);
++
+ 	return 0;
+ }
+ 

target/linux/airoha/patches-6.12/802-03-net-phy-as21xxx-force-C45-OPs-for-AUTONEG.patch

@@ -0,0 +1,34 @@
+From 6003da596beb6b8974e61b7ff494476a323fbef5 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Tue, 8 Jul 2025 11:29:49 +0200
+Subject: [PATCH 3/4] net: phy: as21xxx: force C45 OPs for AUTONEG
+
+With further testing with 2.5G NIC, it was discovered that the PHY
+require the C45 OPs to configure and restart ANEG or speed higher than
+1G doesn't function correctly.
+
+To force C45 OPs with generic PHY function, clear the C22 bit from
+devices_in_package bitmask.
+
+Fixes: 830877d89edc ("net: phy: Add support for Aeonsemi AS21xxx PHYs")
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/net/phy/as21xxx.c
++++ b/drivers/net/phy/as21xxx.c
+@@ -616,6 +616,13 @@ static int as21xxx_probe(struct phy_devi
+ 	if (ret)
+ 		return ret;
+ 
++	/* Even if PHY declare support for Clause 22 register,
++	 * Clause 45 register should be used for ANEG configuration
++	 * and restart. Clear the C22 bit for devices_in_package to
++	 * force C45 generic OPs in generic PHY ANGE OPs.
++	 */
++	phydev->c45_ids.devices_in_package &= ~BIT(0);
++
+ 	ret = aeon_ipc_sync_parity(phydev, priv);
+ 	if (ret)
+ 		return ret;

target/linux/airoha/patches-6.12/804-net-phy-as21xxx-implement-read-workaround-for-C45-re.patch

@@ -0,0 +1,132 @@
+From fabaa8a7183d10217e14af437fd3805bd6dd9eba Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Sat, 18 Oct 2025 04:12:41 +0200
+Subject: [PATCH] net: phy: as21xxx: implement read workaround for C45 read
+
+This PHY have lots of problems with MDIO read operation. We somehow
+workaround this with using C45 operation for pretty much everything but
+this is not enough. The reference code for this PHY makes a write to an
+unused PHY to workaround this read problem. This was also confirmed by
+Aeonsemi.
+
+Various test were made to try to workaround this ins alternative way
+than the random write.
+
+One effective solution was to limit the write only to BMSR. And also
+write to BMSR is safe since they are only read only registers.
+
+This is only done for read operation as write operation doesn't suffer
+from this problem.
+
+Worth to mention that when multiple Aeonsemi PHY are mounted, the
+workaround doesn't work if we write to another Aeonsemi PHY.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ drivers/net/phy/as21xxx.c | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+--- a/drivers/net/phy/as21xxx.c
++++ b/drivers/net/phy/as21xxx.c
+@@ -966,6 +966,21 @@ out:
+ 	return ret;
+ }
+ 
++static int as21xxx_read_mmd(struct phy_device *phydev, int devad,
++			    u16 regnum)
++{
++	struct mii_bus *bus = phydev->mdio.bus;
++	int val;
++
++	val = __mdiobus_c45_read(bus, phydev->mdio.addr, devad,
++				 regnum);
++
++	/* FIXME: verify if it's actually ok to limit this to MII_BMSR */
++	__mdiobus_write(bus, 0x0, MII_BMSR, 0x1);
++
++	return val;
++}
++
+ static struct phy_driver as21xxx_drivers[] = {
+ 	{
+ 		/* PHY expose in C45 as 0x7500 0x9410
+@@ -983,6 +998,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
++		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -996,6 +1012,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
++		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1009,6 +1026,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
++		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1022,6 +1040,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
++		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1035,6 +1054,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
++		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1048,6 +1068,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
++		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1061,6 +1082,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
++		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1074,6 +1096,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
++		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1087,6 +1110,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
++		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,
+@@ -1100,6 +1124,7 @@ static struct phy_driver as21xxx_drivers
+ 		.probe		= as21xxx_probe,
+ 		.match_phy_device = as21xxx_match_phy_device,
+ 		.read_status	= as21xxx_read_status,
++		.read_mmd	= as21xxx_read_mmd,
+ 		.led_brightness_set = as21xxx_led_brightness_set,
+ 		.led_hw_is_supported = as21xxx_led_hw_is_supported,
+ 		.led_hw_control_set = as21xxx_led_hw_control_set,

target/linux/ath79/dts/ar9344_enterasys_ws-ap3705i.dts

@@ -68,22 +68,6 @@
 			color = <LED_COLOR_ID_GREEN>;
 			gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
 		};
-
-		radio2 {
-			label = "green:radio2";
-			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy0tpt";
-		};
-	};
-
-	ath9k-leds {
-		compatible = "gpio-leds";
-
-		radio1 {
-			label = "green:radio1";
-			gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy1tpt";
-		};
 	};
 
 	keys {
@@ -113,7 +97,14 @@
 
 &wmac {
 	status = "okay";
-	qca,no-eeprom;
+
+	nvmem-cells = <&cal_art_1000>;
+	nvmem-cell-names = "calibration";
+
+	led {
+		led-sources = <11>;
+		led-active-low;
+	};
 };
 
 &spi {
@@ -136,9 +127,13 @@
 			};
 
 			partition@80000 {
+				compatible = "u-boot,env";
 				label = "u-boot-env0";
 				reg = <0x80000 0x10000>;
 				read-only;
+
+				macaddr_uboot_ethaddr: ethaddr {
+				};
 			};
 
 			partition@90000 {
@@ -157,6 +152,20 @@
 				label = "calibrate";
 				reg = <0x120000 0x10000>;
 				read-only;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					cal_art_1000: calibration@1000 {
+						reg = <0x1000 0x440>;
+					};
+
+					cal_art_5000: calibration@5000 {
+						reg = <0x5000 0x440>;
+					};
+				};
 			};
 
 			partition@130000 {
@@ -193,12 +202,16 @@
 &pcie {
 	status = "okay";
 
-	ath9k: wifi@0,0 {
+	wifi@0,0 {
 		compatible = "pci168c,0033";
 		reg = <0x0000 0 0 0 0>;
-		qca,no-eeprom;
-		#gpio-cells = <2>;
-		gpio-controller;
+		nvmem-cells = <&cal_art_5000>;
+		nvmem-cell-names = "calibration";
+
+		led {
+			led-sources = <0>;
+			led-active-low;
+		};
 	};
 };
 
@@ -218,6 +231,9 @@
 	phy-mode = "rgmii";
 	phy-handle = <&phy0>;
 
+	nvmem-cells = <&macaddr_uboot_ethaddr>;
+	nvmem-cell-names = "mac-address";
+
 	gmac-config {
 		device = <&gmac>;
 		rgmii-gmac0 = <1>;

target/linux/ath79/dts/qca9557_engenius_esr1200.dts

@@ -73,12 +73,20 @@
 	status = "okay";
 };
 
-&wmac {
-	nvmem-cells = <&calibration_art_1000>;
-	nvmem-cell-names = "calibration";
+&nvmem {
+	calibration_art_5000: calibration@5000 {
+		reg = <0x5000 0x844>;
+	};
 };
 
-&ath10k_0 {
-	nvmem-cells = <&calibration_art_5000>;
-	nvmem-cell-names = "calibration";
+&wmac {
+	nvmem-cells = <&calibration_art_1000>, <&macaddr_uboot_eth 1>;
+	nvmem-cell-names = "calibration", "mac-address";
+};
+
+&wifi0 {
+	compatible = "qcom,ath10k";
+
+	nvmem-cells = <&calibration_art_5000>, <&macaddr_uboot_eth 0>;
+	nvmem-cell-names = "calibration", "mac-address";
 };

target/linux/ath79/dts/qca9557_extreme-networks_ws-ap3805i.dts

@@ -38,12 +38,6 @@
 			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
 			linux,default-trigger = "phy0tpt";
 		};
-
-		wlan2 {
-			label = "green:wlan2";
-			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "phy1tpt";
-		};
 	};
 
 	keys {
@@ -72,7 +66,13 @@
 &wmac {
 	status = "okay";
 
-	qca,no-eeprom;
+	nvmem-cells = <&cal_art_1000>;
+	nvmem-cell-names = "calibration";
+
+	led {
+		led-sources = <22>;
+		led-active-low;
+	};
 };
 
 &pcie0 {
@@ -102,6 +102,9 @@
 
 	pll-data = <0x82000000 0x80000101 0x80001313>;
 
+	nvmem-cells = <&macaddr_uboot_ethaddr>;
+	nvmem-cell-names = "mac-address";
+
 	gmac-config {
 		device = <&gmac>;
 		rgmii-enabled = <1>;
@@ -135,9 +138,13 @@
 			};
 
 			partition@100000 {
+				compatible = "u-boot,env";
 				label = "cfg1";
 				reg = <0x100000 0x40000>;
 				read-only;
+
+				macaddr_uboot_ethaddr: ethaddr {
+				};
 			};
 
 			partition@140000 {
@@ -204,6 +211,10 @@
 					#address-cells = <1>;
 					#size-cells = <1>;
 
+					cal_art_1000: calibration@1000 {
+						reg = <0x1000 0x440>;
+					};
+
 					cal_art_5000: calibration@5000 {
 						reg = <0x5000 0x844>;
 					};

target/linux/ath79/dts/qca9558_engenius_epg5000.dts

@@ -73,12 +73,20 @@
 	status = "okay";
 };
 
-&wmac {
-	nvmem-cells = <&calibration_art_1000>;
-	nvmem-cell-names = "calibration";
+&nvmem {
+	calibration_art_5000: calibration@5000 {
+		reg = <0x5000 0x844>;
+	};
 };
 
-&ath10k_0 {
-	nvmem-cells = <&calibration_art_5000>;
-	nvmem-cell-names = "calibration";
+&wmac {
+	nvmem-cells = <&calibration_art_1000>, <&macaddr_uboot_eth 1>;
+	nvmem-cell-names = "calibration", "mac-address";
+};
+
+&wifi0 {
+	compatible = "qcom,ath10k";
+
+	nvmem-cells = <&calibration_art_5000>, <&macaddr_uboot_eth 0>;
+	nvmem-cell-names = "calibration", "mac-address";
 };

target/linux/ath79/dts/qca9558_engenius_esr1750.dts

@@ -73,12 +73,20 @@
 	status = "okay";
 };
 
-&wmac {
-	nvmem-cells = <&calibration_art_1000>;
-	nvmem-cell-names = "calibration";
+&nvmem {
+	calibration_art_5000: calibration@5000 {
+		reg = <0x5000 0x844>;
+	};
 };
 
-&ath10k_0 {
-	nvmem-cells = <&calibration_art_5000>;
-	nvmem-cell-names = "calibration";
+&wmac {
+	nvmem-cells = <&calibration_art_1000>, <&macaddr_uboot_eth 1>;
+	nvmem-cell-names = "calibration", "mac-address";
+};
+
+&wifi0 {
+	compatible = "qcom,ath10k";
+
+	nvmem-cells = <&calibration_art_5000>, <&macaddr_uboot_eth 0>;
+	nvmem-cell-names = "calibration", "mac-address";
 };

target/linux/ath79/dts/qca9558_engenius_esr900.dts

@@ -73,18 +73,20 @@
 	status = "okay";
 };
 
-&wmac {
-	nvmem-cells = <&calibration_art_1000>;
-	nvmem-cell-names = "calibration";
-};
-
-&pcie0 {
-	status = "okay";
-
-	wifi@0,0 {
-		compatible = "pci168c,0033";
-		reg = <0x0000 0 0 0 0>;
-		nvmem-cells = <&calibration_art_5000>;
-		nvmem-cell-names = "calibration";
+&nvmem {
+	calibration_art_5000: calibration@5000 {
+		reg = <0x5000 0x440>;
 	};
 };
+
+&wmac {
+	nvmem-cells = <&calibration_art_1000>, <&macaddr_uboot_eth 0>;
+	nvmem-cell-names = "calibration", "mac-address";
+};
+
+&wifi0 {
+	compatible = "pci168c,0033";
+
+	nvmem-cells = <&calibration_art_5000>, <&macaddr_uboot_eth 1>;
+	nvmem-cell-names = "calibration", "mac-address";
+};

target/linux/ath79/dts/qca955x_senao_router-dual.dtsi

@@ -30,6 +30,9 @@
 
 	phy-handle = <&phy0>;
 	pll-data = <0xa6000000 0x00000101 0x00001616>;
+
+	nvmem-cells = <&macaddr_uboot_eth 0>;
+	nvmem-cell-names = "mac-address";
 };
 
 &mdio0 {
@@ -43,8 +46,7 @@
 &pcie0 {
 	status = "okay";
 
-	ath10k_0: wifi@0,0 {
-		compatible = "qcom,ath10k";
+	wifi0: wifi@0,0 {
 		reg = <0x0000 0 0 0 0>;
 	};
 };
@@ -72,6 +74,16 @@
 				label = "u-boot-env";
 				reg = <0x030000 0x010000>;
 				read-only;
+
+				nvmem-layout {
+					compatible = "u-boot,env";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_uboot_eth: ethaddr {
+						#nvmem-cell-cells = <1>;
+					};
+				};
 			};
 
 			partition@40000 {
@@ -103,7 +115,7 @@
 				reg = <0xff0000 0x010000>;
 				read-only;
 
-				nvmem-layout {
+				nvmem: nvmem-layout {
 					compatible = "fixed-layout";
 					#address-cells = <1>;
 					#size-cells = <1>;
@@ -111,10 +123,6 @@
 					calibration_art_1000: calibration@1000 {
 						reg = <0x1000 0x440>;
 					};
-
-					calibration_art_5000: calibration@5000 {
-						reg = <0x5000 0x844>;
-					};
 				};
 			};
 		};

target/linux/ath79/generic/base-files/etc/board.d/02_network

@@ -737,7 +737,6 @@ ath79_setup_macs()
 	engenius,esr1200|\
 	engenius,esr1750|\
 	engenius,esr900)
-		lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
 		wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
 		;;
 	engenius,ews511ap)
@@ -746,9 +745,6 @@ ath79_setup_macs()
 		ucidef_set_interface "eth0" ifname "eth0" protocol "none" macaddr "$lan_mac"
 		ucidef_set_interface "eth1" ifname "eth1" protocol "none" macaddr "$eth1_mac"
 		;;
-	enterasys,ws-ap3705i)
-		label_mac=$(mtd_get_mac_ascii u-boot-env0 ethaddr)
-		;;
 	hak5,lan-turtle|\
 	hak5,packet-squirrel)
 		label_mac=$(mtd_get_mac_binary u-boot 0x1fc00)

target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom

@@ -20,14 +20,6 @@ case "$FIRMWARE" in
 		caldata_extract "art" 0x1000 0x440
 		ath9k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env athaddr) 1)
 		;;
-	enterasys,ws-ap3705i)
-		caldata_extract "calibrate" 0x1000 0x440
-		ath9k_patch_mac $(mtd_get_mac_ascii u-boot-env0 RADIOADDR1)
-		;;
-	extreme-networks,ws-ap3805i)
-		caldata_extract "art" 0x1000 0x440
-		ath9k_patch_mac $(mtd_get_mac_ascii cfg1 RADIOADDR1)
-		;;
 	sitecom,wlr-7100|\
 	sitecom,wlr-8100)
 		caldata_extract "art" 0x1000 0x440
@@ -47,10 +39,6 @@ case "$FIRMWARE" in
 	avm,fritz300e)
 		caldata_extract_reverse "urloader" 0x1541 0x440
 		;;
-	enterasys,ws-ap3705i)
-		caldata_extract "calibrate" 0x5000 0x440
-		ath9k_patch_mac $(mtd_get_mac_ascii u-boot-env0 RADIOADDR0)
-		;;
 	meraki,mr12)
 		caldata_extract "art" 0x11000 0xeb8
 		;;

target/linux/ath79/generic/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac

@@ -52,19 +52,22 @@ case "$board" in
 		[ "$PHYNBR" -eq 0 ] && \
 			mtd_get_mac_ascii u-boot-env athaddr > /sys${DEVPATH}/macaddress
 		;;
-	engenius,epg5000|\
-	engenius,esr1200|\
-	engenius,esr1750|\
-	engenius,esr900)
-		macaddr_add "$(mtd_get_mac_ascii u-boot-env ethaddr)" "$PHYNBR" > /sys${DEVPATH}/macaddress
-		;;
 	engenius,ews511ap)
 		[ "$PHYNBR" -eq 0 ] && \
 		macaddr_add $(cat /sys/class/net/eth0/address) 1 > /sys${DEVPATH}/macaddress
 		;;
+	enterasys,ws-ap3705i)
+		[ "$PHYNBR" -eq 0 ] && \
+			mtd_get_mac_ascii u-boot-env0 RADIOADDR1 > /sys${DEVPATH}/macaddress
+		[ "$PHYNBR" -eq 1 ] && \
+			mtd_get_mac_ascii u-boot-env0 RADIOADDR0 > /sys${DEVPATH}/macaddress
+		;;
 	extreme-networks,ws-ap3805i)
 		[ "$PHYNBR" -eq 0 ] && \
-		mtd_get_mac_ascii cfg1 RADIOADDR0 > /sys${DEVPATH}/macaddress
+			mtd_get_mac_ascii cfg1 RADIOADDR0 > /sys${DEVPATH}/macaddress
+		;;
+		[ "$PHYNBR" -eq 1 ] && \
+			mtd_get_mac_ascii cfg1 RADIOADDR1 > /sys${DEVPATH}/macaddress
 		;;
 	iodata,wn-ac1167dgr|\
 	iodata,wn-ac1600dgr|\

target/linux/ath79/generic/base-files/lib/preinit/10_fix_eth_mac.sh

@@ -12,16 +12,6 @@ preinit_set_mac_address() {
 		ip link set dev eth0 address $(mtd_get_mac_ascii bdcfg "lanmac")
 		ip link set dev eth1 address $(mtd_get_mac_ascii bdcfg "wanmac")
 		;;
-	engenius,epg5000|\
-	engenius,esr1200|\
-	engenius,esr1750|\
-	engenius,esr900)
-		ip link set dev eth0 address $(mtd_get_mac_ascii u-boot-env ethaddr)
-		;;
-	enterasys,ws-ap3705i)
-		ip link set dev eth0 address $(mtd_get_mac_ascii u-boot-env0 ethaddr)
-		;;
-	extreme-networks,ws-ap3805i|\
 	siemens,ws-ap3610)
 		ip link set dev eth0 address $(mtd_get_mac_ascii cfg1 ethaddr)
 		;;

target/linux/ath79/patches-6.12/900-unaligned_access_hacks.patch

@@ -750,7 +750,7 @@ SVN-Revision: 35130
  EXPORT_SYMBOL(xfrm_parse_spi);
 --- a/net/ipv4/tcp_input.c
 +++ b/net/ipv4/tcp_input.c
-@@ -4338,14 +4338,16 @@ static bool tcp_parse_aligned_timestamp(
+@@ -4337,14 +4337,16 @@ static bool tcp_parse_aligned_timestamp(
  {
  	const __be32 *ptr = (const __be32 *)(th + 1);
  

target/linux/bcm27xx/patches-6.12/950-0018-arm64-setup-Fix-build-warning.patch

@@ -13,7 +13,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
 @@ -214,9 +214,9 @@ static void __init request_standard_reso
  	size_t res_size;
  
- 	kernel_code.start   = __pa_symbol(_stext);
+ 	kernel_code.start   = __pa_symbol(_text);
 -	kernel_code.end     = __pa_symbol(__init_begin - 1);
 +	kernel_code.end     = __pa_symbol(__init_begin) - 1;
  	kernel_data.start   = __pa_symbol(_sdata);

target/linux/bcm27xx/patches-6.12/950-0073-ASoC-Add-support-for-all-the-downstream-rpi-sound-ca.patch

@@ -18608,7 +18608,7 @@ Signed-off-by: j-schambacher <joerg@hifiberry.com>
  	}
 --- a/sound/usb/card.c
 +++ b/sound/usb/card.c
-@@ -869,8 +869,14 @@ static int usb_audio_probe(struct usb_in
+@@ -875,8 +875,14 @@ static int usb_audio_probe(struct usb_in
  	if (ignore_ctl_error)
  		chip->quirk_flags |= QUIRK_FLAG_IGNORE_CTL_ERROR;
  

target/linux/bcm27xx/patches-6.12/950-0094-net-lan78xx-Disable-TCP-Segmentation-Offload-TSO.patch

@@ -37,7 +37,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
  static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
  {
  	u32 *buf;
-@@ -3444,8 +3453,14 @@ static int lan78xx_bind(struct lan78xx_n
+@@ -3464,8 +3473,14 @@ static int lan78xx_bind(struct lan78xx_n
  	if (DEFAULT_RX_CSUM_ENABLE)
  		dev->net->features |= NETIF_F_RXCSUM;
  

target/linux/bcm27xx/patches-6.12/950-0096-lan78xx-Debounce-link-events-to-minimize-poll-storm.patch

@@ -28,7 +28,7 @@ See: https://github.com/raspberrypi/linux/issues/2447
  static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
  {
  	u32 *buf;
-@@ -4428,7 +4433,13 @@ static int lan78xx_probe(struct usb_inte
+@@ -4448,7 +4453,13 @@ static int lan78xx_probe(struct usb_inte
  	if (ret < 0)
  		goto out4;
  

target/linux/bcm27xx/patches-6.12/950-0098-Patching-lan78xx-for-SOF_TIMESTAMPING_TX_SOFTWARE-su.patch

@@ -16,4 +16,4 @@ Subject: [PATCH] Patching lan78xx for SOF_TIMESTAMPING_TX_SOFTWARE support
 +	.get_ts_info    = ethtool_op_get_ts_info,
  };
  
- static void lan78xx_init_mac_address(struct lan78xx_net *dev)
+ static int lan78xx_init_mac_address(struct lan78xx_net *dev)

target/linux/bcm27xx/patches-6.12/950-0099-lan78xx-Enable-LEDs-and-auto-negotiation.patch

@@ -14,7 +14,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
 
 --- a/drivers/net/usb/lan78xx.c
 +++ b/drivers/net/usb/lan78xx.c
-@@ -2897,6 +2897,11 @@ static int lan78xx_reset(struct lan78xx_
+@@ -2915,6 +2915,11 @@ static int lan78xx_reset(struct lan78xx_
  	int ret;
  	u32 buf;
  	u8 sig;
@@ -26,7 +26,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  
  	ret = lan78xx_read_reg(dev, HW_CFG, &buf);
  	if (ret < 0)
-@@ -2963,6 +2968,10 @@ static int lan78xx_reset(struct lan78xx_
+@@ -2983,6 +2988,10 @@ static int lan78xx_reset(struct lan78xx_
  	buf |= HW_CFG_CLK125_EN_;
  	buf |= HW_CFG_REFCLK25_EN_;
  
@@ -37,7 +37,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  	ret = lan78xx_write_reg(dev, HW_CFG, buf);
  	if (ret < 0)
  		return ret;
-@@ -3065,6 +3074,9 @@ static int lan78xx_reset(struct lan78xx_
+@@ -3085,6 +3094,9 @@ static int lan78xx_reset(struct lan78xx_
  			buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
  		}
  	}

target/linux/bcm27xx/patches-6.12/950-0322-Bluetooth-hci_sync-Add-fallback-bd-address-prop.patch

@@ -20,7 +20,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/net/bluetooth/hci_sync.c
 +++ b/net/bluetooth/hci_sync.c
-@@ -4928,6 +4928,7 @@ static const struct {
+@@ -4930,6 +4930,7 @@ static const struct {
   */
  static int hci_dev_setup_sync(struct hci_dev *hdev)
  {
@@ -28,7 +28,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  	int ret = 0;
  	bool invalid_bdaddr;
  	size_t i;
-@@ -4956,7 +4957,8 @@ static int hci_dev_setup_sync(struct hci
+@@ -4958,7 +4959,8 @@ static int hci_dev_setup_sync(struct hci
  			 test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
  	if (!ret) {
  		if (test_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks) &&

target/linux/bcm27xx/patches-6.12/950-0335-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch

@@ -75,7 +75,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
 --- a/drivers/usb/host/xhci-ring.c
 +++ b/drivers/usb/host/xhci-ring.c
-@@ -3664,6 +3664,48 @@ static int xhci_align_td(struct xhci_hcd
+@@ -3661,6 +3661,48 @@ static int xhci_align_td(struct xhci_hcd
  	return 1;
  }
  
@@ -124,7 +124,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  /* This is very similar to what ehci-q.c qtd_fill() does */
  int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
  		struct urb *urb, int slot_id, unsigned int ep_index)
-@@ -3818,6 +3860,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
+@@ -3815,6 +3857,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
  	}
  
  	check_trb_math(urb, enqd_len);
@@ -133,7 +133,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
  	giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
  			start_cycle, start_trb);
  	return 0;
-@@ -3966,6 +4010,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
+@@ -3963,6 +4007,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
  			/* Event on completion */
  			field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state);
  

target/linux/bcm27xx/patches-6.12/950-0476-lan78xx-Read-initial-EEE-status-from-DT.patch

@@ -15,7 +15,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/drivers/net/usb/lan78xx.c
 +++ b/drivers/net/usb/lan78xx.c
-@@ -2422,7 +2422,26 @@ static int lan78xx_phy_init(struct lan78
+@@ -2440,7 +2440,26 @@ static int lan78xx_phy_init(struct lan78
  	mii_adv_to_linkmode_adv_t(fc, mii_adv);
  	linkmode_or(phydev->advertising, fc, phydev->advertising);
  

target/linux/bcm27xx/patches-6.12/950-0502-Bluetooth-hci_sync-Fix-crash-on-NULL-parent.patch

@@ -15,7 +15,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
 
 --- a/net/bluetooth/hci_sync.c
 +++ b/net/bluetooth/hci_sync.c
-@@ -4928,7 +4928,8 @@ static const struct {
+@@ -4930,7 +4930,8 @@ static const struct {
   */
  static int hci_dev_setup_sync(struct hci_dev *hdev)
  {

target/linux/bcm27xx/patches-6.12/950-0830-media-mc-add-debugfs-node-to-keep-track-of-requests.patch

@@ -88,7 +88,7 @@ Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
  /* Called when the last user of the media device exits. */
  static void media_devnode_release(struct device *cd)
  {
-@@ -236,6 +239,7 @@ int __must_check media_devnode_register(
+@@ -231,6 +234,7 @@ int __must_check media_devnode_register(
  	if (devnode->parent)
  		devnode->dev.parent = devnode->parent;
  	dev_set_name(&devnode->dev, "media%d", devnode->minor);
@@ -96,7 +96,7 @@ Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
  	device_initialize(&devnode->dev);
  
  	/* Part 2: Initialize the character device */
-@@ -313,6 +317,7 @@ static int __init media_devnode_init(voi
+@@ -309,6 +313,7 @@ static int __init media_devnode_init(voi
  
  static void __exit media_devnode_exit(void)
  {

target/linux/bmips/bcm63268/base-files/etc/board.d/01_leds

@@ -23,6 +23,10 @@ sercomm,shg2500)
 	ucidef_set_led_usbport "usb1" "USB1" "blue:modem" "usb1-port1" "usb2-port1"
 	ucidef_set_led_usbport "usb2" "USB2" "green:modem" "usb1-port2" "usb2-port2"
 	;;
+sagem,fast-3864-op)
+	ucidef_set_led_netdev "wan_link" "WAN_LINK" "amber:wan" "wan" "link"
+	ucidef_set_led_netdev "wan_act" "WAN_ACT" "green:wan" "wan" "rx tx"
+	;;
 esac
 
 board_config_flush

target/linux/bmips/dts/bcm63168-sagem-fast-3864-op.dts

@@ -11,6 +11,10 @@
 		led-failsafe = &led_power_red;
 		led-running = &led_power_green;
 		led-upgrade = &led_power_green;
+
+		led-dsl = &led_dsl_green;
+		led-internet = &led_internet_green;
+		led-usb = &led_usb_green;
 	};
 
 	keys {
@@ -38,6 +42,56 @@
 			debounce-interval = <60>;
 		};
 	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_internet_green: led@8 {
+			label = "green:internet";
+			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
+		};
+
+		led_usb_green: led@9 {
+			label = "green:dsl_bonding";
+			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power_red: led@15 {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+		};
+
+		led_power_green: led@20 {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
+		};
+
+		led@36 {
+			function = LED_FUNCTION_WLAN;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
+		};
+
+		led@37 {
+			label = "green:wlan_pull_up";
+			default-state = "on";
+			gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
+		};
+
+		led@38 {
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_AMBER>;
+			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
+		};
+
+		led@39 {
+			function = LED_FUNCTION_WAN;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
+		};
+	};
 };
 
 &ehci {
@@ -59,7 +113,7 @@
 	brcm,serial-mux;
 
 	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_leds &pinctrl_serial_led>;
+	pinctrl-0 = <&pinctrl_serial_led>;
 
 	led@0 {
 		reg = <0>;
@@ -81,7 +135,7 @@
 		label = "red:internet";
 	};
 
-	led@3 {
+	led_dsl_green: led@3 {
 		reg = <3>;
 		active-low;
 		label = "green:dsl";
@@ -98,32 +152,6 @@
 		active-low;
 		label = "red:fxs";
 	};
-
-	led@8 {
-		reg = <8>;
-		active-low;
-		label = "green:internet";
-	};
-
-	led@9 {
-		reg = <9>;
-		active-low;
-		label = "green:dsl_bonding";
-	};
-
-	led_power_red: led@15 {
-		reg = <15>;
-		active-low;
-		function = LED_FUNCTION_POWER;
-		color = <LED_COLOR_ID_RED>;
-	};
-
-	led_power_green: led@20 {
-		reg = <20>;
-		active-low;
-		function = LED_FUNCTION_POWER;
-		color = <LED_COLOR_ID_GREEN>;
-	};
 };
 
 &mdio_ext {
@@ -241,14 +269,6 @@
 	status = "okay";
 };
 
-&pinctrl {
-	pinctrl_leds: leds {
-		function = "led";
-		pins = "gpio8", "gpio9", "gpio15",
-		       "gpio20";
-	};
-};
-
 &switch0 {
 	dsa,member = <0 0>;
 

target/linux/bmips/image/bcm63268.mk

@@ -71,6 +71,7 @@ define Device/sagem_fast-3864-op
   SUBPAGESIZE := 512
   VID_HDR_OFFSET := 2048
   DEVICE_PACKAGES += $(USB2_PACKAGES) \
+    kmod-leds-gpio \
     kmod-leds-bcm6328
   CFE_WFI_FLASH_TYPE := 3
   CFE_WFI_VERSION := 0x5732

target/linux/econet/patches-6.12/902-snand-mtk-bmt-support.patch

@@ -8,7 +8,7 @@
  
  static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
  {
-@@ -1530,6 +1531,7 @@ static int spinand_probe(struct spi_mem
+@@ -1574,6 +1575,7 @@ static int spinand_probe(struct spi_mem
  	if (ret)
  		return ret;
  
@@ -16,7 +16,7 @@
  	ret = mtd_device_register(mtd, NULL, 0);
  	if (ret)
  		goto err_spinand_cleanup;
-@@ -1537,6 +1539,7 @@ static int spinand_probe(struct spi_mem
+@@ -1581,6 +1583,7 @@ static int spinand_probe(struct spi_mem
  	return 0;
  
  err_spinand_cleanup:
@@ -24,7 +24,7 @@
  	spinand_cleanup(spinand);
  
  	return ret;
-@@ -1555,6 +1558,7 @@ static int spinand_remove(struct spi_mem
+@@ -1599,6 +1602,7 @@ static int spinand_remove(struct spi_mem
  	if (ret)
  		return ret;
  

target/linux/generic/backport-6.12/541-v6.18-ksmbd-add-max-ip-connections-parameter.patch

@@ -1,119 +0,0 @@
-From d8b6dc9256762293048bf122fc11c4e612d0ef5d Mon Sep 17 00:00:00 2001
-From: Namjae Jeon <linkinjeon@kernel.org>
-Date: Wed, 1 Oct 2025 09:25:35 +0900
-Subject: ksmbd: add max ip connections parameter
-
-This parameter set the maximum number of connections per ip address.
-The default is 8.
-
-Cc: stable@vger.kernel.org
-Fixes: c0d41112f1a5 ("ksmbd: extend the connection limiting mechanism to support IPv6")
-Signed-off-by: Namjae Jeon <linkinjeon@kernel.org>
-Signed-off-by: Steve French <stfrench@microsoft.com>
----
- fs/smb/server/ksmbd_netlink.h |  5 +++--
- fs/smb/server/server.h        |  1 +
- fs/smb/server/transport_ipc.c |  3 +++
- fs/smb/server/transport_tcp.c | 27 ++++++++++++++++-----------
- 4 files changed, 23 insertions(+), 13 deletions(-)
-
-(limited to 'fs/smb')
-
---- a/fs/smb/server/ksmbd_netlink.h
-+++ b/fs/smb/server/ksmbd_netlink.h
-@@ -112,10 +112,11 @@ struct ksmbd_startup_request {
- 	__u32	smbd_max_io_size;	/* smbd read write size */
- 	__u32	max_connections;	/* Number of maximum simultaneous connections */
- 	__s8	bind_interfaces_only;
--	__s8	reserved[503];		/* Reserved room */
-+	__u32	max_ip_connections;	/* Number of maximum connection per ip address */
-+	__s8	reserved[499];		/* Reserved room */
- 	__u32	ifc_list_sz;		/* interfaces list size */
- 	__s8	____payload[];
--};
-+} __packed;
- 
- #define KSMBD_STARTUP_CONFIG_INTERFACES(s)	((s)->____payload)
- 
---- a/fs/smb/server/server.h
-+++ b/fs/smb/server/server.h
-@@ -43,6 +43,7 @@ struct ksmbd_server_config {
- 	unsigned int		auth_mechs;
- 	unsigned int		max_connections;
- 	unsigned int		max_inflight_req;
-+	unsigned int		max_ip_connections;
- 
- 	char			*conf[SERVER_CONF_WORK_GROUP + 1];
- 	struct task_struct	*dh_task;
---- a/fs/smb/server/transport_ipc.c
-+++ b/fs/smb/server/transport_ipc.c
-@@ -335,6 +335,9 @@ static int ipc_server_config_on_startup(
- 	if (req->max_connections)
- 		server_conf.max_connections = req->max_connections;
- 
-+	if (req->max_ip_connections)
-+		server_conf.max_ip_connections = req->max_ip_connections;
-+
- 	ret = ksmbd_set_netbios_name(req->netbios_name);
- 	ret |= ksmbd_set_server_string(req->server_string);
- 	ret |= ksmbd_set_work_group(req->work_group);
---- a/fs/smb/server/transport_tcp.c
-+++ b/fs/smb/server/transport_tcp.c
-@@ -240,6 +240,7 @@ static int ksmbd_kthread_fn(void *p)
- 	struct interface *iface = (struct interface *)p;
- 	struct ksmbd_conn *conn;
- 	int ret;
-+	unsigned int max_ip_conns;
- 
- 	while (!kthread_should_stop()) {
- 		mutex_lock(&iface->sock_release_lock);
-@@ -257,34 +258,38 @@ static int ksmbd_kthread_fn(void *p)
- 			continue;
- 		}
- 
-+		if (!server_conf.max_ip_connections)
-+			goto skip_max_ip_conns_limit;
-+
- 		/*
- 		 * Limits repeated connections from clients with the same IP.
- 		 */
-+		max_ip_conns = 0;
- 		down_read(&conn_list_lock);
--		list_for_each_entry(conn, &conn_list, conns_list)
-+		list_for_each_entry(conn, &conn_list, conns_list) {
- #if IS_ENABLED(CONFIG_IPV6)
- 			if (client_sk->sk->sk_family == AF_INET6) {
- 				if (memcmp(&client_sk->sk->sk_v6_daddr,
--					   &conn->inet6_addr, 16) == 0) {
--					ret = -EAGAIN;
--					break;
--				}
-+					   &conn->inet6_addr, 16) == 0)
-+					max_ip_conns++;
- 			} else if (inet_sk(client_sk->sk)->inet_daddr ==
--				 conn->inet_addr) {
--				ret = -EAGAIN;
--				break;
--			}
-+				 conn->inet_addr)
-+				max_ip_conns++;
- #else
- 			if (inet_sk(client_sk->sk)->inet_daddr ==
--			    conn->inet_addr) {
-+			    conn->inet_addr)
-+				max_ip_conns++;
-+#endif
-+			if (server_conf.max_ip_connections <= max_ip_conns) {
- 				ret = -EAGAIN;
- 				break;
- 			}
--#endif
-+		}
- 		up_read(&conn_list_lock);
- 		if (ret == -EAGAIN)
- 			continue;
- 
-+skip_max_ip_conns_limit:
- 		if (server_conf.max_connections &&
- 		    atomic_inc_return(&active_num_conn) >= server_conf.max_connections) {
- 			pr_info_ratelimited("Limit the maximum number of connections(%u)\n",