Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2025-12-03 14:10:00 +08:00
commit 6afd99957b
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
72 changed files with 436 additions and 231 deletions

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@ -72,7 +72,7 @@ extern u64 uevent_next_seqnum(void);
.name = (_name), \
}
static struct bh_map button_map[] = {
static const struct bh_map button_map[] = {
BH_MAP(BTN_0, "BTN_0"),
BH_MAP(BTN_1, "BTN_1"),
BH_MAP(BTN_2, "BTN_2"),

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@ -72,7 +72,7 @@ extern u64 uevent_next_seqnum(void);
.name = (_name), \
}
static struct bh_map button_map[] = {
static const struct bh_map button_map[] = {
BH_MAP(BTN_0, "BTN_0"),
BH_MAP(BTN_1, "BTN_1"),
BH_MAP(BTN_2, "BTN_2"),
@ -463,13 +463,12 @@ static int gpio_keys_button_probe(struct platform_device *pdev,
return -EINVAL;
}
buttons = devm_kzalloc(dev, pdata->nbuttons * sizeof(struct gpio_keys_button),
buttons = devm_kmemdup_array(dev, pdata->buttons, pdata->nbuttons, sizeof(struct gpio_keys_button),
GFP_KERNEL);
if (!buttons) {
dev_err(dev, "no memory for button data\n");
return -ENOMEM;
}
memcpy(buttons, pdata->buttons, pdata->nbuttons * sizeof(struct gpio_keys_button));
bdev = devm_kzalloc(dev, sizeof(struct gpio_keys_button_dev) +
pdata->nbuttons * sizeof(struct gpio_keys_button_data),

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@ -1286,8 +1286,7 @@ IFX_MEI_RunAdslModem (DSL_DEV_Device_t *pDev)
// DSL_DEV_WinHost_Message_t m;
if (mei_arc_swap_buff == NULL) {
mei_arc_swap_buff =
(u32 *) kmalloc (MAXSWAPSIZE * 4, GFP_KERNEL);
mei_arc_swap_buff = kmalloc (MAXSWAPSIZE * 4, GFP_KERNEL);
if (mei_arc_swap_buff == NULL) {
IFX_MEI_EMSG (">>> malloc fail for codeswap buff!!! <<<\n");
return DSL_DEV_MEI_ERR_FAILURE;

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@ -418,7 +418,7 @@ typedef struct _arc_img_hdr {
u32 size; // Size of binary image in bytes
u32 checksum; // Checksum for image
u32 count; // Count of swp pages in image
ARC_SWP_PAGE_HDR page[1]; // Should be "count" pages - '1' to make compiler happy
ARC_SWP_PAGE_HDR page[]; // Should be "count" pages - '1' to make compiler happy
} ARC_IMG_HDR;
typedef struct smmu_mem_info {

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@ -224,8 +224,8 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len,
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

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@ -163,8 +163,8 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len,
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

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@ -110,8 +110,8 @@ static inline int danube_pp32_download_code(u32 *code_src, unsigned int code_dwo
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

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@ -34,7 +34,7 @@
#define ATM_FW_VER_MINOR 16
static unsigned int firmware_binary_code[] = {
static const unsigned int firmware_binary_code[] = {
0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000,
0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x80004cc8, 0xc2000000, 0xda0800f9, 0x80004330,
@ -450,7 +450,7 @@ static unsigned int firmware_binary_code[] = {
0x9d000000, 0xcd4000f8, 0x00000000, 0x00000000, 0x9d000000, 0x4158a000, 0xcd4000f8, 0x00000000,
};
static unsigned int firmware_binary_data[] = {
static const unsigned int firmware_binary_data[] = {
};

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@ -32,7 +32,7 @@
#define ATM_FW_VER_MINOR 16
static unsigned int ar9_fw_bin[] = {
static const unsigned int ar9_fw_bin[] = {
0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000,
0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x80004980, 0xc2000000, 0xda0800f9, 0x80003fe8,
@ -432,7 +432,7 @@ static unsigned int ar9_fw_bin[] = {
0xcd4000f8, 0x00000000,
};
static unsigned int ar9_fw_data[] = {
static const unsigned int ar9_fw_data[] = {
};

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@ -32,7 +32,7 @@
#define ATM_FW_VER_MINOR 15
static unsigned int firmware_binary_code[] = {
static const unsigned int firmware_binary_code[] = {
0x800004B8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFE0, 0x00000000, 0x00000000, 0x00000000,
0xC1000002, 0xD90C00F8, 0xC2000002, 0xDA0800F9, 0xC0001B50, 0x8C100000, 0x00000000, 0x00000000,
@ -604,7 +604,7 @@ static unsigned int firmware_binary_code[] = {
0xCDC000F8, 0xC1C00000, 0xC0004734, 0x9CC00000, 0xCDC000F8, 0xC0004732, 0xCD8000F8,
};
static unsigned int firmware_binary_data[] = {
static const unsigned int firmware_binary_data[] = {
};

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@ -35,7 +35,7 @@
// add multiple queue per PVC feature
static unsigned int danube_fw_bin[] = {
static const unsigned int danube_fw_bin[] = {
0x800004A0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFC8, 0x00000000, 0x00000000, 0x00000000,
0xC1000002, 0xD90C0000, 0xC2000002, 0xDA080001, 0x80004968, 0xC2000000, 0xDA080001, 0x80003FD0,
@ -435,7 +435,7 @@ static unsigned int danube_fw_bin[] = {
0xCD400000, 0x00000000,
};
static unsigned int danube_fw_data[] = {
static const unsigned int danube_fw_data[] = {
};

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@ -33,7 +33,7 @@
#define ATM_FW_VER_MINOR 15
static unsigned int firmware_binary_code[] = {
static const unsigned int firmware_binary_code[] = {
0x800004A0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFC8, 0x00000000, 0x00000000, 0x00000000,
0xC1000002, 0xD90C0000, 0xC2000002, 0xDA080001, 0xC0001B50, 0x8C100000, 0x00000000, 0x00000000,
@ -605,7 +605,7 @@ static unsigned int firmware_binary_code[] = {
0xCDC00000, 0xC1C00000, 0xC0004734, 0x9CC00000, 0xCDC00000, 0xC0004732, 0xCD800000,
};
static unsigned int firmware_binary_data[] = {
static const unsigned int firmware_binary_data[] = {
};

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@ -32,7 +32,7 @@
#define ATM_FW_VER_MINOR 24
static u32 vr9_fw_bin[] = {
static const u32 vr9_fw_bin[] = {
0x800004B8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000FFE0, 0x00000000, 0x00000000, 0x00000000,
0xC1000002, 0xD90C00F8, 0xC2000002, 0xDA0800F9, 0x80004390, 0xC2000000, 0xDA0800F9, 0x80003A10,
@ -419,7 +419,7 @@ static u32 vr9_fw_bin[] = {
0xCE0000F8, 0xC000697E, 0xCE4000F8, 0x9D000000, 0x4158A000, 0xCD4000F8, 0x00000000,
};
static u32 vr9_fw_data[] = {
static const u32 vr9_fw_data[] = {
};

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@ -96,8 +96,8 @@ static inline int vr9_pp32_download_code(int pp32, u32 *code_src, unsigned int c
unsigned int clr, set;
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
clr = pp32 ? 0xF0 : 0x0F;

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@ -1503,17 +1503,10 @@ static inline void clear_priv_data(void)
}
}
if ( g_atm_priv_data.tx_skb_base != NULL )
kfree(g_atm_priv_data.tx_skb_base);
if ( g_atm_priv_data.tx_desc_base != NULL )
kfree(g_atm_priv_data.tx_desc_base);
if ( g_atm_priv_data.oam_buf_base != NULL )
kfree(g_atm_priv_data.oam_buf_base);
if ( g_atm_priv_data.oam_desc_base != NULL )
kfree(g_atm_priv_data.oam_desc_base);
kfree(g_atm_priv_data.tx_skb_base);
kfree(g_atm_priv_data.tx_desc_base);
kfree(g_atm_priv_data.oam_buf_base);
kfree(g_atm_priv_data.oam_desc_base);
if ( g_atm_priv_data.aal_desc_base != NULL ) {
for ( i = 0; i < dma_rx_descriptor_length; i++ ) {
@ -1522,8 +1515,9 @@ static inline void clear_priv_data(void)
dev_kfree_skb_any(skb);
}
}
kfree(g_atm_priv_data.aal_desc_base);
}
kfree(g_atm_priv_data.aal_desc_base);
}
static inline void init_rx_tables(void)

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@ -276,7 +276,7 @@ void ifx_deu_aes (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
aes->IV2R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
aes->IV1R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 2));
aes->IV0R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 3));
};
}
i = 0;
@ -1529,7 +1529,7 @@ static int aes_cbcmac_init_tfm(struct crypto_tfm *tfm)
{
struct aes_ctx *mctx = crypto_tfm_ctx(tfm);
mctx->temp = kzalloc(AES_BLOCK_SIZE * AES_CBCMAC_DBN_TEMP_SIZE, GFP_KERNEL);
if (IS_ERR(mctx->temp)) return PTR_ERR(mctx->temp);
if (!mctx->temp) return -ENOMEM;
return 0;
}

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@ -234,7 +234,7 @@ static int lq_deu_aes_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
aes->IV2R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
aes->IV1R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 2));
aes->IV0R = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 3));
};
}
/* Prepare Rx buf length used in dma psuedo interrupt */
@ -251,7 +251,7 @@ static int lq_deu_aes_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
while (aes->controlr.BUS) {
// wait for AES to be ready
};
}
deu_priv->outcopy = (u32 *) DEU_DWORD_REORDERING(out_arg, aes_buff_out, BUFFER_OUT, nbytes);
deu_priv->event_src = AES_ASYNC_EVENT;
@ -576,10 +576,7 @@ static int lq_aes_queue_mgr(struct aes_ctx *ctx, struct ablkcipher_request *areq
u32 remain, inc, nbytes = areq->nbytes;
u32 chunk_bytes = src->length;
aes_con = (struct aes_container *)kmalloc(sizeof(struct aes_container),
GFP_KERNEL);
aes_con = kmalloc(sizeof(struct aes_container), GFP_KERNEL);
if (!(aes_con)) {
printk("Cannot allocate memory for AES container, fn %s, ln %d\n",
__func__, __LINE__);
@ -959,7 +956,7 @@ struct lq_aes_alg {
};
/* AES supported algo array */
static struct lq_aes_alg aes_drivers_alg[] = {
static const struct lq_aes_alg aes_drivers_alg[] = {
{
.alg = {
.cra_name = "aes",

View File

@ -254,7 +254,7 @@ static int lq_deu_des_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
if (mode > 0) {
des->IVHR = DEU_ENDIAN_SWAP(*(u32 *) iv_arg);
des->IVLR = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
};
}
/* memory alignment issue */
dword_mem_aligned_in = (u32 *) DEU_DWORD_REORDERING(in_arg, des_buff_in, BUFFER_IN, nbytes);
@ -268,7 +268,7 @@ static int lq_deu_des_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
dma->controlr.EN = 1;
while (des->controlr.BUS) {
};
}
wlen = dma_device_write (dma_device, (u8 *) dword_mem_aligned_in, nbytes, NULL);
if (wlen != nbytes) {
@ -287,7 +287,7 @@ static int lq_deu_des_core (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
if (mode > 0) {
*(u32 *) iv_arg = DEU_ENDIAN_SWAP(des->IVHR);
*((u32 *) iv_arg + 1) = DEU_ENDIAN_SWAP(des->IVLR);
};
}
CRTCL_SECT_END;
@ -578,9 +578,7 @@ static int lq_queue_mgr(struct des_ctx *ctx, struct ablkcipher_request *areq,
u32 remain, inc, nbytes = areq->nbytes;
u32 chunk_bytes = src->length;
des_con = (struct des_container *)kmalloc(sizeof(struct des_container),
GFP_KERNEL);
des_con = kmalloc(sizeof(struct des_container), GFP_KERNEL);
if (!(des_con)) {
printk("Cannot allocate memory for AES container, fn %s, ln %d\n",
__func__, __LINE__);
@ -756,7 +754,7 @@ struct lq_des_alg {
};
/* DES Supported algo array */
static struct lq_des_alg des_drivers_alg [] = {
static const struct lq_des_alg des_drivers_alg [] = {
{
.alg = {
.cra_name = "des",

View File

@ -229,7 +229,7 @@ void ifx_deu_des (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
if (mode > 0) {
des->IVHR = DEU_ENDIAN_SWAP(*(u32 *) iv_arg);
des->IVLR = DEU_ENDIAN_SWAP(*((u32 *) iv_arg + 1));
};
}
nblocks = nbytes / 4;
@ -260,7 +260,7 @@ void ifx_deu_des (void *ctx_arg, u8 *out_arg, const u8 *in_arg,
if (mode > 0) {
*(u32 *) iv_arg = DEU_ENDIAN_SWAP(des->IVHR);
*((u32 *) iv_arg + 1) = DEU_ENDIAN_SWAP(des->IVLR);
};
}
CRTCL_SECT_END;
}

View File

@ -87,8 +87,8 @@
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (aes->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (aes->controlr.BUS) {} \
} while (0)
#define WAIT_DES_DMA_READY() \
@ -98,8 +98,8 @@
volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (des->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (des->controlr.BUS) {} \
} while (0)
#define AES_DMA_MISC_CONFIG() \

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@ -81,8 +81,8 @@
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (aes->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (aes->controlr.BUS) {} \
} while (0)
#define WAIT_DES_DMA_READY() \
@ -92,8 +92,8 @@
volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (des->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (des->controlr.BUS) {} \
} while (0)
#define SHA_HASH_INIT \

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@ -102,8 +102,8 @@
volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (aes->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (aes->controlr.BUS) {} \
} while (0)
#define WAIT_DES_DMA_READY() \
@ -113,8 +113,8 @@
volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
for (i = 0; i < 10; i++) \
udelay(DELAY_PERIOD); \
while (dma->controlr.BSY) {}; \
while (des->controlr.BUS) {}; \
while (dma->controlr.BSY) {} \
while (des->controlr.BUS) {} \
} while (0)
#define AES_DMA_MISC_CONFIG() \

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@ -107,7 +107,7 @@ static void md5_transform(struct md5_ctx *mctx, u32 *hash, u32 const *in)
for (i = 0; i < 16; i++) {
hashs->MR = in[i];
// printk("in[%d]: %08x\n", i, in[i]);
};
}
//wait for processing
while (hashs->controlr.BSY) {

View File

@ -308,7 +308,7 @@ static int md5_hmac_final_impl(struct shash_desc *desc, u8 *out, bool hash_final
{
for (i = 0; i < 16; i++) {
hashs->MR = in[i];
};
}
hashs->controlr.GO = 1;
asm("sync");
@ -355,9 +355,9 @@ static int md5_hmac_init_tfm(struct crypto_tfm *tfm)
{
struct md5_hmac_ctx *mctx = crypto_tfm_ctx(tfm);
mctx->temp = kzalloc(4 * MD5_HMAC_DBN_TEMP_SIZE, GFP_KERNEL);
if (IS_ERR(mctx->temp)) return PTR_ERR(mctx->temp);
if (!mctx->temp) return -ENOMEM;
mctx->desc = kzalloc(sizeof(struct shash_desc), GFP_KERNEL);
if (IS_ERR(mctx->desc)) return PTR_ERR(mctx->desc);
if (!mctx->desc) return -ENOMEM;
return 0;
}

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@ -119,7 +119,7 @@ static void sha1_transform1 (struct sha1_ctx *sctx, u32 *state, const u32 *in)
for (i = 0; i < 16; i++) {
hashs->MR = in[i];
};
}
//wait for processing
while (hashs->controlr.BSY) {

View File

@ -325,7 +325,7 @@ static int sha1_hmac_final_impl(struct shash_desc *desc, u8 *out, bool hash_fina
{
for (i = 0; i < 16; i++) {
hashs->MR = in[i];
};
}
hashs->controlr.GO = 1;
asm("sync");
@ -376,9 +376,9 @@ static int sha1_hmac_init_tfm(struct crypto_tfm *tfm)
{
struct sha1_hmac_ctx *sctx = crypto_tfm_ctx(tfm);
sctx->temp = kzalloc(4 * SHA1_HMAC_DBN_TEMP_SIZE, GFP_KERNEL);
if (IS_ERR(sctx->temp)) return PTR_ERR(sctx->temp);
if (!sctx->temp) return -ENOMEM;
sctx->desc = kzalloc(sizeof(struct shash_desc), GFP_KERNEL);
if (IS_ERR(sctx->desc)) return PTR_ERR(sctx->desc);
if (!sctx->desc) return -ENOMEM;
return 0;
}

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@ -38,7 +38,7 @@ static int alg_speed_test(const char *alg, const char *driver,
struct cipher_speed_template *t,
unsigned int tcount, u8 *keysize);
static struct cipher_speed_template des3_speed_template[] = {
static const struct cipher_speed_template des3_speed_template[] = {
{
.key = "\x01\x23\x45\x67\x89\xab\xcd\xef"
"\x55\x55\x55\x55\x55\x55\x55\x55"
@ -50,18 +50,18 @@ static struct cipher_speed_template des3_speed_template[] = {
/*
* Cipher speed tests
*/
static u8 speed_template_8[] = {8, 0};
static u8 speed_template_24[] = {24, 0};
static u8 speed_template_8_32[] = {8, 32, 0};
static u8 speed_template_16_32[] = {16, 32, 0};
static u8 speed_template_16_24_32[] = {16, 24, 32, 0};
static u8 speed_template_32_40_48[] = {32, 40, 48, 0};
static u8 speed_template_32_48_64[] = {32, 48, 64, 0};
static const u8 speed_template_8[] = {8, 0};
static const u8 speed_template_24[] = {24, 0};
static const u8 speed_template_8_32[] = {8, 32, 0};
static const u8 speed_template_16_32[] = {16, 32, 0};
static const u8 speed_template_16_24_32[] = {16, 24, 32, 0};
static const u8 speed_template_32_40_48[] = {32, 40, 48, 0};
static const u8 speed_template_32_48_64[] = {32, 48, 64, 0};
/*
* Digest speed tests
*/
static struct hash_speed generic_hash_speed_template[] = {
static const struct hash_speed generic_hash_speed_template[] = {
{ .blen = 16, .plen = 16, },
{ .blen = 64, .plen = 16, },
{ .blen = 64, .plen = 64, },

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@ -1360,14 +1360,9 @@ static INLINE void clear_priv_data(void)
}
}
if ( g_ptm_priv_data.rx_desc_base != NULL )
kfree(g_ptm_priv_data.rx_desc_base);
if ( g_ptm_priv_data.tx_desc_base != NULL )
kfree(g_ptm_priv_data.tx_desc_base);
if ( g_ptm_priv_data.tx_skb_base != NULL )
kfree(g_ptm_priv_data.tx_skb_base);
kfree(g_ptm_priv_data.rx_desc_base);
kfree(g_ptm_priv_data.tx_desc_base);
kfree(g_ptm_priv_data.tx_skb_base);
}
static INLINE void init_tables(void)

View File

@ -223,8 +223,8 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len,
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

View File

@ -246,8 +246,8 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len,
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

View File

@ -218,8 +218,8 @@ static inline int pp32_download_code(u32 *code_src, unsigned int code_dword_len,
{
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
if ( code_dword_len <= CDM_CODE_MEMORYn_DWLEN(0) )

View File

@ -32,7 +32,7 @@
#define PTM_FW_VER_MINOR 17
static unsigned int firmware_binary_code[] = {
static const unsigned int firmware_binary_code[] = {
0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000,
0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x800055e0, 0xc2000000, 0xda0800f9, 0x80005580,
@ -486,7 +486,7 @@ static unsigned int firmware_binary_code[] = {
0xcd4000f8, 0x00000000, 0x00000000,
};
static unsigned int firmware_binary_data[] = {
static const unsigned int firmware_binary_data[] = {
};

View File

@ -30,7 +30,7 @@
#define PTM_FW_VER_MINOR 17
static unsigned int firmware_binary_code[] = {
static const unsigned int firmware_binary_code[] = {
0x800004b8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000,
0xc1000002, 0xd90c00f8, 0xc2000002, 0xda0800f9, 0x80005270, 0xc2000000, 0xda0800f9, 0x80005210,
@ -466,7 +466,7 @@ static unsigned int firmware_binary_code[] = {
0x4194a000, 0x5d940040, 0x88000012, 0xc59400f8, 0x9d000000, 0xcd4000f8, 0x00000000, 0x00000000,
};
static unsigned int firmware_binary_data[] = {
static const unsigned int firmware_binary_data[] = {
};

View File

@ -31,7 +31,7 @@
#define PTM_FW_VER_MINOR 17
static unsigned int firmware_binary_code[] = {
static const unsigned int firmware_binary_code[] = {
0x800004a0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffc8, 0x00000000, 0x00000000, 0x00000000,
0xc1000002, 0xd90c0000, 0xc2000002, 0xda080001, 0x80005618, 0xc2000000, 0xda080001, 0x800055b8,
@ -482,7 +482,7 @@ static unsigned int firmware_binary_code[] = {
0x4194a000, 0x5d940040, 0x8800fffa, 0xc5940000, 0x9d000000, 0xcd400000, 0x00000000, 0x00000000,
};
static unsigned int firmware_binary_data[] = {
static const unsigned int firmware_binary_data[] = {
};

View File

@ -28,7 +28,7 @@
** 01/08/2014 Lantiq PPE FW Team VR9 E1 PPE Firmware Binary
*******************************************************************************/
static unsigned int firmware_binary_code[] = {
static const unsigned int firmware_binary_code[] = {
0x80000980, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8000ffe0, 0x00000000, 0x00000000, 0x00000000,
0x94000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
@ -471,7 +471,7 @@ static unsigned int firmware_binary_code[] = {
0x84009b42, 0x6f9d0010, 0x739da000, 0x6f9e0010, 0x735da000, 0x6f9f0010, 0x735da000, 0xc1c0001e,
0x775da000, 0xc000e440, 0xcf4000f8, 0x80009ae8, 0x00000000, 0x00000000, 0x00000000,};
static unsigned int firmware_binary_data[] = {
static const unsigned int firmware_binary_data[] = {
};

View File

@ -207,8 +207,8 @@ static inline int pp32_download_code(int pp32, u32 *code_src, unsigned int code_
unsigned int clr, set;
volatile u32 *dest;
if ( code_src == 0 || ((unsigned long)code_src & 0x03) != 0
|| data_src == 0 || ((unsigned long)data_src & 0x03) != 0 )
if (!code_src || ((unsigned long)code_src & 0x03) != 0
|| !data_src || ((unsigned long)data_src & 0x03) != 0 )
return -1;
clr = pp32 ? 0xF0 : 0x0F;

View File

@ -174,13 +174,13 @@ static int i2c_outb(int c)
if (sclhi() < 0) { /* timed out */
sdahi(); /* we don't want to block the net */
return -ETIMEDOUT;
};
}
scllo();
}
sdahi();
if (sclhi() < 0) {
return -ETIMEDOUT;
};
}
/* read ack: SDA should be pulled down by slave */
ack = getsda() == 0; /* ack: sda is pulled low ->success. */
scllo();
@ -204,7 +204,7 @@ static int i2c_inb(int ack)
for (i = 0; i < 8; i++) {
if (sclhi() < 0) {
return -ETIMEDOUT;
};
}
indata *= 2;
if (getsda())
indata |= 0x01;

View File

@ -273,7 +273,7 @@ static int number(int num, int base, int size,
putc(tmp[i]);
while (size-- > 0)
putc(' ');;
putc(' ');
return 1;
}

View File

@ -166,7 +166,7 @@ int read_dataflash(unsigned long addr, unsigned long size, char *result)
AT91PS_DataFlash pFlash = &DataFlashInst;
pFlash = AT91F_DataflashSelect (pFlash, &AddrToRead);
if (pFlash == 0)
if (!pFlash)
return -1;
return (AT91F_DataFlashRead(pFlash, AddrToRead, size, result));

View File

@ -11,6 +11,7 @@
compatible = "sitecom,wlr-7100", "qca,ar9344";
aliases {
label-mac-device = &eth0;
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
@ -47,12 +48,6 @@
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan2g {
label = "blue:wlan2g";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
};
@ -64,6 +59,9 @@
phy-mode = "rgmii";
phy-handle = <&phy0>;
nvmem-cells = <&macaddr_uboot_ethaddr 0>;
nvmem-cell-names = "mac-address";
gmac-config {
device = <&gmac>;
rgmii-gmac0 = <1>;
@ -95,8 +93,8 @@
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_5000>;
nvmem-cell-names = "calibration";
nvmem-cells = <&cal_art_5000>, <&macaddr_uboot_ethaddr 1>;
nvmem-cell-names = "calibration", "mac-address";
};
};
@ -127,6 +125,14 @@
label = "u-boot-env";
reg = <0x030000 0x010000>;
read-only;
nvmem-layout {
compatible = "u-boot,env";
macaddr_uboot_ethaddr: ethaddr {
#nvmem-cell-cells = <1>;
};
};
};
partition@40000 {
@ -157,6 +163,10 @@
#address-cells = <1>;
#size-cells = <1>;
cal_art_1000: calibration@1000 {
reg = <0x1000 0x440>;
};
cal_art_5000: calibration@5000 {
reg = <0x5000 0x844>;
};
@ -177,5 +187,11 @@
&wmac {
status = "okay";
qca,no-eeprom;
nvmem-cells = <&cal_art_1000>, <&macaddr_uboot_ethaddr 0>;
nvmem-cell-names = "calibration", "mac-address";
led {
led-sources = <14>;
led-active-low;
};
};

View File

@ -82,8 +82,8 @@
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&cal_art_5000>;
nvmem-cell-names = "calibration";
nvmem-cells = <&cal_art_5000>, <&macaddr_uboot_e9 1>;
nvmem-cell-names = "calibration", "mac-address";
};
};
@ -109,6 +109,18 @@
ubootenv: partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_uboot_e9: macaddr@e9 {
compatible = "mac-base";
reg = <0xe9 0x11>;
#nvmem-cell-cells = <1>;
};
};
};
partition@50000 {
@ -144,6 +156,14 @@
status = "okay";
phy-handle = <&swphy4>;
nvmem-cells = <&macaddr_uboot_e9 0>;
nvmem-cell-names = "mac-address";
};
&eth1 {
nvmem-cells = <&macaddr_uboot_e9 1>;
nvmem-cell-names = "mac-address";
};
&wmac {

View File

@ -11,6 +11,7 @@
compatible = "sitecom,wlr-8100", "qca,qca9558";
aliases {
label-mac-device = &eth0;
led-boot = &led_status_amber;
led-failsafe = &led_status_amber;
led-running = &led_status_amber;
@ -48,12 +49,6 @@
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
};
wifi2g {
label = "blue:wifi2g";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wifi5g {
label = "blue:wifi5g";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
@ -85,6 +80,14 @@
label = "u-boot-env";
reg = <0x030000 0x010000>;
read-only;
nvmem-layout {
compatible = "u-boot,env";
macaddr_uboot_ethaddr: ethaddr {
#nvmem-cell-cells = <1>;
};
};
};
partition@40000 {
@ -121,6 +124,10 @@
#address-cells = <1>;
#size-cells = <1>;
cal_art_1000: calibration@1000 {
reg = <0x1000 0x440>;
};
cal_art_5000: calibration@5000 {
reg = <0x5000 0x844>;
};
@ -140,8 +147,8 @@
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0 0 0 0 0>;
nvmem-cells = <&cal_art_5000>;
nvmem-cell-names = "calibration";
nvmem-cells = <&cal_art_5000>, <&macaddr_uboot_ethaddr 1>;
nvmem-cell-names = "calibration", "mac-address";
};
};
@ -175,6 +182,9 @@
phy-handle = <&phy0>;
pll-data = <0xa6000000 0x00000101 0x00001616>;
nvmem-cells = <&macaddr_uboot_ethaddr 0>;
nvmem-cell-names = "mac-address";
gmac-config {
device = <&gmac>;
rgmii-enabled = <1>;
@ -183,5 +193,12 @@
&wmac {
status = "okay";
qca,no-eeprom;
nvmem-cells = <&cal_art_1000>, <&macaddr_uboot_ethaddr 0>;
nvmem-cell-names = "calibration", "mac-address";
led {
led-sources = <19>;
led-active-low;
};
};

View File

@ -8,6 +8,7 @@
/ {
aliases {
label-mac-device = &eth0;
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
@ -35,12 +36,6 @@
default-state = "on";
};
wifi2g {
label = "blue:wifi2g";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wifi5g {
label = "blue:wifi5g";
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
@ -71,6 +66,14 @@
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
nvmem-layout {
compatible = "u-boot,env";
macaddr_uboot_ethaddr: ethaddr {
#nvmem-cell-cells = <1>;
};
};
};
partition@50000 {
@ -95,6 +98,10 @@
#address-cells = <1>;
#size-cells = <1>;
cal_art_1000: calibration@1000 {
reg = <0x1000 0x440>;
};
cal_art_5000: calibration@5000 {
reg = <0x5000 0x844>;
};
@ -120,6 +127,9 @@
phy-handle = <&phy5>;
phy-mode = "rgmii-id";
nvmem-cells = <&macaddr_uboot_ethaddr 0>;
nvmem-cell-names = "mac-address";
pll-data = <0x82000000 0x80000101 0x80001313>;
gmac-config {
@ -142,5 +152,11 @@
&wmac {
status = "okay";
qca,no-eeprom;
nvmem-cells = <&cal_art_1000>;
nvmem-cell-names = "calibration";
led {
led-sources = <13>;
led-active-low;
};
};

View File

@ -1379,10 +1379,8 @@ static int ar934x_nfc_probe(struct platform_device *pdev)
}
nfc->irq = platform_get_irq(pdev, 0);
if (nfc->irq < 0) {
dev_err(&pdev->dev, "no IRQ resource specified\n");
if (nfc->irq < 0)
return -EINVAL;
}
init_waitqueue_head(&nfc->irq_waitq);
ret = devm_request_irq(&pdev->dev, nfc->irq, ar934x_nfc_irq_handler,

View File

@ -723,9 +723,7 @@ ath79_setup_macs()
;;
elecom,wab-i1750-ps|\
elecom,wab-s1167-ps|\
elecom,wab-s600-ps|\
engenius,ecb1200|\
engenius,ecb1750)
elecom,wab-s600-ps)
lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
label_mac=$lan_mac
;;
@ -740,12 +738,6 @@ ath79_setup_macs()
engenius,esr900)
wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
;;
engenius,ews511ap)
lan_mac=$(mtd_get_mac_text "u-boot-env" 0xe9)
eth1_mac=$(macaddr_add "$lan_mac" 1)
ucidef_set_interface "eth0" ifname "eth0" protocol "none" macaddr "$lan_mac"
ucidef_set_interface "eth1" ifname "eth1" protocol "none" macaddr "$eth1_mac"
;;
hak5,lan-turtle|\
hak5,packet-squirrel)
label_mac=$(mtd_get_mac_binary u-boot 0x1fc00)
@ -817,9 +809,7 @@ ath79_setup_macs()
;;
sitecom,wlr-7100|\
sitecom,wlr-8100)
lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
label_mac=$lan_mac
;;
tplink,archer-a7-v5|\
tplink,archer-a9-v6|\

View File

@ -15,16 +15,6 @@ case "$FIRMWARE" in
avm,fritzdvbc)
caldata_extract_reverse "urlader" 0x1541 0x440
;;
engenius,ecb1200|\
engenius,ecb1750)
caldata_extract "art" 0x1000 0x440
ath9k_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env athaddr) 1)
;;
sitecom,wlr-7100|\
sitecom,wlr-8100)
caldata_extract "art" 0x1000 0x440
ath9k_patch_mac $(mtd_get_mac_ascii u-boot-env ethaddr)
;;
moxa,awk-1137c)
caldata_extract "art" 0x1000 0x440
ath9k_patch_mac $(mtd_get_mac_ascii u-boot-env mac_addr)

View File

@ -49,12 +49,7 @@ case "$board" in
;;
engenius,ecb1200|\
engenius,ecb1750)
[ "$PHYNBR" -eq 0 ] && \
mtd_get_mac_ascii u-boot-env athaddr > /sys${DEVPATH}/macaddress
;;
engenius,ews511ap)
[ "$PHYNBR" -eq 0 ] && \
macaddr_add $(cat /sys/class/net/eth0/address) 1 > /sys${DEVPATH}/macaddress
macaddr_add "$(mtd_get_mac_ascii u-boot-env athaddr)" ${PHYNBR} > /sys${DEVPATH}/macaddress
;;
enterasys,ws-ap3705i)
[ "$PHYNBR" -eq 0 ] && \
@ -85,11 +80,6 @@ case "$board" in
# which would allow to patch the macaddress
macaddr_add "$(mtd_get_mac_ascii u-boot-env ethaddr)" $PHYNBR > /sys${DEVPATH}/macaddress
;;
sitecom,wlr-7100|\
sitecom,wlr-8100)
[ "$PHYNBR" -eq 0 ] && \
macaddr_add "$(mtd_get_mac_ascii u-boot-env ethaddr)" 1 > /sys${DEVPATH}/macaddress
;;
dlink,dir-842-c1|\
dlink,dir-842-c2|\
dlink,dir-842-c3|\

View File

@ -185,7 +185,6 @@ int RangeDecoderReverseBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder
{
int mi = 1;
int i;
int symbol = 0;
#ifdef _LZMA_LOC_OPT
RC_INIT_VAR
#endif
@ -203,7 +202,7 @@ int RangeDecoderReverseBitTreeDecode(CProb *probs, int numLevels, CRangeDecoder
#ifdef _LZMA_LOC_OPT
RC_FLUSH_VAR
#endif
return symbol;
return 0;
}
Byte LzmaLiteralDecode(CProb *probs, CRangeDecoder *rd)

View File

@ -21,7 +21,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
clocks {
--- a/drivers/bcma/main.c
+++ b/drivers/bcma/main.c
@@ -331,14 +331,6 @@ static int bcma_register_devices(struct
@@ -337,14 +337,6 @@ static int bcma_register_devices(struct
}
#endif
@ -36,7 +36,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
#ifdef CONFIG_BCMA_NFLASH
if (bus->drv_cc.nflash.present) {
err = platform_device_register(&bcma_nflash_dev);
@@ -418,6 +410,14 @@ int bcma_bus_register(struct bcma_bus *b
@@ -424,6 +416,14 @@ int bcma_bus_register(struct bcma_bus *b
bcma_register_core(bus, core);
}

View File

@ -385,8 +385,7 @@ void mtk_bmt_detach(struct mtd_info *mtd)
if (bmtd.mtd != mtd)
return;
if (bmtd.debugfs_dir)
debugfs_remove_recursive(bmtd.debugfs_dir);
debugfs_remove_recursive(bmtd.debugfs_dir);
bmtd.debugfs_dir = NULL;
kfree(bmtd.bbt_buf);

View File

@ -810,7 +810,7 @@ static bool nmbm_write_signature(struct nmbm_instance *ni, uint32_t limit,
next_block:
ba--;
};
}
return false;
}
@ -2069,7 +2069,7 @@ static bool nmbm_find_signature(struct nmbm_instance *ni,
return true;
}
}
};
}
return false;
}

View File

@ -551,9 +551,11 @@ static int b53_configure_ports_of(struct b53_device *dev)
mode == PHY_INTERFACE_MODE_REVMII) {
b53_read8(dev, B53_CTRL_PAGE,
B53_PORT_OVERRIDE_CTRL, &po);
if (!(po & PORT_OVERRIDE_RV_MII_25))
pr_err("Failed to enable reverse MII mode\n");
return -EINVAL;
if (!(po & PORT_OVERRIDE_RV_MII_25)) {
pr_err("Failed to enable reverse MII mode\n");
of_node_put(dn);
return -EINVAL;
}
}
} else {
po |= GMII_PO_EN;
@ -845,7 +847,7 @@ static int b53_vlan_set_ports(struct switch_dev *dev, struct switch_val *val)
if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED))) {
vlan->untag |= BIT(port->id);
priv->ports[port->id].pvid = val->port_vlan;
};
}
}
/* ignore disabled ports */

View File

@ -1594,8 +1594,7 @@ static int rtl8367b_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, NULL);
rtl8366_smi_cleanup(smi);
err_free_smi:
if (smi->emu_vlanmc)
kfree(smi->emu_vlanmc);
kfree(smi->emu_vlanmc);
kfree(smi);
return err;
}

View File

@ -549,7 +549,7 @@ static int hc_wlan_data_unpack_lzor_lz77(const u16 tag_id, const u8 *inbuf, size
ret = -ENODATA;
goto fail;
}
};
}
templen -= (u8 *)needle - tempbuf;
/* Past magic. Look for tag node */

View File

@ -51,7 +51,7 @@ Subject: [PATCH] ssb_sprom: add generic kernel support for Broadcom Fallback SP
dev_err((bus)->dev, "bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
--- a/drivers/bcma/main.c
+++ b/drivers/bcma/main.c
@@ -671,6 +671,14 @@ static int __init bcma_modinit(void)
@@ -677,6 +677,14 @@ static int __init bcma_modinit(void)
{
int err;

View File

@ -1,2 +1,2 @@
LINUX_VERSION-6.12 = .59
LINUX_KERNEL_HASH-6.12.59 = a1d2cd7327f10eec022615c1bb12c06439bd110d2020164be97f698f43ca58be
LINUX_VERSION-6.12 = .60
LINUX_KERNEL_HASH-6.12.60 = a63096b2147411d683cecbf87622bb2ff4885bac2b3641d3d4f10250c89cdcf8

View File

@ -0,0 +1,169 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include "mt7981b.dtsi"
/ {
compatible = "widelantech,wap430x", "mediatek,mt7981b";
model = "Widelantech WAP430X";
aliases {
label-mac-device = &gmac1;
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
btn-0 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_system: led-0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
};
led-1 {
function = LED_FUNCTION_WLAN;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x10000000>;
};
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_24>;
};
};
&pio {
spi2_flash_pins: spi2-pins {
mux {
function = "spi";
groups = "spi2", "spi2_wp_hold";
};
};
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_flash_pins>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x00000 0x40000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "Factory";
reg = <0x50000 0xb0000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory: eeprom@0 {
reg = <0x0 0x1000>;
};
// LAN MAC address
macaddr_factory_24: macaddr@24 {
reg = <0x24 0x6>;
};
// WAN MAC address (not used)
/* macaddr@2a {
reg = <0x2a 0x6>;
}; */
};
};
partition@100000 {
label = "FIP";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x180000 0xe70000>;
};
partition@ff0000 {
label = "opt";
reg = <0xff0000 0x10000>;
read-only;
};
};
};
};
&uart0 {
status = "okay";
};
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory 0>;
nvmem-cell-names = "eeprom";
};

View File

@ -215,7 +215,7 @@ rtk_api_ret_t rtk_i2c_data_read(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr, r
{
rtk_uint32 retVal, counter=0;
rtk_uint8 controlByte_W, controlByte_R;
rtk_uint8 slaveRegAddr_L, slaveRegAddr_H = 0x0, temp;
rtk_uint8 slaveRegAddr_L, slaveRegAddr_H = 0x0;
rtk_uint8 regData_L, regData_H;
/* control byte :deviceAddress + W, deviceAddress + R */
@ -226,11 +226,7 @@ rtk_api_ret_t rtk_i2c_data_read(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr, r
slaveRegAddr_H = (rtk_uint8) (slaveRegAddr >>8) ;
if( rtk_i2c_mode == I2C_70B_LSB_16BIT_MODE)
{
temp = slaveRegAddr_L ;
slaveRegAddr_L = slaveRegAddr_H;
slaveRegAddr_H = temp;
}
swap(slaveRegAddr_L, slaveRegAddr_H);
/*check bus state: idle*/
@ -339,7 +335,7 @@ rtk_api_ret_t rtk_i2c_data_write(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr,
{
rtk_uint32 retVal,counter;
rtk_uint8 controlByte_W;
rtk_uint8 slaveRegAddr_L, slaveRegAddr_H = 0x0, temp;
rtk_uint8 slaveRegAddr_L, slaveRegAddr_H = 0x0;
rtk_uint8 regData_L, regData_H;
/* control byte :deviceAddress + W */
@ -352,11 +348,7 @@ rtk_api_ret_t rtk_i2c_data_write(rtk_uint8 deviceAddr, rtk_uint32 slaveRegAddr,
regData_L = (rtk_uint8) (regData & 0x00FF);
if( rtk_i2c_mode == I2C_70B_LSB_16BIT_MODE)
{
temp = slaveRegAddr_L ;
slaveRegAddr_L = slaveRegAddr_H;
slaveRegAddr_H = temp;
}
swap(slaveRegAddr_L, slaveRegAddr_H);
/*check bus state: idle*/

View File

@ -233,7 +233,7 @@ ret_t rtl8367c_setAsicPriorityDecision(rtk_uint32 index, rtk_uint32 prisrc, rtk_
break;
default:
break;
};
}
return RT_ERR_OK;
@ -278,7 +278,7 @@ ret_t rtl8367c_getAsicPriorityDecision(rtk_uint32 index, rtk_uint32 prisrc, rtk_
break;
default:
break;
};
}
return RT_ERR_OK;

View File

@ -117,6 +117,7 @@ mediatek_setup_interfaces()
openfi,6c|\
ubnt,unifi-6-plus|\
wavlink,wl-wn573hx3|\
widelantech,wap430x|\
zyxel,nwa50ax-pro)
ucidef_set_interface_lan "eth0"
;;

View File

@ -163,9 +163,10 @@ platform_do_upgrade() {
;;
cudy,re3000-v1|\
cudy,wr3000-v1|\
yuncore,ax835|\
totolink,x6000r|\
wavlink,wl-wn573hx3|\
totolink,x6000r)
widelantech,wap430x|\
yuncore,ax835)
default_do_upgrade "$1"
;;
dlink,aquila-pro-ai-m30-a1|\

View File

@ -2814,6 +2814,21 @@ define Device/wavlink_wl-wn573hx3
endef
TARGET_DEVICES += wavlink_wl-wn573hx3
define Device/widelantech_wap430x
DEVICE_VENDOR := Widelantech
DEVICE_MODEL := WAP430X
DEVICE_ALT1_VENDOR := Widelantech
DEVICE_ALT1_MODEL := AX3000AM
DEVICE_ALT1_VENDOR := UeeVii
DEVICE_ALT1_MODEL := UAP200
DEVICE_DTS := mt7981b-widelantech-wap430x
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
IMAGE_SIZE := 14784k
SUPPORTED_DEVICES += UAP200 AX3000AM # allow upgrade via GECOOS UART menu
endef
TARGET_DEVICES += widelantech_wap430x
define Device/xiaomi_mi-router-ax3000t
DEVICE_VENDOR := Xiaomi
DEVICE_MODEL := Mi Router AX3000T

View File

@ -820,7 +820,7 @@ Cc: Robert Marko <robert.marko@sartura.hr>
+static IEI_WT61P803_PUZZLE_ATTR_RW(power_loss_recovery, IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY, 0);
+static IEI_WT61P803_PUZZLE_ATTR_RO(power_status, IEI_WT61P803_PUZZLE_POWER_STATUS, 0);
+
+static struct attribute *iei_wt61p803_puzzle_attrs[] = {
+static const struct attribute *iei_wt61p803_puzzle_attrs[] = {
+ &dev_attr_version.dev_attr.attr,
+ &dev_attr_build_info.dev_attr.attr,
+ &dev_attr_bootloader_mode.dev_attr.attr,

View File

@ -1458,7 +1458,7 @@ MODULE_DEVICE_TABLE(of, ralink_esw_match);
int rt3050_esw_init(struct fe_priv *priv)
{
struct device_node *np = priv->switch_np;
struct platform_device *pdev = of_find_device_by_node(np);
struct platform_device *pdev;
struct switch_dev *swdev;
struct rt305x_esw *esw;
const __be32 *rgmii;
@ -1470,9 +1470,12 @@ int rt3050_esw_init(struct fe_priv *priv)
if (!of_device_is_compatible(np, ralink_esw_match->compatible))
return -EINVAL;
pdev = of_find_device_by_node(np);
esw = platform_get_drvdata(pdev);
if (!esw)
if (!esw) {
put_device(&pdev->dev);
return -EPROBE_DEFER;
}
priv->soc->swpriv = esw;
esw->priv = priv;
@ -1488,6 +1491,7 @@ int rt3050_esw_init(struct fe_priv *priv)
dev_err(&pdev->dev, "RGMII mode, not exporting switch device.\n");
unregister_switch(&esw->swdev);
platform_set_drvdata(pdev, NULL);
put_device(&pdev->dev);
return -ENODEV;
}

View File

@ -206,18 +206,19 @@ int mtk_gsw_init(struct fe_priv *priv)
struct device_node *eth_node = priv->dev->of_node;
struct device_node *phy_node, *mdiobus_node;
struct device_node *np = priv->switch_np;
struct platform_device *pdev = of_find_device_by_node(np);
struct platform_device *pdev;
struct mt7620_gsw *gsw;
const __be32 *id;
int ret;
u8 val;
if (!pdev)
return -ENODEV;
if (!of_device_is_compatible(np, mediatek_gsw_match->compatible))
return -EINVAL;
pdev = of_find_device_by_node(np);
if (!pdev)
return -ENODEV;
gsw = platform_get_drvdata(pdev);
priv->soc->swpriv = gsw;
@ -249,12 +250,14 @@ int mtk_gsw_init(struct fe_priv *priv)
ret = devm_request_irq(&pdev->dev, gsw->irq, gsw_interrupt_mt7620, 0,
"gsw", priv);
if (ret) {
put_device(&pdev->dev);
dev_err(&pdev->dev, "Failed to request irq");
return ret;
}
mtk_switch_w32(gsw, ~PORT_IRQ_ST_CHG, GSW_REG_IMR);
}
put_device(&pdev->dev);
return 0;
}

View File

@ -268,6 +268,6 @@ void fe_mdio_cleanup(struct fe_priv *priv)
return;
mdiobus_unregister(priv->mii_bus);
of_node_put(priv->mii_bus->dev.of_node);
put_device(&priv->mii_bus->dev);
kfree(priv->mii_bus);
}

View File

@ -1555,10 +1555,8 @@ static int fe_probe(struct platform_device *pdev)
netdev->base_addr = (unsigned long)fe_base;
netdev->irq = platform_get_irq(pdev, 0);
if (netdev->irq < 0) {
dev_err(&pdev->dev, "no IRQ resource found\n");
if (netdev->irq < 0)
return -ENXIO;
}
priv = netdev_priv(netdev);
spin_lock_init(&priv->page_lock);

View File

@ -492,7 +492,7 @@ static int rtcl_ccu_create(struct device_node *np)
return -ENXIO;
rtcl_ccu = kzalloc(sizeof(*rtcl_ccu), GFP_KERNEL);
if (IS_ERR(rtcl_ccu))
if (!rtcl_ccu)
return -ENOMEM;
rtcl_ccu->np = np;
@ -657,6 +657,7 @@ static int rtcl_init_sram(void)
rtcl_ccu->sram.pmark = (int *)((void *)sram_pbase + (dram_size - 4));
rtcl_ccu->sram.vbase = sram_vbase;
put_device(&pdev->dev);
return 0;
err_put_device:

View File

@ -356,6 +356,7 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
sprintf(led_set_str, "led_set%d", led_set);
priv->ports[pn].leds_on_this_port = of_property_count_u32_elems(led_node, led_set_str);
if (priv->ports[pn].leds_on_this_port > 4) {
of_node_put(dn);
dev_err(priv->dev, "led_set %d for port %d configuration is invalid\n", led_set, pn);
return -ENODEV;
}

View File

@ -208,9 +208,13 @@ static int rtldsa_930x_port_rate_police_add(struct dsa_switch *ds, int port,
if (ingress) {
burst = min_t(u32, act->police.burst, RTL930X_BANDWIDTH_CTRL_INGRESS_BURST_MAX);
/* set burst high on/off the same to avoid TCP oscillation */
/* the linux kernel only provides a single burst value. But the
* realtek HW needs two. And to get flow control correctly
* working, the realtek default ratio of 1:2 seems to work
* reasonable well
*/
sw_w32(burst, RTL930X_BANDWIDTH_CTRL_INGRESS_BURST_HIGH_ON(port));
sw_w32(burst, RTL930X_BANDWIDTH_CTRL_INGRESS_BURST_HIGH_OFF(port));
sw_w32(burst / 2, RTL930X_BANDWIDTH_CTRL_INGRESS_BURST_HIGH_OFF(port));
/* Enable ingress bandwidth flow control to improve TCP throughput and avoid
* the drops behavior of the RTL930x ingress rate limiter which seem to not

View File

@ -1753,10 +1753,8 @@ static int __init rtl838x_eth_probe(struct platform_device *pdev)
/* Obtain device IRQ number */
dev->irq = platform_get_irq(pdev, 0);
if (dev->irq < 0) {
dev_err(&pdev->dev, "cannot obtain network-device IRQ\n");
return err;
}
if (dev->irq < 0)
return -ENODEV;
err = devm_request_irq(&pdev->dev, dev->irq, priv->r->net_irq,
IRQF_SHARED, dev->name, dev);

View File

@ -63,7 +63,7 @@ Sighed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -753,7 +753,7 @@ config XO1_RFKILL
@@ -754,7 +754,7 @@ config XO1_RFKILL
laptop.
config PCENGINES_APU2
@ -72,7 +72,7 @@ Sighed-off-by: Philip Prindeville <philipp@redfish-solutions.com>
depends on INPUT && INPUT_KEYBOARD && GPIOLIB
depends on LEDS_CLASS
select GPIO_AMD_FCH
@@ -761,7 +761,7 @@ config PCENGINES_APU2
@@ -762,7 +762,7 @@ config PCENGINES_APU2
select LEDS_GPIO
help
This driver provides support for the front button and LEDs on