Daniel Golle ecc9d0195b mediatek: mt7988: fix clk for 2nd PCIe port ... Due to what seems to be an undocumented oddity in MediaTek's MT7988 SoC design the CLK_INFRA_PCIE_PERI_26M_CK_P2 clock requires CLK_INFRA_PCIE_PERI_26M_CK_P3 to be enabled. This currently leads to PCIe port 2 not working in Linux. Reflect the apparent relationship in the clk driver to make sure PCIe port 2 of the MT7988 SoC works. Signed-off-by: Daniel Golle <daniel@makrotopia.org>		2024-03-11 19:14:14 +00:00
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base-files	mediatek: filogic: fix failsafe mode on devices with no lan1	2024-03-02 14:08:08 +01:00
dts	mediatek: mt7622: linksys-e8450: set driving strength for SPI-NAND	2024-03-11 19:14:14 +00:00
files	mediatek: mt7622: rtl8367c: add casts to fix compiler warnings	2024-03-01 01:42:36 +00:00
files-6.1	mediatek: wait for fitblk rootfs	2024-03-09 14:02:58 +00:00
filogic	mediatek: filogic: switch to fitblk for Xiaomi Redmi AX6000	2024-03-08 15:28:30 +08:00
image	mediatek: linksys-e8450: improve compat warning	2024-03-09 14:02:58 +00:00
mt7622	mediatek: include 'fitblk' package for subtargets	2024-02-26 02:13:08 +00:00
mt7623	mediatek: include 'fitblk' package for subtargets	2024-02-26 02:13:08 +00:00
mt7629	mediatek: switch to Linux version 6.1	2024-02-15 19:06:36 +00:00
patches-6.1	mediatek: mt7988: fix clk for 2nd PCIe port	2024-03-11 19:14:14 +00:00
Makefile	mediatek: switch to Linux version 6.1	2024-02-15 19:06:36 +00:00
modules.mk