openwrt-6.x/target/linux/mediatek/dts/mt7987a-bananapi-bpi-r4-lite.dts
Chukun Pan 295601b0d4 mediatek: mt7987: enable usb 3.0 by default
There is no reason to limit USB to 2.0 mode by default. This
limitation should be done when both gmac2 and USB are enabled.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
2025-11-25 16:48:28 +00:00

338 lines
5.9 KiB
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2025 MediaTek Inc.
* Author: Sam.Shih <sam.shih@mediatek.com>
*/
/dts-v1/;
#include "mt7987a.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "mt7987a-bananapi-bpi-r4-lite-mikrobus.dtsi"
/ {
model = "Bananapi BPI-R4-LITE";
compatible = "bananapi,bpi-r4-lite",
"mediatek,mt7987a", "mediatek,mt7987";
aliases {
/* mt7987 I2C0 */
i2c0 = &i2c0;
/* PCA9548 (0-0070) provides 4 i2c channels */
i2c1 = &imux0_rtc;
i2c2 = &imux1_sfp;
i2c3 = &imux2_MikroBus;
i2c4 = &imux3;
led-boot = &sys_led_blue;
led-failsafe = &sys_led_blue;
led-running = &sys_led_blue;
led-upgrade = &sys_led_blue;
serial0 = &uart0;
};
chosen {
bootargs = "console=ttyS0,115200n1 earlycon=uart8250,mmio32,0x11000000 \
ubi.block=0,firmware root=/dev/fit0 rootwait";
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
debounce-interval = <10>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
debounce-interval = <10>;
};
};
gpio-leds {
compatible = "gpio-leds";
sfp-led {
gpios = <&pca9555 11 GPIO_ACTIVE_LOW>;
function = "sfp";
color = <LED_COLOR_ID_GREEN>;
};
};
pwm-leds {
compatible = "pwm-leds";
status = "okay";
/* ACT LED on bpi-r4-lite */
sys_led_blue: sys-led {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
pwms = <&pwm 0 50000>;
max-brightness = <255>;
active-high;
linux,default-trigger = "default-on";
};
};
sfp: sfp@0 {
compatible = "sff,sfp";
i2c-bus = <&imux1_sfp>;
los-gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&pio 9 GPIO_ACTIVE_LOW>;
tx-disable-gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&pca9555 12 GPIO_ACTIVE_HIGH>;
rate-select0-gpios = <&pca9555 13 GPIO_ACTIVE_HIGH>;
rate-select1-gpios = <&pca9555 14 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <3000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_usb_5v: regulator-usb-5v {
compatible = "regulator-fixed";
regulator-name = "usb-5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&pca9555 9 GPIO_ACTIVE_HIGH>;
};
usb-vbus-regulator {
compatible = "regulator-output";
vout-supply = <&reg_usb_5v>;
};
};
&fan {
pwms = <&pwm 2 50000>;
status = "okay";
};
&gmac0 {
phy-mode = "2500base-x";
status = "okay";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
&gmac1 {
phy-mode = "internal";
phy-handle = <&phy15>;
status = "okay";
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;
status = "okay";
};
&pwm_pins {
mux {
/*
* - pwm0 : PWM0@PIN13
* - pwm1_0 : PWM@PIN7 (share with JTAG)
* - pwm2_0 : PWM2@PIN12 (share with PCM)
*/
function = "pwm";
groups = "pwm0", "pwm1_0", "pwm2_0";
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
pca9545@70 {
compatible = "nxp,pca9545";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
imux0_rtc: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
eeprom@57 {
compatible = "atmel,24c02";
reg = <0x57>;
address-bits = <8>;
page-size = <8>;
size = <256>;
};
};
imux1_sfp: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1>;
};
imux2_MikroBus: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
};
imux3: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
pca9555: i2c-gpio-expander@20 {
compatible = "nxp,pca9555";
interrupt-controller;
interrupt-parent = <&pio>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
gpio-controller;
#gpio-cells = <2>;
reg = <0x20>;
};
wifi_eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
wp-gpios = <&pca9555 10 GPIO_ACTIVE_LOW>;
address-bits = <8>;
page-size = <8>;
size = <256>;
};
};
};
};
&mdio {
/* built-in 2.5G Ethernet PHY */
phy15: phy@15 {
pinctrl-names = "i2p5gbe-led";
pinctrl-0 = <&i2p5gbe_led0_pins>;
compatible = "ethernet-phy-ieee802.3-c45";
reg = <15>;
phy-mode = "internal";
};
switch31: switch@31 {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins>;
status = "disabled";
};
&ssusb {
status = "okay";
/*
* VIA VL817 USB3.1/USB2.0 hub
* ports:
* 1 - mPCIe B (SIM3)
* 2 - NGFF-KEYB (SIM1)
* 3 - USB-A connector
* 4 - mPCIe A (SIM4)
*/
// reset-gpios = <&pca9555 8 GPIO_ACTIVE_HIGH>;
};
&switch31 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan0";
};
port@1 {
reg = <1>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
port@5 {
reg = <5>;
label = "sfp0";
phy-mode = "2500base-x";
sfp = <&sfp>;
managed = "in-band-status";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&tphyu3port0 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_flash_pins>;
status = "okay";
};