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4582d25a66
Added missing platform data struct for RK3576 to fix boot issues, fixed general stability issues and also improved random write performance. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/21028 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
56 lines
2.3 KiB
Diff
56 lines
2.3 KiB
Diff
From 69cc9d4075855661268327c38c9b0e71ac37eb1c Mon Sep 17 00:00:00 2001
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From: Sebastian Reichel <sebastian.reichel@collabora.com>
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Date: Fri, 21 Nov 2025 17:26:59 +0100
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Subject: [PATCH] mmc: sdhci-of-dwcmshc: Fix command queue support for RK3576
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When I added command queue engine (CQE) support for the Rockchip eMMC
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controller, I missed that RK3576 has a separate platform data struct.
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While things are working fine on RK3588 (I tested the ROCK 5B) and
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the suspend issue is fixed on the RK3576 (I tested the Sige5), this
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results in stability issues. By also adding the necessary hooks for
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the RK3576 platform the following problems can be avoided:
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[ 15.606895] mmc0: running CQE recovery
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[ 15.616189] mmc0: running CQE recovery
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[...]
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[ 25.911484] mmc0: running CQE recovery
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[ 25.926305] mmc0: running CQE recovery
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[ 25.927468] mmc0: running CQE recovery
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[...]
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[ 26.255719] mmc0: running CQE recovery
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[ 26.257162] ------------[ cut here ]------------
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[ 26.257581] mmc0: cqhci: spurious TCN for tag 31
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[ 26.258034] WARNING: CPU: 0 PID: 0 at drivers/mmc/host/cqhci-core.c:796 cqhci_irq+0x440/0x68c
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[ 26.263786] CPU: 0 UID: 0 PID: 0 Comm: swapper/0 Not tainted 6.18.0-rc6-gd984ebbf0d15 #1 PREEMPT
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[ 26.264561] Hardware name: ArmSoM Sige5 (DT)
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[...]
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[ 26.272748] Call trace:
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[ 26.272964] cqhci_irq+0x440/0x68c (P)
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[ 26.273296] dwcmshc_cqe_irq_handler+0x54/0x88
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[ 26.273689] sdhci_irq+0xbc/0x1200
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[ 26.273991] __handle_irq_event_percpu+0x54/0x1d0
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[...]
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Note that the above problems do not necessarily happen with every boot.
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Reported-by: Adrian Hunter <adrian.hunter@intel.com>
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Closes: https://lore.kernel.org/linux-rockchip/01949bc9-4873-498b-ac7d-f008393ccc4c@intel.com/
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Fixes: fda1e0af7c28f ("mmc: sdhci-of-dwcmshc: Add command queue support for rockchip SOCs")
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
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Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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---
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drivers/mmc/host/sdhci-of-dwcmshc.c | 1 +
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1 file changed, 1 insertion(+)
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--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
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+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
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@@ -1333,6 +1333,7 @@ static const struct dwcmshc_pltfm_data s
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.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
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SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
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},
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+ .cqhci_host_ops = &rk35xx_cqhci_ops,
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.init = dwcmshc_rk35xx_init,
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.postinit = dwcmshc_rk3576_postinit,
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};
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