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97b90c5951
Backport core dts updates for rk3528. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/20375 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
89 lines
2.4 KiB
Diff
89 lines
2.4 KiB
Diff
From 06601cc45b5ba0c3bcd371b9c499d9fe5dabd11d Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Sun, 18 May 2025 22:54:12 +0000
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Subject: [PATCH] arm64: dts: rockchip: Add GPU node for RK3528
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Add a GPU node and a opp-table for the Mali-450 MP2 in the RK3528 SoC.
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Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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Link: https://lore.kernel.org/r/20250518225418.682182-3-jonas@kwiboo.se
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/rk3528.dtsi | 58 ++++++++++++++++++++++++
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1 file changed, 58 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
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@@ -111,6 +111,36 @@
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};
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};
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+ gpu_opp_table: opp-table-gpu {
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+ compatible = "operating-points-v2";
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+
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+ opp-300000000 {
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+ opp-hz = /bits/ 64 <300000000>;
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+ opp-microvolt = <875000 875000 1000000>;
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+ opp-suspend;
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+ };
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+
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+ opp-500000000 {
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+ opp-hz = /bits/ 64 <500000000>;
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+ opp-microvolt = <875000 875000 1000000>;
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+ };
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+
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+ opp-600000000 {
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+ opp-hz = /bits/ 64 <600000000>;
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+ opp-microvolt = <875000 875000 1000000>;
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+ };
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+
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+ opp-700000000 {
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+ opp-hz = /bits/ 64 <700000000>;
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+ opp-microvolt = <900000 900000 1000000>;
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+ };
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+
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+ opp-800000000 {
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+ opp-hz = /bits/ 64 <800000000>;
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+ opp-microvolt = <950000 950000 1000000>;
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+ };
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+ };
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+
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pinctrl: pinctrl {
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compatible = "rockchip,rk3528-pinctrl";
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rockchip,grf = <&ioc_grf>;
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@@ -519,6 +549,34 @@
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};
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};
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+ gpu: gpu@ff700000 {
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+ compatible = "rockchip,rk3528-mali", "arm,mali-450";
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+ reg = <0x0 0xff700000 0x0 0x40000>;
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+ assigned-clocks = <&cru ACLK_GPU_MALI>,
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+ <&scmi_clk SCMI_CLK_GPU>;
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+ assigned-clock-rates = <297000000>, <300000000>;
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+ clocks = <&cru ACLK_GPU_MALI>, <&scmi_clk SCMI_CLK_GPU>;
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+ clock-names = "bus", "core";
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+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "gp",
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+ "gpmmu",
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+ "pp",
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+ "pp0",
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+ "ppmmu0",
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+ "pp1",
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+ "ppmmu1";
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+ operating-points-v2 = <&gpu_opp_table>;
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+ power-domains = <&power 4>;
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+ resets = <&cru SRST_A_GPU>;
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+ status = "disabled";
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+ };
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+
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spi0: spi@ff9c0000 {
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compatible = "rockchip,rk3528-spi",
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"rockchip,rk3066-spi";
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