diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c index dac713e530..bef470c630 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c @@ -89,7 +89,7 @@ struct table_reg *rtl_table_get(rtl838x_tbl_reg_t r, int t) if (r >= RTL_TBL_END) return NULL; - if (t >= BIT(rtl838x_tbl_regs[r].c_bit-rtl838x_tbl_regs[r].t_bit)) + if (t >= BIT(rtl838x_tbl_regs[r].c_bit - rtl838x_tbl_regs[r].t_bit)) return NULL; mutex_lock(&rtl838x_tbl_regs[r].lock); @@ -451,7 +451,7 @@ int rtl83xx_lag_add(struct dsa_switch *ds, int group, int port, struct netdev_la return -ENOSPC; } - switch(info->hash_type) { + switch (info->hash_type) { case NETDEV_LAG_HASH_L2: algomsk |= TRUNK_DISTRIBUTION_ALGO_DMAC_BIT; algomsk |= TRUNK_DISTRIBUTION_ALGO_SMAC_BIT; @@ -659,7 +659,7 @@ static int rtl83xx_l2_nexthop_rm(struct rtl838x_switch_priv *priv, struct rtl83x return 0; } -int rtl83xx_port_is_under(const struct net_device * dev, struct rtl838x_switch_priv *priv) +int rtl83xx_port_is_under(const struct net_device *dev, struct rtl838x_switch_priv *priv) { /* Is the lower network device a DSA user network device of our RTL930X-switch? * Unfortunately we cannot just follow dev->dsa_prt as this is only set for the @@ -1449,7 +1449,7 @@ static int __init rtl83xx_sw_probe(struct platform_device *pdev) priv->family_id = soc_info.family; priv->id = soc_info.id; - switch(soc_info.family) { + switch (soc_info.family) { case RTL8380_FAMILY_ID: priv->ds->ops = &rtl83xx_switch_ops; priv->cpu_port = RTL838X_CPU_PORT; diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c index afe49657b2..fed73dcc4f 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c @@ -60,7 +60,7 @@ static void rtl83xx_enable_phy_polling(struct rtl838x_switch_priv *priv) /* PHY update complete, there is no global PHY polling enable bit on the 93xx */ if (priv->family_id == RTL8390_FAMILY_ID) sw_w32_mask(0, BIT(7), RTL839X_SMI_GLB_CTRL); - else if(priv->family_id == RTL8380_FAMILY_ID) + else if (priv->family_id == RTL8380_FAMILY_ID) sw_w32_mask(0, BIT(15), RTL838X_SMI_GLB_CTRL); } @@ -473,7 +473,7 @@ static void rtl83xx_vlan_setup(struct rtl838x_switch_priv *priv) } /* Initialize normal VLANs 1-4095 */ - for (int i = 1; i < MAX_VLANS; i ++) + for (int i = 1; i < MAX_VLANS; i++) priv->r->vlan_set_tagged(i, &info); /* @@ -2021,7 +2021,7 @@ static void rtldsa_931x_fast_age(struct dsa_switch *ds, int port) val |= BIT(28); /* status - trigger flush */ sw_w32(val, RTL931X_L2_TBL_FLUSH_CTRL); - do { } while (sw_r32(RTL931X_L2_TBL_FLUSH_CTRL) & BIT (28)); + do { } while (sw_r32(RTL931X_L2_TBL_FLUSH_CTRL) & BIT(28)); mutex_unlock(&priv->reg_mutex); } @@ -2085,8 +2085,7 @@ static int rtl83xx_vlan_filtering(struct dsa_switch *ds, int port, if (port != priv->cpu_port) { priv->r->set_vlan_igr_filter(port, IGR_DROP); priv->r->set_vlan_egr_filter(port, EGR_ENABLE); - } - else { + } else { priv->r->set_vlan_igr_filter(port, IGR_TRAP); priv->r->set_vlan_egr_filter(port, EGR_DISABLE); } @@ -2908,7 +2907,7 @@ static int rtl83xx_port_lag_leave(struct dsa_switch *ds, int port, err = -EINVAL; goto out; } - pr_info("port_lag_del: group %d, port %d\n",group, port); + pr_info("port_lag_del: group %d, port %d\n", group, port); priv->lagmembers &= ~BIT_ULL(port); priv->lag_primary[group] = -1; priv->lag_non_primary &= ~BIT_ULL(port); diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/qos.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/qos.c index 6e44431845..31ef9320f2 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/qos.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/qos.c @@ -209,7 +209,7 @@ static void rtl839x_egress_rate_queue_limit(struct rtl838x_switch_priv *priv, in sw_w32_mask(0xfffff << start_bit, (rate & 0xfffff) << start_bit, RTL839X_TBL_ACCESS_DATA_2(low_byte)); if (high_mask) - sw_w32_mask(high_mask, (rate & 0xfffff) >> (32- start_bit), + sw_w32_mask(high_mask, (rate & 0xfffff) >> (32 - start_bit), RTL839X_TBL_ACCESS_DATA_2(low_byte - 1)); rtl839x_write_scheduling_table(port); @@ -335,16 +335,16 @@ static void rtl83xx_setup_default_prio2queue(void) /* Sets the output queue assigned to a port, the port can be the CPU-port */ void rtl839x_set_egress_queue(int port, int queue) { - sw_w32(queue << ((port % 10) *3), RTL839X_QM_PORT_QNUM(port)); + sw_w32(queue << ((port % 10) * 3), RTL839X_QM_PORT_QNUM(port)); } /* Sets the priority assigned of an ingress port, the port can be the CPU-port */ static void rtl83xx_set_ingress_priority(int port, int priority) { if (soc_info.family == RTL8380_FAMILY_ID) - sw_w32(priority << ((port % 10) *3), RTL838X_PRI_SEL_PORT_PRI(port)); + sw_w32(priority << ((port % 10) * 3), RTL838X_PRI_SEL_PORT_PRI(port)); else - sw_w32(priority << ((port % 10) *3), RTL839X_PRI_SEL_PORT_PRI(port)); + sw_w32(priority << ((port % 10) * 3), RTL839X_PRI_SEL_PORT_PRI(port)); } static int rtl839x_get_scheduling_algorithm(struct rtl838x_switch_priv *priv, int port) @@ -438,7 +438,7 @@ static void rtl839x_set_scheduling_queue_weights(struct rtl838x_switch_priv *pri sw_w32_mask(0x3ff << start_bit, (queue_weights[i] & 0x3ff) << start_bit, RTL839X_TBL_ACCESS_DATA_2(low_byte)); if (high_mask) - sw_w32_mask(high_mask, (queue_weights[i] & 0x3ff) >> (32- start_bit), + sw_w32_mask(high_mask, (queue_weights[i] & 0x3ff) >> (32 - start_bit), RTL839X_TBL_ACCESS_DATA_2(low_byte - 1)); } @@ -534,9 +534,9 @@ static void rtl839x_config_qos(void) * low threshold (bits 0-11) to 4095 and high threshold (bits 12-23) to 4095 * Weighted Random Early Detection (WRED) is used */ - sw_w32(4095 << 12| 4095, RTL839X_WRED_PORT_THR_CTRL(0)); - sw_w32(4095 << 12| 4095, RTL839X_WRED_PORT_THR_CTRL(1)); - sw_w32(4095 << 12| 4095, RTL839X_WRED_PORT_THR_CTRL(2)); + sw_w32(4095 << 12 | 4095, RTL839X_WRED_PORT_THR_CTRL(0)); + sw_w32(4095 << 12 | 4095, RTL839X_WRED_PORT_THR_CTRL(1)); + sw_w32(4095 << 12 | 4095, RTL839X_WRED_PORT_THR_CTRL(2)); /* Set queue-based congestion avoidance properties, register fields are as * for forward RTL839X_WRED_PORT_THR_CTRL diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c index 413a78ba2a..387d274e39 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c @@ -16,12 +16,12 @@ #define RTL838X_VLAN_PORT_TAG_STS_CTRL(port) \ (RTL838X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)) -#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(11,10) -#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(9,8) -#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(7,6) -#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(5,4) -#define RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK GENMASK(3,2) -#define RTL838X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK GENMASK(1,0) +#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(11, 10) +#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(9, 8) +#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(7, 6) +#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(5, 4) +#define RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK GENMASK(3, 2) +#define RTL838X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK GENMASK(1, 0) /* see_dal_maple_acl_log2PhyTmplteField and src/app/diag_v2/src/diag_acl.c */ /* Definition of the RTL838X-specific template field IDs as used in the PIE */ @@ -91,7 +91,7 @@ static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_ITAG, TEMPLATE_FIELD_RANGE_CHK }, { TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, - TEMPLATE_FIELD_DIP1,TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_L4_SPORT, + TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_ICMP_IGMP, TEMPLATE_FIELD_ITAG, TEMPLATE_FIELD_RANGE_CHK, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1 }, { @@ -661,7 +661,7 @@ static void rtl838x_pie_rule_del(struct rtl838x_switch_priv *priv, int index_fro { int block_from = index_from / PIE_BLOCK_SIZE; int block_to = index_to / PIE_BLOCK_SIZE; - u32 v = (index_from << 1)| (index_to << 12 ) | BIT(0); + u32 v = (index_from << 1) | (index_to << 12) | BIT(0); u32 block_state; pr_debug("%s: from %d to %d\n", __func__, index_from, index_to); @@ -1232,7 +1232,7 @@ static void rtl838x_read_pie_action(u32 r[], struct pie_rule *pr) if (pr->drop) pr_debug("%s: Action Drop: %d", __func__, pr->drop); - if (pr->fwd_sel){ /* Forwarding action */ + if (pr->fwd_sel) { /* Forwarding action */ pr->fwd_act = *aif >> 13; pr->fwd_data = *aif--; pr->bypass_all = pr->fwd_data & BIT(12); @@ -1649,7 +1649,7 @@ static void rtl838x_set_distribution_algorithm(int group, int algoidx, u32 algom static void rtl838x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action) { - switch(type) { + switch (type) { case BPDU: sw_w32_mask(3 << ((port & 0xf) << 1), (action & 0x3) << ((port & 0xf) << 1), RTL838X_RMA_BPDU_CTRL + ((port >> 4) << 2)); diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h index 66885ea6b5..52d66fcdda 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.h @@ -658,7 +658,7 @@ typedef enum { #define RTL931X_LED_SETX_1_CTRL(x) (RTL931X_LED_SETX_0_CTRL(x) - 4) /* get register for given set and led in the set */ -#define RTL931X_LED_SETX_LEDY(x,y) (RTL931X_LED_SETX_0_CTRL(x) - 4 * (y / 2)) +#define RTL931X_LED_SETX_LEDY(x, y) (RTL931X_LED_SETX_0_CTRL(x) - 4 * (y / 2)) /* get shift for given led in any set */ #define RTL931X_LED_SET_LEDX_SHIFT(x) (16 * (x % 2)) diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c index 3e058ebfcd..2edcfd4239 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c @@ -13,12 +13,12 @@ /* port 0-52 */ #define RTL839X_VLAN_PORT_TAG_STS_CTRL(port) \ (RTL839X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)) -#define RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK GENMASK(7,6) -#define RTL839X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK GENMASK(5,4) -#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(3,3) -#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(2,2) -#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1,1) -#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0,0) +#define RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK GENMASK(7, 6) +#define RTL839X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK GENMASK(5, 4) +#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(3, 3) +#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(2, 2) +#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1, 1) +#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0, 0) /* Definition of the RTL839X-specific template field IDs as used in the PIE */ enum template_field_id { @@ -97,7 +97,7 @@ static enum template_field_id fixed_templates[N_FIXED_TEMPLATES][N_FIXED_FIELDS] TEMPLATE_FIELD_ETHERTYPE, TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3 }, { TEMPLATE_FIELD_SIP0, TEMPLATE_FIELD_SIP1, TEMPLATE_FIELD_DIP0, - TEMPLATE_FIELD_DIP1,TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_L4_SPORT, + TEMPLATE_FIELD_DIP1, TEMPLATE_FIELD_IP_TOS_PROTO, TEMPLATE_FIELD_L4_SPORT, TEMPLATE_FIELD_L4_DPORT, TEMPLATE_FIELD_ICMP_IGMP, TEMPLATE_FIELD_SPM0, TEMPLATE_FIELD_SPM1, TEMPLATE_FIELD_SPM2, TEMPLATE_FIELD_SPM3 }, { @@ -726,7 +726,7 @@ static void rtl839x_init_eee(struct rtl838x_switch_priv *priv, bool enable) pr_debug("Setting up EEE, state: %d\n", enable); /* Set wake timer for TX and pause timer both to 0x21 */ - sw_w32_mask(0xff << 20| 0xff, 0x21 << 20| 0x21, RTL839X_EEE_TX_TIMER_GELITE_CTRL); + sw_w32_mask(0xff << 20 | 0xff, 0x21 << 20 | 0x21, RTL839X_EEE_TX_TIMER_GELITE_CTRL); /* Set pause wake timer for GIGA-EEE to 0x11 */ sw_w32_mask(0xff << 20, 0x11 << 20, RTL839X_EEE_TX_TIMER_GIGA_CTRL); /* Set pause wake timer for 10GBit ports to 0x11 */ @@ -750,7 +750,7 @@ static void rtl839x_pie_lookup_enable(struct rtl838x_switch_priv *priv, int inde /* Delete a range of Packet Inspection Engine rules */ static int rtl839x_pie_rule_del(struct rtl838x_switch_priv *priv, int index_from, int index_to) { - u32 v = (index_from << 1)| (index_to << 13 ) | BIT(0); + u32 v = (index_from << 1) | (index_to << 13) | BIT(0); pr_debug("%s: from %d to %d\n", __func__, index_from, index_to); mutex_lock(&priv->reg_mutex); @@ -1618,7 +1618,7 @@ static void rtl839x_set_distribution_algorithm(int group, int algoidx, u32 algom static void rtl839x_set_receive_management_action(int port, rma_ctrl_t type, action_type_t action) { - switch(type) { + switch (type) { case BPDU: sw_w32_mask(3 << ((port & 0xf) << 1), (action & 0x3) << ((port & 0xf) << 1), RTL839X_RMA_BPDU_CTRL + ((port >> 4) << 2)); diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl83xx.h b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl83xx.h index eb09d936b4..ce8e4ff6cd 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl83xx.h +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl83xx.h @@ -137,7 +137,7 @@ void __init rtl83xx_setup_qos(struct rtl838x_switch_priv *priv); void rtl83xx_fast_age(struct dsa_switch *ds, int port); int rtl83xx_packet_cntr_alloc(struct rtl838x_switch_priv *priv); int rtl83xx_port_get_stp_state(struct rtl838x_switch_priv *priv, int port); -int rtl83xx_port_is_under(const struct net_device * dev, struct rtl838x_switch_priv *priv); +int rtl83xx_port_is_under(const struct net_device *dev, struct rtl838x_switch_priv *priv); void rtl83xx_port_stp_state_set(struct dsa_switch *ds, int port, u8 state); int rtl83xx_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data); diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c index ed298eab13..3b6f4379c6 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c @@ -15,12 +15,12 @@ /* port 0-28 */ #define RTL930X_VLAN_PORT_TAG_STS_CTRL(port) \ (RTL930X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)) -#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK GENMASK(7,6) -#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_ITAG_STS_MASK GENMASK(5,4) -#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(3,3) -#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(2,2) -#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1,1) -#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0,0) +#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK GENMASK(7, 6) +#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_ITAG_STS_MASK GENMASK(5, 4) +#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(3, 3) +#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(2, 2) +#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1, 1) +#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0, 0) #define RTL930X_LED_GLB_ACTIVE_LOW BIT(22) @@ -28,7 +28,7 @@ #define RTL930X_LED_SETX_1_CTRL(x) (RTL930X_LED_SETX_0_CTRL(x) - 4) /* get register for given set and led in the set */ -#define RTL930X_LED_SETX_LEDY(x,y) (RTL930X_LED_SETX_0_CTRL(x) - 4 * (y / 2)) +#define RTL930X_LED_SETX_LEDY(x, y) (RTL930X_LED_SETX_0_CTRL(x) - 4 * (y / 2)) /* get shift for given led in any set */ #define RTL930X_LED_SET_LEDX_SHIFT(x) (16 * (x % 2)) @@ -464,7 +464,7 @@ static u32 rtl930x_l2_hash_key(struct rtl838x_switch_priv *priv, u64 seed) h1 = ((h1 & 0x1f) << 6) | ((h1 >> 5) & 0x3f); h2 = (seed >> 33) & 0x7ff; - h2 = ((h2 & 0x3f) << 5)| ((h2 >> 6) & 0x3f); + h2 = ((h2 & 0x3f) << 5) | ((h2 >> 6) & 0x3f); k1 = (u32)(((seed << 55) & 0x1f) ^ ((seed >> 44) & 0x7ff) ^ @@ -662,7 +662,7 @@ static void rtl930x_write_l2_entry_using_hash(u32 hash, u32 pos, struct rtl838x_ pr_debug("%s: hash %d, pos %d\n", __func__, hash, pos); pr_debug("%s: index %d -> mac %02x:%02x:%02x:%02x:%02x:%02x\n", __func__, idx, - e->mac[0], e->mac[1], e->mac[2], e->mac[3],e->mac[4],e->mac[5]); + e->mac[0], e->mac[1], e->mac[2], e->mac[3], e->mac[4], e->mac[5]); rtl930x_fill_l2_row(r, e); @@ -754,7 +754,7 @@ static void rtldsa_930x_set_receive_management_action(int port, rma_ctrl_t type, return; } - switch(action) { + switch (action) { case FORWARD: value = 0; break; @@ -774,7 +774,7 @@ static void rtldsa_930x_set_receive_management_action(int port, rma_ctrl_t type, return; } - switch(type) { + switch (type) { case BPDU: reg = RTL930X_RMA_BPDU_CTRL + (port / 10) * 4; shift = (port % 10) * 3; @@ -849,7 +849,7 @@ void rtl9300_dump_debug(void) { u16 r = RTL930X_STAT_PRVTE_DROP_COUNTER0; - for (int i = 0; i < 10; i ++) { + for (int i = 0; i < 10; i++) { pr_debug("# %d %08x %08x %08x %08x %08x %08x %08x %08x\n", i * 8, sw_r32(r), sw_r32(r + 4), sw_r32(r + 8), sw_r32(r + 12), sw_r32(r + 16), sw_r32(r + 20), sw_r32(r + 24), sw_r32(r + 28)); @@ -1520,7 +1520,7 @@ static void rtl930x_set_l3_nexthop(int idx, u16 dmac_id, u16 interface) __func__, idx, dmac_id, interface); sw_w32(((dmac_id & 0x7fff) << 7) | (interface & 0x7f), rtl_table_data(r, 0)); - pr_debug("%s: %08x\n", __func__, sw_r32(rtl_table_data(r,0))); + pr_debug("%s: %08x\n", __func__, sw_r32(rtl_table_data(r, 0))); rtl_table_write(r, idx); rtl_table_release(r); } @@ -1989,7 +1989,7 @@ static int rtl930x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul /* Delete a range of Packet Inspection Engine rules */ static int rtl930x_pie_rule_del(struct rtl838x_switch_priv *priv, int index_from, int index_to) { - u32 v = (index_from << 1)| (index_to << 12 ) | BIT(0); + u32 v = (index_from << 1) | (index_to << 12) | BIT(0); pr_debug("%s: from %d to %d\n", __func__, index_from, index_to); mutex_lock(&priv->reg_mutex); @@ -2078,7 +2078,7 @@ static void rtl930x_set_l3_egress_intf(int idx, struct rtl838x_l3_intf *intf) v |= (intf->ttl_scope & 0xff) << 20; v |= (intf->hl_scope & 0xff) << 12; v |= (intf->ip4_icmp_redirect & 0x7) << 9; - v |= (intf->ip6_icmp_redirect & 0x7)<< 6; + v |= (intf->ip6_icmp_redirect & 0x7) << 6; v |= (intf->ip4_pbr_icmp_redirect & 0x7) << 3; v |= (intf->ip6_pbr_icmp_redirect & 0x7); @@ -2319,7 +2319,7 @@ static void rtl930x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum if (type == PBVLAN_TYPE_INNER) sw_w32_mask(0x3, mode, RTL930X_VLAN_PORT_PB_VLAN + (port << 2)); else - sw_w32_mask(0x3 << 14, mode << 14 ,RTL930X_VLAN_PORT_PB_VLAN + (port << 2)); + sw_w32_mask(0x3 << 14, mode << 14, RTL930X_VLAN_PORT_PB_VLAN + (port << 2)); } static void rtl930x_vlan_port_pvid_set(int port, enum pbvlan_type type, int pvid) @@ -2366,7 +2366,7 @@ static int rtl930x_set_ageing_time(unsigned long msec) static void rtl930x_set_igr_filter(int port, enum igr_filter state) { - sw_w32_mask(0x3 << ((port & 0xf)<<1), state << ((port & 0xf)<<1), + sw_w32_mask(0x3 << ((port & 0xf) << 1), state << ((port & 0xf) << 1), RTL930X_VLAN_PORT_IGR_FLTR + (((port >> 4) << 2))); } @@ -2507,7 +2507,7 @@ static void rtl930x_led_init(struct rtl838x_switch_priv *priv) priv->ports[i].leds_on_this_port = forced_leds_per_port[i]; /* 0x0 = 1 led, 0x1 = 2 leds, 0x2 = 3 leds, 0x3 = 4 leds per port */ - sw_w32_mask(0x3 << pos, (priv->ports[i].leds_on_this_port -1) << pos, RTL930X_LED_PORT_NUM_CTRL(i)); + sw_w32_mask(0x3 << pos, (priv->ports[i].leds_on_this_port - 1) << pos, RTL930X_LED_PORT_NUM_CTRL(i)); pm |= BIT(i); diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c index 3b67b1c486..595a78ddda 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c @@ -14,16 +14,16 @@ /* port 0-56 */ #define RTL931X_VLAN_PORT_TAG_CTRL(port) \ (RTL931X_VLAN_PORT_TAG_CTRL_BASE + (port << 2)) -#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK GENMASK(13,12) -#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_STS_MASK GENMASK(11,10) -#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_KEEP_MASK GENMASK(9,9) -#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_KEEP_MASK GENMASK(8,8) -#define RTL931X_VLAN_PORT_TAG_IGR_OTAG_KEEP_MASK GENMASK(7,7) -#define RTL931X_VLAN_PORT_TAG_IGR_ITAG_KEEP_MASK GENMASK(6,6) -#define RTL931X_VLAN_PORT_TAG_OTPID_IDX_MASK GENMASK(5,4) -#define RTL931X_VLAN_PORT_TAG_OTPID_KEEP_MASK GENMASK(3,3) -#define RTL931X_VLAN_PORT_TAG_ITPID_IDX_MASK GENMASK(2,1) -#define RTL931X_VLAN_PORT_TAG_ITPID_KEEP_MASK GENMASK(0,0) +#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK GENMASK(13, 12) +#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_STS_MASK GENMASK(11, 10) +#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_KEEP_MASK GENMASK(9, 9) +#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_KEEP_MASK GENMASK(8, 8) +#define RTL931X_VLAN_PORT_TAG_IGR_OTAG_KEEP_MASK GENMASK(7, 7) +#define RTL931X_VLAN_PORT_TAG_IGR_ITAG_KEEP_MASK GENMASK(6, 6) +#define RTL931X_VLAN_PORT_TAG_OTPID_IDX_MASK GENMASK(5, 4) +#define RTL931X_VLAN_PORT_TAG_OTPID_KEEP_MASK GENMASK(3, 3) +#define RTL931X_VLAN_PORT_TAG_ITPID_IDX_MASK GENMASK(2, 1) +#define RTL931X_VLAN_PORT_TAG_ITPID_KEEP_MASK GENMASK(0, 0) /* Definition of the RTL931X-specific template field IDs as used in the PIE */ enum template_field_id { @@ -404,7 +404,7 @@ static void rtldsa_931x_set_receive_management_action(int port, rma_ctrl_t type, return; } - switch(action) { + switch (action) { case FORWARD: value = 0; break; @@ -424,7 +424,7 @@ static void rtldsa_931x_set_receive_management_action(int port, rma_ctrl_t type, return; } - switch(type) { + switch (type) { case BPDU: reg = RTL931X_RMA_BPDU_CTRL + (port / 10) * 4; shift = (port % 10) * 3; @@ -631,7 +631,7 @@ static void rtl931x_fill_l2_row(u32 r[], struct rtl838x_l2_entry *e) r[0] |= e->is_open_flow ? BIT(30) : 0; r[0] |= e->is_pe_forward ? BIT(29) : 0; - r[0] |= e->hash_msb ? BIT(28): 0; + r[0] |= e->hash_msb ? BIT(28) : 0; r[2] = e->next_hop ? BIT(30) : 0; r[0] |= (e->rvid & 0xfff) << 16; @@ -721,7 +721,7 @@ static u64 rtl931x_read_cam(int idx, struct rtl838x_l2_entry *e) struct table_reg *q = rtl_table_get(RTL9310_TBL_0, 1); rtl_table_read(q, idx); - for ( int i = 0; i < 4; i++) + for (int i = 0; i < 4; i++) r[i] = sw_r32(rtl_table_data(q, i)); rtl_table_release(q); @@ -755,7 +755,7 @@ static void rtl931x_write_l2_entry_using_hash(u32 hash, u32 pos, struct rtl838x_ pr_debug("%s: hash %d, pos %d\n", __func__, hash, pos); pr_debug("%s: index %d -> mac %02x:%02x:%02x:%02x:%02x:%02x\n", __func__, idx, - e->mac[0], e->mac[1], e->mac[2], e->mac[3],e->mac[4],e->mac[5]); + e->mac[0], e->mac[1], e->mac[2], e->mac[3], e->mac[4], e->mac[5]); if (idx < 0x4000) hash_algo_id = sw_r32(RTL931X_L2_CTRL) & BIT(0); @@ -1370,7 +1370,7 @@ static int rtl931x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul /* Delete a range of Packet Inspection Engine rules */ static int rtl931x_pie_rule_del(struct rtl838x_switch_priv *priv, int index_from, int index_to) { - u32 v = (index_from << 1)| (index_to << 13 ) | BIT(0); + u32 v = (index_from << 1) | (index_to << 13) | BIT(0); pr_debug("%s: from %d to %d\n", __func__, index_from, index_to); mutex_lock(&priv->reg_mutex); @@ -1487,14 +1487,14 @@ static int rtldsa_931x_vlan_port_fast_age(struct rtl838x_switch_priv *priv, int val |= BIT(28); /* status - trigger flush */ sw_w32(val, RTL931X_L2_TBL_FLUSH_CTRL); - do { } while (sw_r32(RTL931X_L2_TBL_FLUSH_CTRL) & BIT (28)); + do { } while (sw_r32(RTL931X_L2_TBL_FLUSH_CTRL) & BIT(28)); return 0; } static void rtl931x_set_igr_filter(int port, enum igr_filter state) { - sw_w32_mask(0x3 << ((port & 0xf)<<1), state << ((port & 0xf)<<1), + sw_w32_mask(0x3 << ((port & 0xf) << 1), state << ((port & 0xf) << 1), RTL931X_VLAN_PORT_IGR_FLTR + (((port >> 4) << 2))); } diff --git a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/tc.c b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/tc.c index 06a362c0bf..38f4eeb9bd 100644 --- a/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/tc.c +++ b/target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/tc.c @@ -291,7 +291,7 @@ out: } static int rtl83xx_delete_flower(struct rtl838x_switch_priv *priv, - struct flow_cls_offload * cls_flower) + struct flow_cls_offload *cls_flower) { struct rtl83xx_flow *flow; @@ -315,7 +315,7 @@ static int rtl83xx_delete_flower(struct rtl838x_switch_priv *priv, } static int rtl83xx_stats_flower(struct rtl838x_switch_priv *priv, - struct flow_cls_offload * cls_flower) + struct flow_cls_offload *cls_flower) { struct rtl83xx_flow *flow; unsigned long lastused = 0; @@ -382,7 +382,7 @@ int rtl83xx_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type pr_debug("%s: %d\n", __func__, type); - if(!netdev_uses_dsa(dev)) { + if (!netdev_uses_dsa(dev)) { pr_err("%s: no DSA\n", __func__); return 0; } diff --git a/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c index 67662fdd5d..61dbb149ee 100644 --- a/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c +++ b/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c @@ -905,9 +905,9 @@ static void rtl838x_hw_stop(struct rtl838x_eth_priv *priv) if (priv->family_id == RTL8380_FAMILY_ID || priv->family_id == RTL8390_FAMILY_ID) sw_w32(force_mac, priv->r->mac_force_mode_ctrl + priv->cpu_port * 4); else if (priv->family_id == RTL9300_FAMILY_ID) - sw_w32_mask(0x3, 0, priv->r->mac_force_mode_ctrl + priv->cpu_port *4); + sw_w32_mask(0x3, 0, priv->r->mac_force_mode_ctrl + priv->cpu_port * 4); else if (priv->family_id == RTL9310_FAMILY_ID) - sw_w32_mask(BIT(0) | BIT(9), 0, priv->r->mac_force_mode_ctrl + priv->cpu_port *4); + sw_w32_mask(BIT(0) | BIT(9), 0, priv->r->mac_force_mode_ctrl + priv->cpu_port * 4); mdelay(100); /* Disable all TX/RX interrupts */ diff --git a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto-serdes.c b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto-serdes.c index 46a426a69a..95ef214ec8 100644 --- a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto-serdes.c +++ b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto-serdes.c @@ -449,7 +449,7 @@ static int rtsds_probe(struct platform_device *pdev) ctrl->cfg = (const struct rtsds_config *)device_get_match_data(ctrl->dev); ctrl->bus = bus; - snprintf(bus->id, MII_BUS_ID_SIZE, "realtek-serdes-mdio") ; + snprintf(bus->id, MII_BUS_ID_SIZE, "realtek-serdes-mdio"); bus->name = "Realtek SerDes MDIO bus"; bus->parent = dev; bus->read_c45 = rtsds_read; @@ -539,4 +539,4 @@ module_platform_driver(rtsds_mdio_driver); MODULE_AUTHOR("Markus Stockhausen "); MODULE_DESCRIPTION("Realtek Otto SerDes MDIO bus"); -MODULE_LICENSE("GPL v2"); \ No newline at end of file +MODULE_LICENSE("GPL v2"); diff --git a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c index 2ce7802dcc..ec175fb1f0 100644 --- a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c +++ b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c @@ -716,7 +716,7 @@ static int rtmdio_930x_read_phy(u32 port, u32 page, u32 reg, u32 *val) do { v = sw_r32(RTMDIO_930X_SMI_ACCESS_PHY_CTRL_1); - } while ( v & 0x1); + } while (v & 0x1); if (v & BIT(25)) { pr_debug("Error reading phy %d, register %d\n", port, reg); @@ -949,7 +949,7 @@ static int rtmdio_931x_write_phy(u32 port, u32 page, u32 reg, u32 val) sw_w32_mask(0xffff, val, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_3); - v = reg << 6 | page << 11 ; + v = reg << 6 | page << 11; sw_w32(v, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_0); sw_w32(0x1ff, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_1); @@ -1441,12 +1441,12 @@ static int rtmdio_probe(struct platform_device *pdev) return -ENOMEM; priv = bus->priv; - for (i=0; i < RTMDIO_MAX_PORT; i++) { + for (i = 0; i < RTMDIO_MAX_PORT; i++) { priv->page[i] = 0; priv->raw[i] = false; } - switch(family) { + switch (family) { case RTMDIO_838X_FAMILY_ID: bus->name = "rtl838x-eth-mdio"; bus->read = rtmdio_read; @@ -1566,7 +1566,7 @@ static int rtmdio_probe(struct platform_device *pdev) if (pcs_node) of_property_read_u32(pcs_node, "reg", &priv->sds_id[pn]); if (priv->phy_is_internal[pn] && priv->sds_id[pn] >= 0) - priv->smi_bus[pn]= -1; + priv->smi_bus[pn] = -1; if (priv->sds_id[pn] >= 0) dev_dbg(dev, "PHY %d has SDS %d\n", pn, priv->sds_id[pn]); } diff --git a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c index 462dff0859..79a2007db9 100644 --- a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c +++ b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c @@ -599,7 +599,7 @@ static void rtpcs_930x_sds_mode_set(struct rtpcs_ctrl *ctrl, int sds, return; } - switch(phy_mode) { + switch (phy_mode) { case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_1000BASEX: case PHY_INTERFACE_MODE_2500BASEX: @@ -639,7 +639,7 @@ static void rtpcs_930x_sds_tx_config(struct rtpcs_ctrl *ctrl, int sds, int post_en = 0x1; int page; - switch(phy_if) { + switch (phy_if) { case PHY_INTERFACE_MODE_1000BASEX: case PHY_INTERFACE_MODE_SGMII: pre_amp = 0x1; @@ -702,7 +702,7 @@ static void rtpcs_930x_sds_rxcal_dcvs_manual(struct rtpcs_ctrl *ctrl, u32 sds_nu u32 dcvs_id, bool manual, u32 dvcs_list[]) { if (manual) { - switch(dcvs_id) { + switch (dcvs_id) { case 0: rtpcs_sds_write_bits(ctrl, sds_num, 0x2e, 0x1e, 14, 14, 0x1); rtpcs_sds_write_bits(ctrl, sds_num, 0x2f, 0x03, 5, 5, dvcs_list[0]); @@ -737,7 +737,7 @@ static void rtpcs_930x_sds_rxcal_dcvs_manual(struct rtpcs_ctrl *ctrl, u32 sds_nu break; } } else { - switch(dcvs_id) { + switch (dcvs_id) { case 0: rtpcs_sds_write_bits(ctrl, sds_num, 0x2e, 0x1e, 14, 14, 0x0); break; @@ -781,7 +781,7 @@ static void rtpcs_930x_sds_rxcal_dcvs_get(struct rtpcs_ctrl *ctrl, u32 sds_num, /* ##Page0x21, Reg0x06[11 6], REG0_RX_DEBUG_SEL=[1 0 x x x x] */ rtpcs_sds_write_bits(ctrl, sds_num, 0x21, 0x06, 11, 6, 0x20); - switch(dcvs_id) { + switch (dcvs_id) { case 0: rtpcs_sds_write_bits(ctrl, sds_num, 0x2f, 0x0c, 5, 0, 0x22); mdelay(1); @@ -889,20 +889,20 @@ static u32 rtpcs_930x_sds_rxcal_gray_to_binary(u32 gray_code) u32 c[GRAY_BITS]; u32 leq_binary = 0; - for(i = 0; i < GRAY_BITS; i++) + for (i = 0; i < GRAY_BITS; i++) g[i] = (gray_code & BIT(i)) >> i; m = GRAY_BITS - 1; c[m] = g[m]; - for(i = 0; i < m; i++) { + for (i = 0; i < m; i++) { c[i] = g[i]; - for(j = i + 1; j < GRAY_BITS; j++) + for (j = i + 1; j < GRAY_BITS; j++) c[i] = c[i] ^ g[j]; } - for(i = 0; i < GRAY_BITS; i++) + for (i = 0; i < GRAY_BITS; i++) leq_binary += c[i] << i; return leq_binary; @@ -985,7 +985,7 @@ static void rtpcs_930x_sds_rxcal_tap_manual(struct rtpcs_ctrl *ctrl, u32 sds_num int tap_id, bool manual, u32 tap_list[]) { if (manual) { - switch(tap_id) { + switch (tap_id) { case 0: /* ##REG0_LOAD_IN_INIT[0]=1; REG0_TAP0_INIT[5:0]=Tap0_Value */ rtpcs_sds_write_bits(ctrl, sds_num, 0x2e, 0x0f, tap_id + 7, tap_id + 7, 0x1); @@ -1069,7 +1069,7 @@ static void rtpcs_930x_sds_rxcal_tap_get(struct rtpcs_ctrl *ctrl, u32 sds_num, tap_list[1] = tap0_coef_bin; tap_manual = !!rtpcs_sds_read_bits(ctrl, sds_num, 0x2e, 0x0f, 7, 7); - pr_info("tap0 manual = %u",tap_manual); + pr_info("tap0 manual = %u", tap_manual); } else { /* ##Page0x2F, Reg0x0C[5 0], REG0_COEF_SEL=[0 0 0 0 0 1] */ rtpcs_sds_write_bits(ctrl, sds_num, 0x2f, 0x0c, 5, 0, tap_id); @@ -1096,7 +1096,7 @@ static void rtpcs_930x_sds_rxcal_tap_get(struct rtpcs_ctrl *ctrl, u32 sds_num, else pr_info("Tap %u odd sign: +", tap_id); - pr_info("Tap %u odd coefficient = %u", tap_id,tap_coef_bin_odd); + pr_info("Tap %u odd coefficient = %u", tap_id, tap_coef_bin_odd); tap_list[0] = tap_sign_out_even; tap_list[1] = tap_coef_bin_even; @@ -1104,7 +1104,7 @@ static void rtpcs_930x_sds_rxcal_tap_get(struct rtpcs_ctrl *ctrl, u32 sds_num, tap_list[3] = tap_coef_bin_odd; tap_manual = rtpcs_sds_read_bits(ctrl, sds_num, 0x2e, 0x0f, tap_id + 7, tap_id + 7); - pr_info("tap %u manual = %d",tap_id, tap_manual); + pr_info("tap %u manual = %d", tap_id, tap_manual); } } @@ -1236,7 +1236,7 @@ static void rtpcs_930x_sds_do_rx_calibration_2_3(struct rtpcs_ctrl *ctrl, pr_info("start_1.2.3 Foreground Calibration\n"); - while(1) { + while (1) { if (!(sds_num % 2)) rtpcs_sds_write(ctrl, sds_num, 0x1f, 0x2, 0x2f); else @@ -1326,7 +1326,7 @@ static void rtpcs_930x_sds_rxcal_3_2(struct rtpcs_ctrl *ctrl, int sds_num, pr_info("start_1.3.2"); - for(i = 0; i < 10; i++) { + for (i = 0; i < 10; i++) { sum10 += rtpcs_930x_sds_rxcal_leq_read(ctrl, sds_num); mdelay(10); } @@ -1362,7 +1362,7 @@ static void rtpcs_930x_sds_rxcal_3_2(struct rtpcs_ctrl *ctrl, int sds_num, } } - pr_info("Sds:%u LEQ = %u",sds_num, rtpcs_930x_sds_rxcal_leq_read(ctrl, sds_num)); + pr_info("Sds:%u LEQ = %u", sds_num, rtpcs_930x_sds_rxcal_leq_read(ctrl, sds_num)); pr_info("end_1.3.2"); } @@ -1863,7 +1863,7 @@ static int rtpcs_930x_sds_cmu_band_get(struct rtpcs_ctrl *ctrl, int sds) rtpcs_sds_write_bits(ctrl, sds + 1, page, 0x1c, 15, 15, 1); en = rtpcs_sds_read_bits(ctrl, sds, page, 27, 1, 1); - if(!en) { /* Auto mode */ + if (!en) { /* Auto mode */ rtpcs_sds_write(ctrl, sds, 0x1f, 0x02, 31); cmu_band = rtpcs_sds_read_bits(ctrl, sds, 0x1f, 0x15, 5, 1); @@ -2244,7 +2244,7 @@ static int rtpcs_931x_sds_link_sts_get(struct rtpcs_ctrl *ctrl, u32 sds) { u32 sts, sts1, latch_sts, latch_sts1; - if (0){ + if (0) { sts = rtpcs_sds_read_bits(ctrl, sds, 0x41, 29, 8, 0); sts1 = rtpcs_sds_read_bits(ctrl, sds, 0x81, 29, 8, 0); latch_sts = rtpcs_sds_read_bits(ctrl, sds, 0x41, 30, 8, 0); @@ -2688,7 +2688,7 @@ struct phylink_pcs *rtpcs_create(struct device *dev, struct device_node *np, int if (port < 0 || port > ctrl->cfg->cpu_port) return ERR_PTR(-EINVAL); - if (sds !=-1 && rtpcs_sds_read(ctrl, sds, 0 , 0) < 0) + if (sds != -1 && rtpcs_sds_read(ctrl, sds, 0, 0) < 0) return ERR_PTR(-EINVAL); link = kzalloc(sizeof(*link), GFP_KERNEL); diff --git a/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c b/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c index 13d37ba4b7..7706063d0c 100644 --- a/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c +++ b/target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c @@ -252,7 +252,7 @@ static void rtl821x_phy_setup_package_broadcast(struct phy_device *phydev, bool /* select page 0x266 */ phy_write_paged(phydev, RTL838X_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL821X_PAGE_PORT); /* set phy id and target broadcast bitmap in register 0x16 on page 0x266 */ - phy_write_paged(phydev, RTL838X_PAGE_RAW, 0x16, (enable?0xff00:0x00) | mac); + phy_write_paged(phydev, RTL838X_PAGE_RAW, 0x16, (enable ? 0xff00 : 0x00) | mac); /* return to main page 0 */ phy_write_paged(phydev, RTL838X_PAGE_RAW, RTL8XXX_PAGE_SELECT, RTL8XXX_PAGE_MAIN); /* write to 0x0 to register 0x1d on main page 0 */