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realtek: Separate variables and code by newline

Browse Source 
The Linux coding style requires to have a newline between the vaariables
definition block and the beginning of a scope and the code.

Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/20906
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Sven Eckelmann 2025-11-23 16:45:25 +01:00 committed by Hauke Mehrtens
parent 5a2a2b2020
commit 8f42966c08
11 changed files with 23 additions and 0 deletions
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1
target/linux/realtek/files-6.12/arch/mips/rtl838x/prom.c
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@ -230,6 +230,7 @@ static void __init rtl83xx_set_system_type(void) {
void __init prom_init(void)
{
uint32_t model = read_model();
parse_model(model);
rtl83xx_set_system_type();

1
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c
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@ -753,6 +753,7 @@ static int rtl83xx_l3_nexthop_update(struct rtl838x_switch_priv *priv, __be32 i
priv->r->pie_rule_add(priv, &r->pr);
} else {
int pkts = priv->r->packet_cntr_read(r->pr.packet_cntr);
pr_debug("%s: total packets: %d\n", __func__, pkts);
priv->r->pie_rule_write(priv, r->pr.id, &r->pr);

4
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/debugfs.c
View File

@ -176,6 +176,7 @@ static ssize_t stp_state_write(struct file *filp, const char __user *buffer,
struct rtl838x_port *p = filp->private_data;
u32 value;
size_t res = rtl838x_common_write(buffer, count, ppos, &value);
if (res < 0)
return res;
@ -379,6 +380,7 @@ static ssize_t age_out_write(struct file *filp, const char __user *buffer,
struct rtl838x_port *p = filp->private_data;
u32 value;
size_t res = rtl838x_common_write(buffer, count, ppos, &value);
if (res < 0)
return res;
@ -401,6 +403,7 @@ static ssize_t port_egress_rate_read(struct file *filp, char __user *buffer, siz
struct dsa_switch *ds = p->dp->ds;
struct rtl838x_switch_priv *priv = ds->priv;
int value;
if (priv->family_id == RTL8380_FAMILY_ID)
value = rtl838x_get_egress_rate(priv, p->dp->index);
else
@ -420,6 +423,7 @@ static ssize_t port_egress_rate_write(struct file *filp, const char __user *buff
struct rtl838x_switch_priv *priv = ds->priv;
u32 value;
size_t res = rtl838x_common_write(buffer, count, ppos, &value);
if (res < 0)
return res;

2
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/dsa.c
View File

@ -2230,6 +2230,7 @@ static int rtl83xx_vlan_del(struct dsa_switch *ds, int port,
/* VLANs without members are set back (implicitly) to CIST by DSA */
if (!info.member_ports) {
u16 mst = info.fid;
info.fid = 0;
rtldsa_mst_put_slot(priv, mst);
@ -2763,6 +2764,7 @@ static int rtldsa_port_pre_bridge_flags(struct dsa_switch *ds, int port,
{
struct rtl838x_switch_priv *priv = ds->priv;
unsigned long features = BR_ISOLATED;
pr_debug("%s: %d %lX\n", __func__, port, flags.val);
if (priv->r->enable_learning)
features |= BR_LEARNING;

1
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/qos.c
View File

@ -304,6 +304,7 @@ static void rtl839x_setup_prio2queue_matrix(int *min_queues)
pr_info("Current Intprio2queue setting: %08x\n", sw_r32(RTL839X_QM_INTPRI2QID_CTRL(0)));
for (int i = 0; i < MAX_PRIOS; i++) {
int q = min_queues[i];
sw_w32(i << (q * 3), RTL839X_QM_INTPRI2QID_CTRL(q));
}
}

1
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl838x.c
View File

@ -1429,6 +1429,7 @@ static int rtl838x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul
for (block = 0; block < priv->n_pie_blocks; block++) {
for (j = 0; j < 3; j++) {
int t = (sw_r32(RTL838X_ACL_BLK_TMPLTE_CTRL(block)) >> (j * 3)) & 0x7;
pr_debug("Testing block %d, template %d, template id %d\n", block, j, t);
idx = rtl838x_pie_verify_template(priv, pr, t, block);
if (idx >= 0)

1
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl839x.c
View File

@ -1306,6 +1306,7 @@ static bool rtl839x_pie_templ_has(int t, enum template_field_id field_type)
{
for (int i = 0; i < N_FIXED_FIELDS; i++) {
enum template_field_id ft = fixed_templates[t][i];
if (field_type == ft)
return true;
}

3
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl930x.c
View File

@ -828,6 +828,7 @@ static void rtl930x_traffic_set(int source, u64 dest_matrix)
static void rtl930x_traffic_enable(int source, int dest)
{
struct table_reg *r = rtl_table_get(RTL9300_TBL_0, 6);
rtl_table_read(r, source);
sw_w32_mask(0, BIT(dest + 3), rtl_table_data(r, 0));
rtl_table_write(r, source);
@ -837,6 +838,7 @@ static void rtl930x_traffic_enable(int source, int dest)
static void rtl930x_traffic_disable(int source, int dest)
{
struct table_reg *r = rtl_table_get(RTL9300_TBL_0, 6);
rtl_table_read(r, source);
sw_w32_mask(BIT(dest + 3), 0, rtl_table_data(r, 0));
rtl_table_write(r, source);
@ -1882,6 +1884,7 @@ static bool rtl930x_pie_templ_has(int t, enum template_field_id field_type)
{
for (int i = 0; i < N_FIXED_FIELDS; i++) {
enum template_field_id ft = fixed_templates[t][i];
if (field_type == ft)
return true;
}

6
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/rtl931x.c
View File

@ -479,6 +479,7 @@ static void rtl931x_traffic_set(int source, u64 dest_matrix)
static void rtl931x_traffic_enable(int source, int dest)
{
struct table_reg *r = rtl_table_get(RTL9310_TBL_2, 1);
rtl_table_read(r, source);
sw_w32_mask(0, BIT((dest + 7) % 32), rtl_table_data(r, (dest + 7) / 32 ? 0 : 1));
rtl_table_write(r, source);
@ -488,6 +489,7 @@ static void rtl931x_traffic_enable(int source, int dest)
static void rtl931x_traffic_disable(int source, int dest)
{
struct table_reg *r = rtl_table_get(RTL9310_TBL_2, 1);
rtl_table_read(r, source);
sw_w32_mask(BIT((dest + 7) % 32), 0, rtl_table_data(r, (dest + 7) / 32 ? 0 : 1));
rtl_table_write(r, source);
@ -717,6 +719,7 @@ static u64 rtl931x_read_cam(int idx, struct rtl838x_l2_entry *e)
{
u32 r[4];
struct table_reg *q = rtl_table_get(RTL9310_TBL_0, 1);
rtl_table_read(q, idx);
for ( int i = 0; i < 4; i++)
r[i] = sw_r32(rtl_table_data(q, i));
@ -734,6 +737,7 @@ static void rtl931x_write_cam(int idx, struct rtl838x_l2_entry *e)
{
u32 r[4];
struct table_reg *q = rtl_table_get(RTL9310_TBL_0, 1);
rtl931x_fill_l2_row(r, e);
for (int i = 0; i < 4; i++)
@ -1259,6 +1263,7 @@ static bool rtl931x_pie_templ_has(int t, enum template_field_id field_type)
{
for (int i = 0; i < N_FIXED_FIELDS_RTL931X; i++) {
enum template_field_id ft = fixed_templates[t][i];
if (field_type == ft)
return true;
}
@ -1329,6 +1334,7 @@ static int rtl931x_pie_rule_add(struct rtl838x_switch_priv *priv, struct pie_rul
for (block = min_block; block < max_block; block++) {
for (j = 0; j < 2; j++) {
int t = (sw_r32(RTL931X_PIE_BLK_TMPLTE_CTRL(block)) >> (j * 4)) & 0xf;
pr_debug("Testing block %d, template %d, template id %d\n", block, j, t);
pr_debug("%s: %08x\n",
__func__, sw_r32(RTL931X_PIE_BLK_TMPLTE_CTRL(block)));

2
target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.c
View File

@ -1103,6 +1103,7 @@ static int rtl838x_eth_tx(struct sk_buff *skb, struct net_device *dev)
if (priv->family_id == RTL8380_FAMILY_ID) {
for (int i = 0; i < 10; i++) {
u32 val = sw_r32(priv->r->dma_if_ctrl);
if ((val & 0xc) == 0xc)
break;
}
@ -1277,6 +1278,7 @@ static int rtl838x_poll_rx(struct napi_struct *napi, int budget)
while (work_done < budget) {
int work = rtl838x_hw_receive(priv->netdev, ring, budget - work_done);
if (!work)
break;
work_done += work;

1
target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c
View File

@ -2247,6 +2247,7 @@ __always_unused
static int rtpcs_931x_sds_link_sts_get(struct rtpcs_ctrl *ctrl, u32 sds)
{
u32 sts, sts1, latch_sts, latch_sts1;
if (0){
sts = rtpcs_sds_read_bits(ctrl, sds, 0x41, 29, 8, 0);
sts1 = rtpcs_sds_read_bits(ctrl, sds, 0x81, 29, 8, 0);