openwrt-ipq-breeze303/target/linux/qualcommax/patches-6.6/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch
Sean Khan 140b5e96e1 ath11k_nss: Organize patch order and formatting
NSS patches should always get applied last as to avoid fuzzing issues
with upstream patches.

Also cleanup patches that introduced spaces as indents vs. tabs

Signed-off-by: Sean Khan <datapronix@protonmail.com>

ath11k_nss: drop upstreamed patch

A variation of this patch 'wifi: mac80211: Use flexible array in struct ieee80211_tim_ie'
was upstreamed in commit 'e6e4d90b69027d74ba7e9a0a586b95a5714e10c0'.
Remove it to avoid compilation issues.

Signed-off-by: Sean Khan <datapronix@protonmail.com>

ath11k_nss: Fix patch conflict

Signed-off-by: Sean Khan <datapronix@protonmail.com>
2024-10-10 00:25:57 -04:00

61 lines
1.5 KiB
Diff

From ad2d07f71739351eeea1d8a120c0918e2c4b265f Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 22 Dec 2021 12:23:34 +0100
Subject: [PATCH] arm64: dts: ipq8074: add reserved memory nodes
IPQ8074 has multiple reserved memory ranges, if they are not defined
then weird things tend to happen, board hangs and resets when PCI or
WLAN is used etc.
So, to avoid all of that add the reserved memory nodes from the downstream
5.4 kernel from QCA.
This is their default layout meant for devices with 1GB of RAM, but
devices with lower ammounts can override the Q6 node.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 35 +++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -86,6 +86,16 @@
#size-cells = <2>;
ranges;
+ nss_region: nss@40000000 {
+ no-map;
+ reg = <0x0 0x40000000 0x0 0x01000000>;
+ };
+
+ tzapp_region: tzapp@4a400000 {
+ no-map;
+ reg = <0x0 0x4a400000 0x0 0x00200000>;
+ };
+
bootloader@4a600000 {
reg = <0x0 0x4a600000 0x0 0x400000>;
no-map;
@@ -108,6 +118,21 @@
reg = <0x0 0x4ac00000 0x0 0x400000>;
no-map;
};
+
+ q6_region: wcnss@4b000000 {
+ no-map;
+ reg = <0x0 0x4b000000 0x0 0x05f00000>;
+ };
+
+ q6_etr_region: q6_etr_dump@50f00000 {
+ no-map;
+ reg = <0x0 0x50f00000 0x0 0x00100000>;
+ };
+
+ m3_dump_region: m3_dump@51000000 {
+ no-map;
+ reg = <0x0 0x51000000 0x0 0x100000>;
+ };
};
firmware {