ipq50xx: add xiaomi cr881x support

This commit is contained in:
hzy 2024-07-19 00:03:33 +08:00
parent 7e29db763e
commit 39e1edce47
13 changed files with 569 additions and 7 deletions

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@ -9,7 +9,8 @@ touch /etc/config/ubootenv
board=$(board_name)
case "$board" in
redmi,ax3000)
redmi,ax3000|\
xiaomi,cr881x)
ubootenv_add_uci_config "/dev/mtd10" "0x0" "0x10000" "0x20000"
;;
esac

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@ -50,7 +50,8 @@ ALLWIFIBOARDS:= \
plasmacloud_pa1200 \
plasmacloud_pa2200 \
qxwlan_e2600ac \
redmi_ax3000
redmi_ax3000 \
xiaomi_cr881x
ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
@ -141,5 +142,6 @@ $(eval $(call generate-ipq-wifi-package,plasmacloud_pa1200,Plasma Cloud PA1200))
$(eval $(call generate-ipq-wifi-package,plasmacloud_pa2200,Plasma Cloud PA2200))
$(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac,Qxwlan E2600AC))
$(eval $(call generate-ipq-wifi-package,redmi_ax3000,Redmi AX3000))
$(eval $(call generate-ipq-wifi-package,xiaomi_cr881x,Xiaomi CR881x))
$(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))

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@ -22,6 +22,9 @@ case $board in
redmi,ax3000)
ucidef_set_led_switch "wan" "WAN" "blue:internet" "switch1" "$( bits 4 )"
;;
xiaomi,cr881x)
ucidef_set_led_switch "wan" "WAN" "blue:internet" "switch0" "$( bits 3 )"
;;
esac
board_config_flush

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@ -12,6 +12,12 @@ ipq50xx_setup_interfaces()
"1:lan:1" "2:lan:2" "3:lan:3" \
"4:wan"
;;
xiaomi,cr881x)
ucidef_add_switch "switch0" \
"8u@eth1" "4u@eth0" \
"0:lan:1" "1:lan:2" "2:lan:3" \
"3:wan"
;;
esac
}

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@ -9,14 +9,16 @@ board=$(board_name)
case "$FIRMWARE" in
"ath11k/IPQ5018/hw1.0/caldata.bin")
case "$board" in
redmi,ax3000)
redmi,ax3000|\
xiaomi,cr881x)
caldata_extract "0:ART" 0x1000 0x20000
;;
esac
;;
"ath11k/qcn6122/hw1.0/caldata_1.bin")
case "$board" in
redmi,ax3000)
redmi,ax3000|\
xiaomi,cr881x)
caldata_extract "0:ART" 0x26800 0x20000
;;
esac

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@ -6,7 +6,8 @@ START=99
boot() {
case $(board_name) in
redmi,ax3000)
redmi,ax3000|\
xiaomi,cr881x)
fw_printenv >/dev/null || return 0
local flag_ota_reboot="$(fw_printenv flag_ota_reboot | cut -d'=' -f2)"

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@ -6,7 +6,8 @@ RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'
platform_check_image() {
local board=$(board_name)
case $board in
redmi,ax3000)
redmi,ax3000|\
xiaomi,cr881x)
mi_dualboot_check_image "$1"
return $?
;;
@ -20,7 +21,8 @@ platform_check_image() {
platform_do_upgrade() {
local board=$(board_name)
case $board in
redmi,ax3000)
redmi,ax3000|\
xiaomi,cr881x)
mi_dualboot_do_upgrade "$1"
;;
*)

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@ -825,6 +825,7 @@ CONFIG_MAP_E_SUPPORT=y
CONFIG_ARCH_IPQ256M=y
CONFIG_IPQ_MEM_PROFILE=256
# CONFIG_MTD_UBI_GLUEBI is not set
CONFIG_YT9215_PHY=y
CONFIG_LEDS_GPIO=y
CONFIG_SWCONFIG_LEDS=y

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@ -0,0 +1,500 @@
// SPDX-License-Identifier: (GPL-2.0+)
/dts-v1/;
#include "ipq5018.dtsi"
/ {
model = "Xiaomi CR881x";
compatible = "xiaomi,cr881x", "qcom,ipq5018";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart1;
ethernet0 = &mac0;
ethernet1 = &mac1;
led-boot = &led_system_blue;
led-failsafe = &led_system_red;
led-running = &led_system_blue;
led-upgrade = &led_system_red;
};
chosen {
// Override the root parameter from u-boot
bootargs-append = " root=/dev/ubiblock0_1";
stdout-path = "serial0:115200n8";
};
reserved-memory {
q6_mem_regions: q6_mem_regions@4b000000 {
no-map;
#ifndef CONFIG_ATH11K_MEM_PROFILE_256M
reg = <0x0 0x4b000000 0x0 0x3b00000>;
#else
reg = <0x0 0x4b000000 0x0 0x3000000>;
#endif
};
};
thermal-zones {
status = "ok";
};
};
&tmc_etr {
/delete-property/ memory_region;
};
&qgic_msi_0 {
status = "ok";
};
&qgic_msi_1 {
status = "ok";
};
&tlmm {
blsp_uart0_pins: blsp_uart0_pins {
pins =
"gpio20", // RX
"gpio21"; // TX
function = "blsp0_uart0";
drive-strength = <8>;
bias-disable;
};
qspi_nand_pins: qspi_nand_pins {
clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
data0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
data1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
data2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
data3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio1_pins {
mdc {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds_pins {
led_system_blue {
pins = "gpio24";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_system_red {
pins = "gpio25";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_internet_blue {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_internet_red {
pins = "gpio27";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
button_pins: button_pins {
button_reset {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
button_mesh {
pins = "gpio28";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
};
&blsp1_uart1 {
pinctrl-0 = <&blsp_uart0_pins>;
pinctrl-names = "default";
status = "ok";
};
&qpic_bam {
status = "ok";
};
&nand {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};
&soc {
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_system_blue: led_system_blue {
label = "blue:system";
gpio = <&tlmm 24 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led_system_red: led_system_red {
label = "red:system";
gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
};
led_internet_blue: led_internet_blue {
label = "blue:internet";
gpio = <&tlmm 26 GPIO_ACTIVE_HIGH>;
};
led_internet_red: led_internet_red {
label = "red:internet";
gpio = <&tlmm 27 GPIO_ACTIVE_HIGH>;
};
};
button {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button_reset {
label = "reset";
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
button_mesh {
label = "mesh";
gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_KEY>;
linux,code = <KEY_WPS_BUTTON>;
debounce-interval = <60>;
};
};
ess-instance {
num_devices = <1>;
// Dummy switch, to describe how the external ports connects to the MAC
// For example, some chips have PSGMII ports which combine 5 MAC into
// 1 external port.
// For IPQ50xx, this is used to choose SGMII or SGMII-plus
ess-switch@0x39c00000 {
compatible = "qcom,ess-switch-ipq50xx";
device_id = <0>;
cmnblk_clk = "internal_96MHz";
// MAC1 Mode
switch_mac_mode = <0xc>; // PORT_WRAPPER_SGMII_PLUS
// switch_mac_mode = <0xf>; // PORT_WRAPPER_SGMII_CHANNEL0
qcom,port_phyinfo {
// MAC0 -> GE Phy -> YT9215 Phy4
port@0 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
phy_dac = <0x10 0x10>;
};
// MAC1 ---SGMII---> YT9215 SerDes
port@1 {
port_id = <2>;
forced-speed = <2500>;
forced-duplex = <1>;
};
};
};
};
// MAC0 -> GE Phy
mac0: dp1 {
compatible = "qcom,nss-dp";
device_type = "network";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,mactype = <2>; // GMAC_HAL_TYPE_SYN_GMAC
local-mac-address = [000000000000];
mdio-bus = <&mdio0>;
qcom,phy-mdio-addr = <7>;
phy-mode = "internal";
qcom,link-poll = <1>;
};
// MAC1 ---SGMII---> YT9215 SerDes
mac1: dp2 {
compatible = "qcom,nss-dp";
device_type = "network";
qcom,id = <2>;
reg = <0x39D00000 0x10000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,mactype = <2>; // GMAC_HAL_TYPE_SYN_GMAC
local-mac-address = [000000000000];
phy-mode = "2500base-x";
};
};
&mdio0 {
status = "ok";
// IPQ5018 GE Phy -> YT9215 Phy4
ethernet-phy@0 {
reg = <7>;
};
};
&mdio1 {
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
status = "ok";
};
/ {
// Motorcomm YT9215
yt9215: switch {
compatible = "motorcomm,yt9215-smi";
mdio-bus = <&mdio1>;
mdio-addr = <29>;
switchid = <0>;
reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>; /* 10ms */
reset-deassert-us = <50000>; /* 50ms */
ports {
// MAC0 -> Phy0 -> LAN1
port@0 {
reg = <0>;
};
// MAC1 -> Phy1 -> LAN2
port@1 {
reg = <1>;
};
// MAC2 -> Phy2 -> LAN3
port@2 {
reg = <2>;
};
// MAC3 -> Phy3 -> WAN
port@3 {
reg = <3>;
};
// MAC4 -> Phy4 -> IPQ5018 GE Phy
port@4 {
reg = <4>;
};
// MAC8 ---SGMII+---> IPQ5018 MAC1
port@8 {
reg = <8>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
};
};
};
};
};
&qcom_q6v5_wcss {
qcom,multipd_arch;
memory-region = <&q6_mem_regions>;
qcom,share_bootargs;
qcom,bootargs_smem = <507>;
boot-args = </* type: */ 0x2 /* PCIE1 */
/* length: */ 4
/* PD id: */ 2
/* reset GPIO: */ 18
/* reserved: */ 0 0>;
// IPQ5018
q6v5_wcss_userpd1 {
qca,asid = <1>;
interrupts-extended =
<&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names =
"fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states =
<&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names =
"shutdown",
"stop",
"spawn";
m3_firmware = "IPQ5018/m3_fw.mdt";
qca,auto-restart;
qca,int_radio;
};
// QCN6102
q6v5_wcss_userpd2 {
qca,asid = <2>;
interrupts-extended =
<&wcss_smp2p_in 16 0>,
<&wcss_smp2p_in 17 0>,
<&wcss_smp2p_in 20 0>,
<&wcss_smp2p_in 19 0>;
interrupt-names =
"fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states =
<&wcss_smp2p_out 16>,
<&wcss_smp2p_out 17>,
<&wcss_smp2p_out 18>;
qcom,smem-state-names =
"shutdown",
"stop",
"spawn";
m3_firmware = "qcn6122/m3_fw.mdt";
qca,auto-restart;
};
};
&wifi0 {
// IPQ5018
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,board_id = <0x23>;
qcom,bdf-addr = <0x4c400000 0x4c400000 0x4c400000 0 0>;
#ifndef CONFIG_ATH11K_MEM_PROFILE_256M
qcom,caldb-addr = <0x4d200000>;
m3-dump-addr = <0x4d400000>;
#else
qcom,caldb-addr = <0>;
m3-dump-addr = <0>;
#endif
status = "ok";
};
&wifi1 {
// QCN6102
qcom,multipd_arch;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,board_id = <0x60>;
qcom,bdf-addr = <0x4d500000 0x4d500000 0x4d100000 0 0>;
#ifndef CONFIG_ATH11K_MEM_PROFILE_256M
qcom,caldb-addr = <0x4e500000>;
m3-dump-addr = <0x4ea00000>;
#else
qcom,caldb-addr = <0>;
m3-dump-addr = <0x4df00000>;
#endif
status = "ok";
};

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@ -58,4 +58,22 @@ define Device/redmi_ax3000
endef
TARGET_DEVICES += redmi_ax3000
define Device/xiaomi_cr881x
$(call Device/FitImage)
$(call Device/UbiFit)
SOC := ipq5018
DEVICE_VENDOR := Xiaomi
DEVICE_MODEL := CR881x
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_DTS_CONFIG := config@mp03.3
IMAGES := nand-factory.ubi
DEVICE_PACKAGES := \
ATH11K_MEM_PROFILE_256M \
ath11k-firmware-ipq5018 \
ath11k-firmware-qcn6122 \
ipq-wifi-xiaomi_cr881x
endef
TARGET_DEVICES += xiaomi_cr881x
$(eval $(call BuildImage))

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@ -0,0 +1,26 @@
From 41d22a684adaaa54f379cd087a73aaa1859415fc Mon Sep 17 00:00:00 2001
From: hzy <hzyitc@outlook.com>
Date: Thu, 13 Jun 2024 22:09:57 +0800
Subject: [PATCH 1/1] mtd: rawnand: winbond: add support for W25N01GW
---
drivers/mtd/nand/raw/qcom_nandc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
index b91ef49..bacb221 100644
--- a/drivers/mtd/nand/qcom_nandc.c
+++ b/drivers/mtd/nand/qcom_nandc.c
@@ -72,6 +72,9 @@ struct nand_flash_dev nand_flash_ids[] = {
{"GD5F1GQ5REYIH SPI NAND 1G 1.8V",
{ .id = {0xc8, 0x21} },
SZ_2K, SZ_128, SZ_128K, 0, 2, 64, NAND_ECC_INFO(4, SZ_512), 0},
+ {"W25N01GW SPI NAND 1.8V 1G-BIT",
+ { .id = {0xef, 0xba} },
+ SZ_2K, SZ_128, SZ_128K, 0, 2, 64, NAND_ECC_INFO(4, SZ_512), 0},
{"W25N02JWZEIF SPI NAND 2G 1.8V",
{ .id = {0xef, 0xbf} },
SZ_2K, SZ_256, SZ_128K, 0, 2, 64, NAND_ECC_INFO(4, SZ_512), 0},
--
2.40.1