mirror of
https://github.com/hzyitc/openwrt-redmi-ax3000.git
synced 2025-12-16 08:22:16 +00:00
airoha: an7581: add support for Bell XG-140G-Y003
This commit adds support for Bell XG-140G-Y003 models.
Hardware
--------
SoC: Airoha AN7581
RAM: TN4G16D3CSER-EK (512MB DDR3 1866MHz)
Flash: S35ML02G300 (256M)
ETH: AN7581 GbE Switch (eth0: LAN2, LAN3, LAN4)
EN8811H 2.5GbE PHY (eth1: LAN1)
Installation
------------
1. Connect uart to PC, press enter to login into U-Boot console.
Username: telecomadmin
Password: nE7jA%5m
2. Run the following command to setup bootcmd.
setenv bootcmd 'flash read 0x000c0000 0x880000 $loadaddr && bootm'
saveenv
3. Use a TFTP client to PUT "*-squashfs-factory.bin" to "192.168.1.1".
4. Run the following command to flash.
flash erase 0x000c0000 0x02880000
flash write 0x000c0000 $filesize $loadaddr
5. Reboot.
reset
Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
This commit is contained in:
Ziyang Huang
parent
98b547becf
commit
70e26da6bd
344
target/linux/airoha/dts/an7581-xg-140g-y003.dts
Normal file
344
target/linux/airoha/dts/an7581-xg-140g-y003.dts
Normal file
@ -0,0 +1,344 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/dts-v1/;
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "an7581.dtsi"
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/ {
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model = "Bell XG-140G-Y003";
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compatible = "bell,xg-140g-y003", "airoha,an7581", "airoha,en7581";
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aliases {
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serial0 = &uart1;
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};
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chosen {
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bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro console=ttyS0,115200 earlycon";
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stdout-path = "serial0:115200n8";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x2 0x00000000>;
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};
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leds {
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compatible = "gpio-leds";
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pwr_led: led-0 {
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// label = "blue:power";
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_POWER;
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gpios = <&en7581_pinctrl 17 GPIO_ACTIVE_LOW>;
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};
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led-1 {
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label = "blue:pon";
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&en7581_pinctrl 18 GPIO_ACTIVE_LOW>;
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};
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los_led: led-2 {
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label = "blue:los";
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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gpios = <&en7581_pinctrl 19 GPIO_ACTIVE_LOW>;
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};
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internet_led: led-3 {
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label = "blue:internet";
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&en7581_pinctrl 20 GPIO_ACTIVE_LOW>;
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};
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led-4 {
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label = "blue:fxs";
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_STATUS;
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gpios = <&en7581_pinctrl 33 GPIO_ACTIVE_LOW>;
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};
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};
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buttons {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&en7581_pinctrl 0 GPIO_ACTIVE_LOW>;
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linux,input-type = <EV_KEY>;
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linux,code = <KEY_RESTART>;
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debounce-interval = <60>;
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};
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};
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};
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&en7581_pinctrl {
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gpio-ranges = <&en7581_pinctrl 0 13 47>;
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mdio_pins: mdio-pins {
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mux {
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function = "mdio";
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groups = "mdio";
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};
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conf {
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pins = "gpio2";
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output-high;
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};
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};
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gswp2_led0_pins: gswp2-led0-pins {
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mux {
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pins = "gpio34";
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function = "phy2_led0";
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};
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};
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gswp3_led0_pins: gswp3-led0-pins {
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mux {
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pins = "gpio35";
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function = "phy3_led0";
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};
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};
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gswp4_led0_pins: gswp4-led0-pins {
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mux {
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pins = "gpio42";
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function = "phy4_led0";
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};
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};
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};
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&snfi {
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status = "okay";
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};
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&spi_nand {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootloader";
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reg = <0x00000000 0x00080000>;
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read-only;
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x7c000>;
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};
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partition@7c000 {
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label = "u-boot-env";
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reg = <0x7c000 0x2000>;
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// nvmem-layout {
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// compatible = "u-boot,env";
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// };
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};
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};
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partition@80000 {
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label = "romfile";
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reg = <0x00080000 0x00040000>;
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};
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partition@c0000 {
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label = "nsb_master";
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reg = <0x000c0000 0x02880000>;
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "kernel";
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reg = <0x0 0x880000>;
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};
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partition@880000 {
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compatible = "linux,ubi";
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label = "ubi";
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reg = <0x880000 0x2000000>;
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};
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};
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partition@2940000 {
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label = "nsb_slave";
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reg = <0x02940000 0x02880000>;
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};
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partition@51c0000 {
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label = "bosa";
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reg = <0x051c0000 0x00040000>;
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};
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partition@5200000 {
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label = "ri";
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reg = <0x05200000 0x00040000>;
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};
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partition@5240000 {
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label = "flag";
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reg = <0x05240000 0x00040000>;
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};
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partition@5280000 {
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label = "flagback";
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reg = <0x05280000 0x00040000>;
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};
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partition@52c0000 {
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label = "config";
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reg = <0x052c0000 0x00a00000>;
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};
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partition@5cc0000 {
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label = "framwork1";
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reg = <0x05cc0000 0x01000000>;
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};
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partition@6cc0000 {
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label = "framwork2";
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reg = <0x06cc0000 0x01000000>;
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};
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partition@7cc0000 {
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label = "apps";
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reg = <0x07cc0000 0x060e0000>;
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};
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partition@dda0000 {
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label = "oopsfs";
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reg = <0x0dda0000 0x00400000>;
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};
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partition@e1a0000 {
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label = "log";
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reg = <0x0e1a0000 0x00a00000>;
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};
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};
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};
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&i2c0 {
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status = "okay";
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};
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&npu {
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status = "okay";
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};
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ð {
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status = "okay";
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};
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&gdm1 {
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status = "okay";
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};
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&gdm4 {
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status = "okay";
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phy-handle = <&phy15>;
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phy-mode = "2500base-x";
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label = "lan1";
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};
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&switch {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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ports {
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port@2 {
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status = "okay";
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label = "lan2";
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};
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port@3 {
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status = "okay";
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label = "lan3";
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};
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port@4 {
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status = "okay";
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label = "lan4";
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};
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};
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mdio {
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ethernet-phy@a {
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status = "okay";
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pinctrl-names = "gbe-led";
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pinctrl-0 = <&gswp2_led0_pins>;
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leds {
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led@0 {
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status = "okay";
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active-low;
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_BLUE>;
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};
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};
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};
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ethernet-phy@b {
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status = "okay";
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pinctrl-names = "gbe-led";
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pinctrl-0 = <&gswp3_led0_pins>;
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leds {
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led@0 {
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status = "okay";
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active-low;
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_BLUE>;
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};
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};
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};
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ethernet-phy@c {
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status = "okay";
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pinctrl-names = "gbe-led";
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pinctrl-0 = <&gswp4_led0_pins>;
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leds {
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led@0 {
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status = "okay";
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active-low;
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_BLUE>;
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};
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};
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};
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phy15: ethernet-phy@f {
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/* Airoha EN8811H */
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compatible = "ethernet-phy-id03a2.a411", "ethernet-phy-ieee802.3-c22";
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reg = <15>;
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reset-gpios = <&en7581_pinctrl 31 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <2000000>;
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_BLUE>;
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};
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};
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};
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};
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};
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@ -42,3 +42,22 @@ define Device/airoha_an7581-evb-emmc
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ARTIFACTS := preloader.bin bl31-uboot.fip
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ARTIFACTS := preloader.bin bl31-uboot.fip
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endef
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endef
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TARGET_DEVICES += airoha_an7581-evb-emmc
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TARGET_DEVICES += airoha_an7581-evb-emmc
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define Device/bell_xg-140g-y003
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$(call Device/FitImageLzma)
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DEVICE_VENDOR := Bell
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DEVICE_MODEL := Bell XG-140G-Y003
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DEVICE_DTS := an7581-xg-140g-y003
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KERNEL_SIZE := 8704k
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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IMAGES += factory.bin
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IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi
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IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
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DEVICE_PACKAGES := \
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kmod-phy-airoha-en8811h \
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kmod-gpio-button-hotplug \
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kmod-i2c-an7581 \
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uboot-envtools
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endef
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TARGET_DEVICES += bell_xg-140g-y003
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@ -0,0 +1,88 @@
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From 6d9d6ab3a82af50e36e13e7bc8e2d1b970e39f79 Mon Sep 17 00:00:00 2001
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From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
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Date: Tue, 3 Dec 2024 11:46:49 +0900
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Subject: [PATCH 1/1] mtd: spinand: Introduce a way to avoid raw access
|
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SkyHigh spinand device has ECC enable bit in configuration register but
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it must be always enabled. If ECC is disabled, read and write ops
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results in undetermined state. For such devices, a way to avoid raw
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access is needed.
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Introduce SPINAND_NO_RAW_ACCESS flag to advertise the device does not
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support raw access. In such devices, the on-die ECC engine ops returns
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error to I/O request in raw mode.
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Checking and marking BBM need to be cared as special case, by adding
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fallback mechanism that tries read/write OOB with ECC enabled.
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Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
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Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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---
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drivers/mtd/nand/spi/core.c | 22 ++++++++++++++++++++--
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include/linux/mtd/spinand.h | 1 +
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2 files changed, 21 insertions(+), 2 deletions(-)
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diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
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index 00e1bfa416ce..f46769eda388 100644
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--- a/drivers/mtd/nand/spi/core.c
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+++ b/drivers/mtd/nand/spi/core.c
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||||||
|
@@ -294,6 +294,9 @@ static int spinand_ondie_ecc_prepare_io_req(struct nand_device *nand,
|
||||||
|
struct spinand_device *spinand = nand_to_spinand(nand);
|
||||||
|
bool enable = (req->mode != MTD_OPS_RAW);
|
||||||
|
|
||||||
|
+ if (!enable && spinand->flags & SPINAND_NO_RAW_ACCESS)
|
||||||
|
+ return -EOPNOTSUPP;
|
||||||
|
+
|
||||||
|
memset(spinand->oobbuf, 0xff, nanddev_per_page_oobsize(nand));
|
||||||
|
|
||||||
|
/* Only enable or disable the engine */
|
||||||
|
@@ -901,9 +904,17 @@ static bool spinand_isbad(struct nand_device *nand, const struct nand_pos *pos)
|
||||||
|
.oobbuf.in = marker,
|
||||||
|
.mode = MTD_OPS_RAW,
|
||||||
|
};
|
||||||
|
+ int ret;
|
||||||
|
|
||||||
|
spinand_select_target(spinand, pos->target);
|
||||||
|
- spinand_read_page(spinand, &req);
|
||||||
|
+
|
||||||
|
+ ret = spinand_read_page(spinand, &req);
|
||||||
|
+ if (ret == -EOPNOTSUPP) {
|
||||||
|
+ /* Retry with ECC in case raw access is not supported */
|
||||||
|
+ req.mode = MTD_OPS_PLACE_OOB;
|
||||||
|
+ spinand_read_page(spinand, &req);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
if (marker[0] != 0xff || marker[1] != 0xff)
|
||||||
|
return true;
|
||||||
|
|
||||||
|
@@ -942,7 +953,14 @@ static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
- return spinand_write_page(spinand, &req);
|
||||||
|
+ ret = spinand_write_page(spinand, &req);
|
||||||
|
+ if (ret == -EOPNOTSUPP) {
|
||||||
|
+ /* Retry with ECC in case raw access is not supported */
|
||||||
|
+ req.mode = MTD_OPS_PLACE_OOB;
|
||||||
|
+ ret = spinand_write_page(spinand, &req);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int spinand_mtd_block_markbad(struct mtd_info *mtd, loff_t offs)
|
||||||
|
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
|
||||||
|
index 702e5fb13dae..5cf11005b41a 100644
|
||||||
|
--- a/include/linux/mtd/spinand.h
|
||||||
|
+++ b/include/linux/mtd/spinand.h
|
||||||
|
@@ -314,6 +314,7 @@ struct spinand_ecc_info {
|
||||||
|
#define SPINAND_HAS_CR_FEAT_BIT BIT(1)
|
||||||
|
#define SPINAND_HAS_PROG_PLANE_SELECT_BIT BIT(2)
|
||||||
|
#define SPINAND_HAS_READ_PLANE_SELECT_BIT BIT(3)
|
||||||
|
+#define SPINAND_NO_RAW_ACCESS BIT(4)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* struct spinand_ondie_ecc_conf - private SPI-NAND on-die ECC engine structure
|
||||||
|
--
|
||||||
|
2.40.1
|
||||||
|
|
||||||
@ -0,0 +1,213 @@
|
|||||||
|
From 1a50e3612de9187857f55ee14a573f7f8e7d4ebc Mon Sep 17 00:00:00 2001
|
||||||
|
From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
|
||||||
|
Date: Tue, 3 Dec 2024 11:46:50 +0900
|
||||||
|
Subject: [PATCH] mtd: spinand: Add support for SkyHigh S35ML-3 family
|
||||||
|
|
||||||
|
SkyHigh S35ML01G300, S35ML01G301, S35ML02G300, and S35ML04G300 are 1Gb,
|
||||||
|
2Gb, and 4Gb SLC SPI NAND flash family. This family of devices has
|
||||||
|
on-die ECC which parity bits are stored to hidden area. In this family
|
||||||
|
the on-die ECC cannot be disabled so raw access needs to be prevented.
|
||||||
|
|
||||||
|
Link: https://www.skyhighmemory.com/download/SPI_S35ML01_04G3_002_19205.pdf?v=P
|
||||||
|
Co-developed-by: KR Kim <kr.kim@skyhighmemory.com>
|
||||||
|
Signed-off-by: KR Kim <kr.kim@skyhighmemory.com>
|
||||||
|
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
|
||||||
|
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
||||||
|
---
|
||||||
|
drivers/mtd/nand/spi/Makefile | 2 +-
|
||||||
|
drivers/mtd/nand/spi/core.c | 1 +
|
||||||
|
drivers/mtd/nand/spi/skyhigh.c | 147 +++++++++++++++++++++++++++++++++
|
||||||
|
include/linux/mtd/spinand.h | 1 +
|
||||||
|
4 files changed, 150 insertions(+), 1 deletion(-)
|
||||||
|
create mode 100644 drivers/mtd/nand/spi/skyhigh.c
|
||||||
|
|
||||||
|
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
|
||||||
|
index f725f0c..7fb8e21 100644
|
||||||
|
--- a/drivers/mtd/nand/spi/Makefile
|
||||||
|
+++ b/drivers/mtd/nand/spi/Makefile
|
||||||
|
@@ -1,4 +1,4 @@
|
||||||
|
# SPDX-License-Identifier: GPL-2.0
|
||||||
|
spinand-objs := core.o alliancememory.o ato.o esmt.o etron.o fmsh.o foresee.o gigadevice.o
|
||||||
|
-spinand-objs += macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
|
||||||
|
+spinand-objs += macronix.o micron.o paragon.o skyhigh.o toshiba.o winbond.o xtx.o
|
||||||
|
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
|
||||||
|
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
|
||||||
|
index 8e56ca6..61158d9 100644
|
||||||
|
--- a/drivers/mtd/nand/spi/core.c
|
||||||
|
+++ b/drivers/mtd/nand/spi/core.c
|
||||||
|
@@ -1166,6 +1166,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
|
||||||
|
¯onix_spinand_manufacturer,
|
||||||
|
µn_spinand_manufacturer,
|
||||||
|
¶gon_spinand_manufacturer,
|
||||||
|
+ &skyhigh_spinand_manufacturer,
|
||||||
|
&toshiba_spinand_manufacturer,
|
||||||
|
&winbond_spinand_manufacturer,
|
||||||
|
&xtx_spinand_manufacturer,
|
||||||
|
diff --git a/drivers/mtd/nand/spi/skyhigh.c b/drivers/mtd/nand/spi/skyhigh.c
|
||||||
|
new file mode 100644
|
||||||
|
index 0000000..8b32b74
|
||||||
|
--- /dev/null
|
||||||
|
+++ b/drivers/mtd/nand/spi/skyhigh.c
|
||||||
|
@@ -0,0 +1,147 @@
|
||||||
|
+// SPDX-License-Identifier: GPL-2.0
|
||||||
|
+/*
|
||||||
|
+ * Copyright (c) 2024 SkyHigh Memory Limited
|
||||||
|
+ *
|
||||||
|
+ * Author: Takahiro Kuwano <takahiro.kuwano@infineon.com>
|
||||||
|
+ * Co-Author: KR Kim <kr.kim@skyhighmemory.com>
|
||||||
|
+ */
|
||||||
|
+
|
||||||
|
+#include <linux/device.h>
|
||||||
|
+#include <linux/kernel.h>
|
||||||
|
+#include <linux/mtd/spinand.h>
|
||||||
|
+
|
||||||
|
+#define SPINAND_MFR_SKYHIGH 0x01
|
||||||
|
+#define SKYHIGH_STATUS_ECC_1TO2_BITFLIPS (1 << 4)
|
||||||
|
+#define SKYHIGH_STATUS_ECC_3TO6_BITFLIPS (2 << 4)
|
||||||
|
+#define SKYHIGH_STATUS_ECC_UNCOR_ERROR (3 << 4)
|
||||||
|
+#define SKYHIGH_CONFIG_PROTECT_EN BIT(1)
|
||||||
|
+
|
||||||
|
+static SPINAND_OP_VARIANTS(read_cache_variants,
|
||||||
|
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 4, NULL, 0),
|
||||||
|
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
|
||||||
|
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 2, NULL, 0),
|
||||||
|
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
|
||||||
|
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
|
||||||
|
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
|
||||||
|
+
|
||||||
|
+static SPINAND_OP_VARIANTS(write_cache_variants,
|
||||||
|
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
|
||||||
|
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
|
||||||
|
+
|
||||||
|
+static SPINAND_OP_VARIANTS(update_cache_variants,
|
||||||
|
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
|
||||||
|
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
|
||||||
|
+
|
||||||
|
+static int skyhigh_spinand_ooblayout_ecc(struct mtd_info *mtd, int section,
|
||||||
|
+ struct mtd_oob_region *region)
|
||||||
|
+{
|
||||||
|
+ /* ECC bytes are stored in hidden area. */
|
||||||
|
+ return -ERANGE;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int skyhigh_spinand_ooblayout_free(struct mtd_info *mtd, int section,
|
||||||
|
+ struct mtd_oob_region *region)
|
||||||
|
+{
|
||||||
|
+ if (section)
|
||||||
|
+ return -ERANGE;
|
||||||
|
+
|
||||||
|
+ /* ECC bytes are stored in hidden area. Reserve 2 bytes for the BBM. */
|
||||||
|
+ region->offset = 2;
|
||||||
|
+ region->length = mtd->oobsize - 2;
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static const struct mtd_ooblayout_ops skyhigh_spinand_ooblayout = {
|
||||||
|
+ .ecc = skyhigh_spinand_ooblayout_ecc,
|
||||||
|
+ .free = skyhigh_spinand_ooblayout_free,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+static int skyhigh_spinand_ecc_get_status(struct spinand_device *spinand,
|
||||||
|
+ u8 status)
|
||||||
|
+{
|
||||||
|
+ switch (status & STATUS_ECC_MASK) {
|
||||||
|
+ case STATUS_ECC_NO_BITFLIPS:
|
||||||
|
+ return 0;
|
||||||
|
+
|
||||||
|
+ case SKYHIGH_STATUS_ECC_UNCOR_ERROR:
|
||||||
|
+ return -EBADMSG;
|
||||||
|
+
|
||||||
|
+ case SKYHIGH_STATUS_ECC_1TO2_BITFLIPS:
|
||||||
|
+ return 2;
|
||||||
|
+
|
||||||
|
+ case SKYHIGH_STATUS_ECC_3TO6_BITFLIPS:
|
||||||
|
+ return 6;
|
||||||
|
+
|
||||||
|
+ default:
|
||||||
|
+ break;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ return -EINVAL;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static const struct spinand_info skyhigh_spinand_table[] = {
|
||||||
|
+ SPINAND_INFO("S35ML01G301",
|
||||||
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x15),
|
||||||
|
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
|
||||||
|
+ NAND_ECCREQ(6, 32),
|
||||||
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
||||||
|
+ &write_cache_variants,
|
||||||
|
+ &update_cache_variants),
|
||||||
|
+ SPINAND_NO_RAW_ACCESS,
|
||||||
|
+ SPINAND_ECCINFO(&skyhigh_spinand_ooblayout,
|
||||||
|
+ skyhigh_spinand_ecc_get_status)),
|
||||||
|
+ SPINAND_INFO("S35ML01G300",
|
||||||
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x14),
|
||||||
|
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
|
||||||
|
+ NAND_ECCREQ(6, 32),
|
||||||
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
||||||
|
+ &write_cache_variants,
|
||||||
|
+ &update_cache_variants),
|
||||||
|
+ SPINAND_NO_RAW_ACCESS,
|
||||||
|
+ SPINAND_ECCINFO(&skyhigh_spinand_ooblayout,
|
||||||
|
+ skyhigh_spinand_ecc_get_status)),
|
||||||
|
+ SPINAND_INFO("S35ML02G300",
|
||||||
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x25),
|
||||||
|
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
|
||||||
|
+ NAND_ECCREQ(6, 32),
|
||||||
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
||||||
|
+ &write_cache_variants,
|
||||||
|
+ &update_cache_variants),
|
||||||
|
+ SPINAND_NO_RAW_ACCESS,
|
||||||
|
+ SPINAND_ECCINFO(&skyhigh_spinand_ooblayout,
|
||||||
|
+ skyhigh_spinand_ecc_get_status)),
|
||||||
|
+ SPINAND_INFO("S35ML04G300",
|
||||||
|
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35),
|
||||||
|
+ NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 2, 1, 1),
|
||||||
|
+ NAND_ECCREQ(6, 32),
|
||||||
|
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
||||||
|
+ &write_cache_variants,
|
||||||
|
+ &update_cache_variants),
|
||||||
|
+ SPINAND_NO_RAW_ACCESS,
|
||||||
|
+ SPINAND_ECCINFO(&skyhigh_spinand_ooblayout,
|
||||||
|
+ skyhigh_spinand_ecc_get_status)),
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+static int skyhigh_spinand_init(struct spinand_device *spinand)
|
||||||
|
+{
|
||||||
|
+ /*
|
||||||
|
+ * Config_Protect_En (bit 1 in Block Lock register) must be set to 1
|
||||||
|
+ * before writing other bits. Do it here before core unlocks all blocks
|
||||||
|
+ * by writing block protection bits.
|
||||||
|
+ */
|
||||||
|
+ return spinand_write_reg_op(spinand, REG_BLOCK_LOCK,
|
||||||
|
+ SKYHIGH_CONFIG_PROTECT_EN);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static const struct spinand_manufacturer_ops skyhigh_spinand_manuf_ops = {
|
||||||
|
+ .init = skyhigh_spinand_init,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+const struct spinand_manufacturer skyhigh_spinand_manufacturer = {
|
||||||
|
+ .id = SPINAND_MFR_SKYHIGH,
|
||||||
|
+ .name = "SkyHigh",
|
||||||
|
+ .chips = skyhigh_spinand_table,
|
||||||
|
+ .nchips = ARRAY_SIZE(skyhigh_spinand_table),
|
||||||
|
+ .ops = &skyhigh_spinand_manuf_ops,
|
||||||
|
+};
|
||||||
|
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
|
||||||
|
index 5cf11005b41ae2..cbbcd44ac22565 100644
|
||||||
|
--- a/include/linux/mtd/spinand.h
|
||||||
|
+++ b/include/linux/mtd/spinand.h
|
||||||
|
@@ -268,6 +268,7 @@ extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
|
||||||
|
extern const struct spinand_manufacturer macronix_spinand_manufacturer;
|
||||||
|
extern const struct spinand_manufacturer micron_spinand_manufacturer;
|
||||||
|
extern const struct spinand_manufacturer paragon_spinand_manufacturer;
|
||||||
|
+extern const struct spinand_manufacturer skyhigh_spinand_manufacturer;
|
||||||
|
extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
|
||||||
|
extern const struct spinand_manufacturer winbond_spinand_manufacturer;
|
||||||
|
extern const struct spinand_manufacturer xtx_spinand_manufacturer;
|
||||||
|
--
|
||||||
|
2.40.1
|
||||||
|
|
||||||
Loading…
Reference in New Issue
Block a user