diff --git a/package/kernel/qca-nss-dp/patches/0201-nss_dp_main-Support-fixed-link.patch b/package/kernel/qca-nss-dp/patches/0201-nss_dp_main-Support-fixed-link.patch new file mode 100644 index 0000000000..783059b0e8 --- /dev/null +++ b/package/kernel/qca-nss-dp/patches/0201-nss_dp_main-Support-fixed-link.patch @@ -0,0 +1,37 @@ +From c9cb5a055000cf39f6242ef74d00b2ae0815032e Mon Sep 17 00:00:00 2001 +From: hzy +Date: Wed, 25 Oct 2023 06:14:28 +0800 +Subject: [PATCH] nss_dp_main: Support fixed-link + +Signed-off-by: hzy +--- + nss_dp_main.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/nss_dp_main.c b/nss_dp_main.c +index b9635bc5..d5228a9e 100644 +--- a/nss_dp_main.c ++++ b/nss_dp_main.c +@@ -572,6 +572,19 @@ static int32_t nss_dp_of_get_pdata(struct device_node *np, + } + + dp_priv->phy_node = of_parse_phandle(np, "phy-handle", 0); ++ if(!dp_priv->phy_node) { ++ if(of_phy_is_fixed_link(np)) { ++ int ret = of_phy_register_fixed_link(np); ++ if(ret < 0) { ++ pr_err("%s: fail to register fixed-link: %d\n", np->name, ret); ++ return -EFAULT; ++ } ++ } ++ dp_priv->phy_node = of_node_get(np); ++ } ++ ++ if(!dp_priv->phy_node) ++ pr_err("%s: no phy-handle or fixed-link found\n", np->name); + + if (of_property_read_u32(np, "qcom,mactype", &hal_pdata->mactype)) { + pr_err("%s: error reading mactype\n", np->name); +-- +2.40.1 + diff --git a/package/kernel/qca-ssdk/patches/0201-MP-Fix-DSA-Support.patch b/package/kernel/qca-ssdk/patches/0201-MP-Fix-DSA-Support.patch new file mode 100644 index 0000000000..09af422377 --- /dev/null +++ b/package/kernel/qca-ssdk/patches/0201-MP-Fix-DSA-Support.patch @@ -0,0 +1,26 @@ +From af5fe08c2aa9700dc3de0921c8da9256c21e5bd0 Mon Sep 17 00:00:00 2001 +From: hzy +Date: Wed, 25 Oct 2023 06:14:28 +0800 +Subject: [PATCH] MP: Fix DSA Support + +Signed-off-by: hzy +--- + config | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/config b/config +index a8b97908..4fb7dc62 100755 +--- a/config ++++ b/config +@@ -270,6 +270,8 @@ else ifeq (CPPE, $(CHIP_TYPE)) + else ifeq (DESS, $(CHIP_TYPE)) + IN_MALIBU_PHY=TRUE + else ifeq (MP, $(CHIP_TYPE)) ++ IN_VSI=TRUE ++ IN_CTRLPKT=TRUE + IN_QCA803X_PHY=TRUE + IN_QCA808X_PHY=TRUE + else ifeq (APPE, $(CHIP_TYPE)) +-- +2.40.1 + diff --git a/target/linux/ipq50xx/base-files/etc/board.d/02_network b/target/linux/ipq50xx/base-files/etc/board.d/02_network index f470b45d52..fdb28a491b 100755 --- a/target/linux/ipq50xx/base-files/etc/board.d/02_network +++ b/target/linux/ipq50xx/base-files/etc/board.d/02_network @@ -9,10 +9,7 @@ ipq50xx_setup_interfaces() local board="$1" case $board in redmi,ax3000) - ucidef_add_switch "switch1" \ - "5u@eth0" "6u@eth1" \ - "1:lan:1" "2:lan:2" "3:lan:3" \ - "4:wan" + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan" ;; esac } diff --git a/target/linux/ipq50xx/config-5.15 b/target/linux/ipq50xx/config-5.15 index 5e823a28d4..a1277c0efa 100644 --- a/target/linux/ipq50xx/config-5.15 +++ b/target/linux/ipq50xx/config-5.15 @@ -1309,3 +1309,7 @@ CONFIG_RPMSG_QCOM_GLINK_SMEM=y CONFIG_QCOM_Q6V5_MPD=y CONFIG_ARM_CRYPTO=y + +CONFIG_NET_DSA=y +CONFIG_NET_DSA_QCA8K=y +CONFIG_AT803X_PHY=y diff --git a/target/linux/ipq50xx/dts/ipq5000-ax3000.dts b/target/linux/ipq50xx/dts/ipq5000-ax3000.dts index 6af2781e22..9e3c69a0d4 100644 --- a/target/linux/ipq50xx/dts/ipq5000-ax3000.dts +++ b/target/linux/ipq50xx/dts/ipq5000-ax3000.dts @@ -237,7 +237,7 @@ }; ess-instance { - num_devices = <2>; + num_devices = <1>; // Dummy switch, to describe how the external ports connects to the MAC // For example, some chips have PSGMII ports which combine 5 MAC into @@ -273,70 +273,6 @@ }; }; }; - - // QCA8337 - ess-switch1@1 { - compatible = "qcom,ess-switch-qca83xx"; - device_id = <1>; - - reset_gpio = <26>; - - switch_access_mode = "mdio"; - mdio-bus = <&mdio1>; - - qca,ar8327-initvals = < - 0x000c 0x00000080 // PAD6_MODE = MAC6_SGMII_EN - 0x0010 0x002613a0 // PWS_REG = DEFAULT_VALUE | SERDES_AEN - 0x0094 0x000010ce // PORT6_STATUS = DEFAULT_VALUE | DUPLEX_MODE_6 | RXMAC_EN_6 | - // TXMAC_EN_6 | SPEED_6(1000M) - 0x00e0 0xc74164de // SGMII_CTRL = DEFAULT_VALUE | MODE_CTRL_25M(SGMII_PHY) | SGMII_EN_SD | - // SGMII_EN_TX | SGMII_EN_RX | SGMII_EN_PLL - >; - - switch_cpu_bmp = <0x60>; // CPU port bitmap: 5 6 - switch_lan_bmp = <0x0e>; // LAN port bitmap: 1 2 3 - switch_wan_bmp = <0x10>; // WAN port bitmap: 4 - - qcom,port_phyinfo { - // MAC1 -> Phy0 -> LAN1 - port@1 { - port_id = <1>; - phy_address = <0>; - }; - - // MAC2 -> Phy1 -> LAN2 - port@2 { - port_id = <2>; - phy_address = <1>; - }; - - // MAC3 -> Phy2 -> LAN3 - port@3 { - port_id = <3>; - phy_address = <2>; - }; - - // MAC4 -> Phy3 -> WAN - port@4 { - port_id = <4>; - phy_address = <3>; - }; - - // MAC5 -> Phy4 -> IPQ5000 GE Phy - port@5 { - port_id = <5>; - phy_address = <4>; - }; - - // MAC6 ---SGMII---> IPQ5000 MAC1 - port@6 { - port_id = <6>; - - forced-speed = <1000>; - forced-duplex = <1>; - }; - }; - }; }; // MAC0 -> GE Phy @@ -370,6 +306,11 @@ qcom,mactype = <2>; // GMAC_HAL_TYPE_SYN_GMAC local-mac-address = [000000000000]; phy-mode = "sgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + }; }; }; @@ -393,29 +334,87 @@ reset-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; // QCA8337 Phy0 -> LAN1 - ethernet-phy@0 { + qca8337_0: ethernet-phy@0 { reg = <0>; }; // QCA8337 Phy1 -> LAN2 - ethernet-phy@1 { + qca8337_1: ethernet-phy@1 { reg = <1>; }; // QCA8337 Phy2 -> LAN3 - ethernet-phy@2 { + qca8337_2: ethernet-phy@2 { reg = <2>; }; // QCA8337 Phy3 -> WAN - ethernet-phy@3 { + qca8337_3: ethernet-phy@3 { reg = <3>; }; // QCA8337 Phy4 -> IPQ5018 GE Phy - ethernet-phy@4 { + qca8337_4: ethernet-phy@4 { reg = <4>; }; + + + // QCA8337 switch + switch0: ethernet-switch@17 { + compatible = "qca,qca8337"; + #address-cells = <1>; + #size-cells = <0>; + + reg = <17>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + switch0cpu: port@0 { + reg = <0>; + label = "cpu"; + phy-mode = "sgmii"; + ethernet = <&mac1>; + qca,sgmii-enable-pll; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-handle = <&qca8337_0>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-handle = <&qca8337_1>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-handle = <&qca8337_2>; + }; + + port@4 { + reg = <4>; + label = "wan"; + phy-handle = <&qca8337_3>; + }; + + port@5 { + reg = <5>; + label = "cpu2"; + phy-handle = <&qca8337_4>; + }; + }; + }; }; &q6v5_wcss {