From 1b4d56e98b31c26648209291a3747fe27ee8707a Mon Sep 17 00:00:00 2001 From: hzy Date: Fri, 17 Mar 2023 21:46:49 +0000 Subject: [PATCH 2/4] arm64: dts: qcom: ipq5018: Add smem node Signed-off-by: hzy --- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi index 5389f90fb46c..6d0746e0486c 100644 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi @@ -108,12 +108,29 @@ no-map; }; + smem_region:smem@4ab00000 { + no-map; + reg = <0x0 0x4ab00000 0x0 0x00100000>; + }; + tz: tz@4ac00000 { reg = <0x0 0x4ac00000 0x0 0x00400000>; no-map; }; }; + tcsr_mutex: hwlock { + compatible = "qcom,tcsr-mutex"; + syscon = <&tcsr_mutex_regs 0 0x80>; + #hwlock-cells = <1>; + }; + + smem { + compatible = "qcom,smem"; + memory-region = <&smem_region>; + hwlocks = <&tcsr_mutex 0>; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; @@ -153,6 +170,11 @@ reg = <0x0193d100 0x4>; }; + tcsr_mutex_regs: syscon@1905000 { + compatible = "syscon"; + reg = <0x01905000 0x8000>; + }; + blsp1_uart1: serial@78af000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x078af000 0x200>; -- 2.25.1