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https://github.com/hzyitc/openwrt-redmi-ax3000.git
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00d61da588
Add support for qcom remoteproc WCSS secure PIL driver. Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/20928 Signed-off-by: Robert Marko <robimarko@gmail.com>
65 lines
2.4 KiB
Diff
65 lines
2.4 KiB
Diff
From 9d67219c941458fd26eb474d25f9a6b2525876ca Mon Sep 17 00:00:00 2001
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From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
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Date: Tue, 21 Oct 2025 15:38:28 +0400
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Subject: [PATCH v6 1/8] firmware: qcom_scm: ipq5332: add support to pass metadata size
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MIME-Version: 1.0
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Content-Type: text/plain; charset="utf-8"
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Content-Transfer-Encoding: 7bit
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Message-Id: <20251021-ipq5018-wifi-v6-1-c55c547df6fc@outlook.com>
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IPQ5332 security software running under trustzone requires metadata size.
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With new command support added in TrustZone that includes a size parameter,
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pass metadata size as well.
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Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
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Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
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Signed-off-by: Gokul Sriram Palanisamy <gokul.sriram.p@oss.qualcomm.com>
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---
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drivers/firmware/qcom/qcom_scm.c | 17 +++++++++++++----
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drivers/firmware/qcom/qcom_scm.h | 1 +
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2 files changed, 14 insertions(+), 4 deletions(-)
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--- a/drivers/firmware/qcom/qcom_scm.c
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+++ b/drivers/firmware/qcom/qcom_scm.c
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@@ -583,9 +583,6 @@ int qcom_scm_pas_init_image(u32 peripher
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int ret;
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struct qcom_scm_desc desc = {
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.svc = QCOM_SCM_SVC_PIL,
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- .cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE,
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- .arginfo = QCOM_SCM_ARGS(2, QCOM_SCM_VAL, QCOM_SCM_RW),
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- .args[0] = peripheral,
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.owner = ARM_SMCCC_OWNER_SIP,
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};
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struct qcom_scm_res res;
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@@ -617,7 +614,19 @@ int qcom_scm_pas_init_image(u32 peripher
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if (ret)
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goto disable_clk;
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- desc.args[1] = mdata_phys;
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+ if (__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL,
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+ QCOM_SCM_PIL_PAS_INIT_IMAGE_V2)) {
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+ desc.cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE_V2;
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+ desc.arginfo = QCOM_SCM_ARGS(3, QCOM_SCM_VAL, QCOM_SCM_RW, QCOM_SCM_VAL);
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+ desc.args[0] = peripheral;
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+ desc.args[1] = mdata_phys;
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+ desc.args[2] = size;
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+ } else {
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+ desc.cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE;
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+ desc.arginfo = QCOM_SCM_ARGS(2, QCOM_SCM_VAL, QCOM_SCM_RW);
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+ desc.args[0] = peripheral;
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+ desc.args[1] = mdata_phys;
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+ }
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ret = qcom_scm_call(__scm->dev, &desc, &res);
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qcom_scm_bw_disable();
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--- a/drivers/firmware/qcom/qcom_scm.h
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+++ b/drivers/firmware/qcom/qcom_scm.h
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@@ -101,6 +101,7 @@ struct qcom_tzmem_pool *qcom_scm_get_tzm
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#define QCOM_SCM_PIL_PAS_SHUTDOWN 0x06
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#define QCOM_SCM_PIL_PAS_IS_SUPPORTED 0x07
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#define QCOM_SCM_PIL_PAS_MSS_RESET 0x0a
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+#define QCOM_SCM_PIL_PAS_INIT_IMAGE_V2 0x1a
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#define QCOM_SCM_SVC_IO 0x05
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#define QCOM_SCM_IO_READ 0x01
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