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00d61da588
Add support for qcom remoteproc WCSS secure PIL driver. Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/20928 Signed-off-by: Robert Marko <robimarko@gmail.com>
23 lines
1019 B
Diff
23 lines
1019 B
Diff
From: George Moussalem <george.moussalem@outlook.com>
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Date: Fri, 30 May 2025 09:12:23 +0400
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Subject: [PATCH] clk: qcom: gcc-ipq5018: fix UNIPHY soft reset issue
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The SOFT reset is supposed to trigger a resets across the SYS, RX, and
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TX lines of the IPQ5018 UNIPHY. So let's set the bitmask of the reset
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definition accordingly in the GCC as per the downstream driver.
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Link: https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/036bdc62aca561e8ff94a29c447fc400de2b7304
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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--- a/drivers/clk/qcom/gcc-ipq5018.c
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+++ b/drivers/clk/qcom/gcc-ipq5018.c
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@@ -3648,7 +3648,7 @@ static const struct qcom_reset_map gcc_i
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[GCC_UNIPHY_SYS_ARES] = { 0x56104, 1 },
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[GCC_UNIPHY_RX_ARES] = { 0x56104, 4 },
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[GCC_UNIPHY_TX_ARES] = { 0x56104, 5 },
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- [GCC_UNIPHY_SOFT_RESET] = {0x56104, 0 },
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+ [GCC_UNIPHY_SOFT_RESET] = {0x56104, .bitmask = 0x32 },
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[GCC_USB0_BCR] = { 0x3e070, 0 },
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[GCC_USB0_PHY_BCR] = { 0x3e034, 0 },
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[GCC_WCSS_BCR] = { 0x18000, 0 },
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