mirror of
https://github.com/hzyitc/openwrt-redmi-ax3000.git
synced 2025-12-16 16:31:57 +00:00
62 lines
1.8 KiB
Diff
62 lines
1.8 KiB
Diff
From b9dde0c1cfad5e09d5be5248aeeda2941ec8e02b Mon Sep 17 00:00:00 2001
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From: hzy <hzyitc@outlook.com>
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Date: Mon, 20 Mar 2023 19:55:51 +0000
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Subject: [PATCH 1/3] net: mdio: ipq4019: Add phy reset support
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Signed-off-by: hzy <hzyitc@outlook.com>
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---
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drivers/net/phy/mdio-ipq4019.c | 16 ++++++++++++++++
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1 file changed, 16 insertions(+)
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diff --git a/drivers/net/mdio/mdio-ipq4019.c b/drivers/net/mdio/mdio-ipq4019.c
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index 7227917755cc..59a37e4378ea 100644
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--- a/drivers/net/mdio/mdio-ipq4019.c
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+++ b/drivers/net/mdio/mdio-ipq4019.c
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@@ -12,6 +12,7 @@
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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+#include <linux/reset.h>
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#define MDIO_MODE_REG 0x40
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#define MDIO_ADDR_REG 0x44
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@@ -41,6 +42,7 @@ struct ipq4019_mdio_data {
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void __iomem *membase;
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void __iomem *eth_ldo_rdy;
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struct clk *mdio_clk;
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+ struct reset_control *phy_reset;
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};
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static int ipq4019_mdio_wait_busy(struct mii_bus *bus)
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@@ -195,6 +197,13 @@ static int ipq_mdio_reset(struct mii_bus *bus)
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fsleep(IPQ_PHY_SET_DELAY_US);
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}
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+ if (priv->phy_reset) {
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+ reset_control_assert(priv->phy_reset);
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+ fsleep(IPQ_PHY_SET_DELAY_US);
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+ reset_control_deassert(priv->phy_reset);
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+ fsleep(IPQ_PHY_SET_DELAY_US);
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+ }
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+
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/* Configure MDIO clock source frequency if clock is specified in the device tree */
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ret = clk_set_rate(priv->mdio_clk, IPQ_MDIO_CLK_RATE);
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if (ret)
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@@ -229,6 +238,13 @@ static int ipq4019_mdio_probe(struct platform_device *pdev)
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if (res)
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priv->eth_ldo_rdy = devm_ioremap_resource(&pdev->dev, res);
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+ priv->phy_reset = devm_reset_control_get_optional(&pdev->dev, "phy");
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+ if (IS_ERR(priv->phy_reset)) {
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+ if (PTR_ERR(priv->phy_reset) == -EPROBE_DEFER)
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+ return PTR_ERR(priv->phy_reset);
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+ priv->phy_reset = NULL;
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+ }
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+
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bus->name = "ipq4019_mdio";
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bus->read = ipq4019_mdio_read;
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bus->write = ipq4019_mdio_write;
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--
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2.25.1
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