mirror of
https://github.com/hzyitc/openwrt-redmi-ax3000.git
synced 2025-12-16 08:22:16 +00:00
512 lines
9.2 KiB
Plaintext
512 lines
9.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+)
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/dts-v1/;
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#include "ipq5018.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Xiaomi CR881x";
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compatible = "xiaomi,cr881x", "qcom,ipq5018";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&intc>;
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aliases {
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serial0 = &blsp1_uart1;
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ethernet0 = &mac0;
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ethernet1 = &mac1;
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led-boot = &led_system_blue;
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led-failsafe = &led_system_red;
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led-running = &led_system_blue;
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led-upgrade = &led_system_red;
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};
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chosen {
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// Override the root parameter from u-boot
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// Increase coherent_pool size for WiFi
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bootargs-append = " root=/dev/ubiblock0_1 coherent_pool=2M";
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stdout-path = "serial0:115200n8";
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};
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reserved-memory {
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// Not sure why but without this, WiFi will crash
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tz_apps@4a400000 {
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no-map;
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// The size is incorrent, but it works
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reg = <0x0 0x4a400000 0x0 0x700000>;
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};
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q6_mem_regions: q6_mem_regions@4b000000 {
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no-map;
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// reg = <0x0 0x4b000000 0x0 0x3b00000>;
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reg = <0x0 0x4b000000 0x0 0x3000000>;
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};
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};
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thermal-zones {
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status = "ok";
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};
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};
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&tlmm {
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blsp_uart0_pins: blsp_uart0_pins {
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pins =
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"gpio20", // RX
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"gpio21"; // TX
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function = "blsp0_uart0";
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drive-strength = <8>;
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bias-disable;
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};
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qspi_nand_pins: qspi_nand_pins {
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clock {
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pins = "gpio9";
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function = "qspi_clk";
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drive-strength = <8>;
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bias-disable;
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};
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cs {
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pins = "gpio8";
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function = "qspi_cs";
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drive-strength = <8>;
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bias-disable;
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};
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data0 {
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pins = "gpio7";
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function = "qspi0";
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drive-strength = <8>;
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bias-disable;
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};
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data1 {
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pins = "gpio6";
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function = "qspi1";
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drive-strength = <8>;
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bias-disable;
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};
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data2 {
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pins = "gpio5";
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function = "qspi2";
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drive-strength = <8>;
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bias-disable;
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};
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data3 {
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pins = "gpio4";
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function = "qspi3";
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drive-strength = <8>;
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bias-disable;
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};
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};
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mdio1_pins: mdio1_pins {
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mdc {
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pins = "gpio36";
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function = "mdc";
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drive-strength = <8>;
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bias-pull-up;
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};
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mdio {
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pins = "gpio37";
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function = "mdio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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leds_pins: leds_pins {
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led_system_blue {
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pins = "gpio24";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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led_system_red {
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pins = "gpio25";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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led_internet_blue {
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pins = "gpio26";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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led_internet_red {
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pins = "gpio27";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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};
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button_pins: button_pins {
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button_reset {
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pins = "gpio38";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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button_mesh {
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pins = "gpio28";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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};
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&blsp1_uart1 {
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pinctrl-0 = <&blsp_uart0_pins>;
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pinctrl-names = "default";
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status = "ok";
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};
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&qpic_bam {
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status = "ok";
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};
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&nand {
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pinctrl-0 = <&qspi_nand_pins>;
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pinctrl-names = "default";
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status = "ok";
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};
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&soc {
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&leds_pins>;
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pinctrl-names = "default";
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led_system_blue: led_system_blue {
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label = "blue:system";
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gpio = <&tlmm 24 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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led_system_red: led_system_red {
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label = "red:system";
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gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
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};
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led_internet_blue: led_internet_blue {
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label = "blue:internet";
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gpio = <&tlmm 26 GPIO_ACTIVE_HIGH>;
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};
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led_internet_red: led_internet_red {
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label = "red:internet";
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gpio = <&tlmm 27 GPIO_ACTIVE_HIGH>;
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};
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};
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button {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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button_reset {
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label = "reset";
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gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
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linux,input-type = <EV_KEY>;
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linux,code = <KEY_RESTART>;
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debounce-interval = <60>;
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};
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button_mesh {
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label = "mesh";
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gpios = <&tlmm 28 GPIO_ACTIVE_LOW>;
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linux,input-type = <EV_KEY>;
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linux,code = <KEY_WPS_BUTTON>;
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debounce-interval = <60>;
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};
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};
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ess-instance {
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num_devices = <1>;
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// Dummy switch, to describe how the external ports connects to the MAC
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// For example, some chips have PSGMII ports which combine 5 MAC into
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// 1 external port.
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// For IPQ50xx, this is used to choose SGMII or SGMII-plus
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ess-switch@0x39c00000 {
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compatible = "qcom,ess-switch-ipq50xx";
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device_id = <0>;
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cmnblk_clk = "internal_96MHz";
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// MAC1 Mode
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switch_mac_mode = <0xc>; // PORT_WRAPPER_SGMII_PLUS
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// switch_mac_mode = <0xf>; // PORT_WRAPPER_SGMII_CHANNEL0
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qcom,port_phyinfo {
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// MAC0 -> GE Phy -> YT9215 Phy4
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port@0 {
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port_id = <1>;
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mdiobus = <&mdio0>;
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phy_address = <7>;
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phy_dac = <0x10 0x10>;
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};
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// MAC1 ---SGMII---> YT9215 SerDes
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port@1 {
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port_id = <2>;
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forced-speed = <2500>;
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forced-duplex = <1>;
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};
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};
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};
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};
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// MAC0 -> GE Phy
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mac0: dp1 {
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compatible = "qcom,nss-dp";
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device_type = "network";
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qcom,id = <1>;
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reg = <0x39C00000 0x10000>;
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interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
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clock-names = "nss-snoc-gmac-axi-clk";
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qcom,mactype = <2>; // GMAC_HAL_TYPE_SYN_GMAC
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local-mac-address = [000000000000];
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phy-handle = <&ge_phy>;
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phy-mode = "internal";
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};
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// MAC1 ---SGMII---> YT9215 SerDes
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mac1: dp2 {
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compatible = "qcom,nss-dp";
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device_type = "network";
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qcom,id = <2>;
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reg = <0x39D00000 0x10000>;
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interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_SNOC_GMAC1_AXI_CLK>;
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clock-names = "nss-snoc-gmac-axi-clk";
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qcom,mactype = <2>; // GMAC_HAL_TYPE_SYN_GMAC
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local-mac-address = [000000000000];
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phy-mode = "2500base-x";
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};
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};
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&mdio0 {
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status = "ok";
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resets = <&gcc GCC_GEPHY_MDC_SW_ARES>;
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reset-names = "phy";
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// IPQ5018 GE Phy -> YT9215 Phy4
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ge_phy: ethernet-phy@0 {
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reg = <7>;
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};
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};
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&mdio1 {
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pinctrl-0 = <&mdio1_pins>;
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pinctrl-names = "default";
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status = "ok";
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// Motorcomm YT9215
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yt9215: switch@1d {
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compatible = "motorcomm,yt9215-smi";
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reg = <29>;
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switchid = <0>;
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reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>; /* 10ms */
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reset-deassert-us = <50000>; /* 50ms */
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ports {
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// MAC0 -> Phy0 -> LAN1
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port@0 {
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reg = <0>;
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};
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// MAC1 -> Phy1 -> LAN2
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port@1 {
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reg = <1>;
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};
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// MAC2 -> Phy2 -> LAN3
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port@2 {
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reg = <2>;
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};
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// MAC3 -> Phy3 -> WAN
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port@3 {
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reg = <3>;
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};
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// MAC4 -> Phy4 -> IPQ5018 GE Phy
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port@4 {
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reg = <4>;
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};
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// MAC8 ---SGMII+---> IPQ5018 MAC1
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port@8 {
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reg = <8>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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};
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};
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};
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};
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};
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&q6v5_wcss {
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memory-region = <&q6_mem_regions>;
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qcom,rproc = <&q6v5_wcss>;
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firmware = "IPQ5018/q6_fw.mdt";
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qcom,bootargs_smem = <507>;
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boot-args = </* type: */ 0x2 /* PCIE1 */
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/* length: */ 4
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/* PD id: */ 2
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/* reset GPIO: */ 18
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/* reserved: */ 0 0>;
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status = "ok";
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// IPQ5018
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q6_wcss_pd1: remoteproc_pd1@4ab000 {
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compatible = "qcom,ipq5018-wcss-ahb-mpd";
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resets =
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<&gcc GCC_WCSSAON_RESET>,
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<&gcc GCC_WCSS_BCR>,
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<&gcc GCC_CE_BCR>;
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reset-names =
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"wcss_aon_reset",
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"wcss_reset",
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"ce_reset";
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clocks =
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<&gcc GCC_WCSS_AHB_S_CLK>,
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<&gcc GCC_WCSS_ACMT_CLK>,
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<&gcc GCC_WCSS_AXI_M_CLK>;
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clock-names =
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"gcc_wcss_ahb_s_clk",
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"gcc_wcss_acmt_clk",
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"gcc_wcss_axi_m_clk";
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reg = <0x4ab000 0x20>;
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reg-names = "rmb";
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// qcom,halt-regs = <&tcsr_q6_block 0xa000 0xd000 0x0>;
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interrupts-extended =
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<&wcss_smp2p_in 8 0>,
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<&wcss_smp2p_in 9 0>,
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<&wcss_smp2p_in 12 0>,
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<&wcss_smp2p_in 11 0>;
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interrupt-names =
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"fatal",
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"ready",
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"spawn-ack",
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"stop-ack";
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qcom,smem-states =
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<&wcss_smp2p_out 8>,
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<&wcss_smp2p_out 9>,
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<&wcss_smp2p_out 10>;
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qcom,smem-state-names =
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"shutdown",
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"stop",
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"spawn";
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firmware = "IPQ5018/q6_fw.mdt";
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m3_firmware = "IPQ5018/m3_fw.mdt";
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};
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// QCN6102
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q6_wcss_pd2: remoteproc_pd2 {
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compatible = "qcom,ipq5018-wcss-pcie-mpd";
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interrupts-extended =
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<&wcss_smp2p_in 16 0>,
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<&wcss_smp2p_in 17 0>,
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<&wcss_smp2p_in 20 0>,
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<&wcss_smp2p_in 19 0>;
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interrupt-names =
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"fatal",
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"ready",
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"spawn-ack",
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"stop-ack";
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qcom,smem-states =
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<&wcss_smp2p_out 16>,
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<&wcss_smp2p_out 17>,
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<&wcss_smp2p_out 18>;
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qcom,smem-state-names =
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"shutdown",
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"stop",
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"spawn";
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firmware = "IPQ5018/q6_fw.mdt";
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m3_firmware = "qcn6122/m3_fw.mdt";
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};
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};
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&wifi0 {
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// IPQ5018
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qcom,multipd_arch;
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qcom,rproc = <&q6_wcss_pd1>;
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qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
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qcom,board_id = <0x23>;
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// qcom,ath11k-fw-memory-mode = <0>;
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// qcom,bdf-addr = <0x4c400000>;
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// qcom,caldb-addr = <0x4d200000>;
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// qcom,m3-dump-addr = <0x4d400000>;
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qcom,ath11k-fw-memory-mode = <2>;
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qcom,bdf-addr = <0x4c400000>;
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status = "ok";
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};
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&wifi1 {
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// QCN6102
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qcom,multipd_arch;
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qcom,rproc = <&q6_wcss_pd2>;
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qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
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qcom,board_id = <0x60>;
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// qcom,ath11k-fw-memory-mode = <0>;
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// qcom,bdf-addr = <0x4d500000>;
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// qcom,caldb-addr = <0x4e500000>;
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// qcom,m3-dump-addr = <0x4ea00000>;
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qcom,ath11k-fw-memory-mode = <2>;
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qcom,bdf-addr = <0x4d100000>;
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qcom,m3-dump-addr = <0x4df00000>;
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status = "ok";
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};
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