mirror of
https://github.com/hzyitc/openwrt-redmi-ax3000.git
synced 2025-12-19 01:42:57 +00:00
134 lines
4.1 KiB
Diff
134 lines
4.1 KiB
Diff
From 424c7e86813fc1395ab95f67e0ccd5db314fbca5 Mon Sep 17 00:00:00 2001
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From: hzy <hzyitc@outlook.com>
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Date: Tue, 7 Mar 2023 14:41:05 +0000
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Subject: [PATCH 1/4] firmware: qcom_scm: Add necessary function to load userpd
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Signed-off-by: hzy <hzyitc@outlook.com>
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---
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drivers/firmware/qcom_scm.c | 79 +++++++++++++++++++++++++++++++++++++
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drivers/firmware/qcom_scm.h | 3 ++
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include/linux/qcom_scm.h | 3 ++
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3 files changed, 85 insertions(+)
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diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
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index a85466cfda58..02aa599ebdcf 100644
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--- a/drivers/firmware/qcom_scm.c
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+++ b/drivers/firmware/qcom_scm.c
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@@ -651,6 +651,85 @@ static const struct reset_control_ops qcom_scm_pas_reset_ops = {
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.deassert = qcom_scm_pas_reset_deassert,
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};
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+/**
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+ * qcom_scm_pas_power_up() - Bring up internal radio userpd
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+ * @peripheral: peripheral id
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+ *
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+ * Return 0 on success.
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+ */
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+int qcom_scm_pas_power_up(u32 peripheral)
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+{
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+ struct qcom_scm_desc desc = {
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+ .svc = QCOM_SCM_SVC_PIL,
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+ .cmd = QCOM_SCM_PIL_PAS_POWER_UP,
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+ .arginfo = QCOM_SCM_ARGS(1),
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+ .args[0] = peripheral,
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+ .owner = ARM_SMCCC_OWNER_SIP,
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+ };
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+ struct qcom_scm_res res;
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+ int ret;
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+
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+ ret = qcom_scm_call(__scm->dev, &desc, &res);
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+
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+ return ret ? : res.result[0];
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+}
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+EXPORT_SYMBOL(qcom_scm_pas_power_up);
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+
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+/**
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+ * qcom_scm_pas_power_down() - Shut down internal radio userpd
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+ * @peripheral: peripheral id
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+ *
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+ * Returns 0 on success.
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+ */
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+int qcom_scm_pas_power_down(u32 peripheral)
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+{
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+ struct qcom_scm_desc desc = {
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+ .svc = QCOM_SCM_SVC_PIL,
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+ .cmd = QCOM_SCM_PIL_PAS_POWER_DOWN,
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+ .arginfo = QCOM_SCM_ARGS(1),
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+ .args[0] = peripheral,
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+ .owner = ARM_SMCCC_OWNER_SIP,
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+ };
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+ struct qcom_scm_res res;
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+ int ret;
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+
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+ ret = qcom_scm_call(__scm->dev, &desc, &res);
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+
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+ return ret ? : res.result[0];
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+}
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+EXPORT_SYMBOL(qcom_scm_pas_power_down);
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+
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+/**
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+ * qcom_scm_pas_load_seg() - copy userpd PIL segments data to dma blocks
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+ * @peripheral: peripheral id
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+ * @phno: program header no
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+ * @dma: handle of dma region
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+ * @seg_cnt: no of dma blocks
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+ *
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+ * Returns 0 if trustzone successfully loads userpd PIL segments from dma
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+ * blocks to DDR
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+ */
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+int qcom_scm_pas_load_seg(u32 peripheral, int phno, dma_addr_t dma, int seg_cnt)
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+{
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+ struct qcom_scm_desc desc = {
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+ .svc = QCOM_SCM_SVC_PIL,
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+ .cmd = QCOM_SCM_PIL_PAS_LOAD_SEG,
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+ .arginfo = QCOM_SCM_ARGS(4, QCOM_SCM_VAL, QCOM_SCM_VAL, QCOM_SCM_RW, QCOM_SCM_VAL),
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+ .args[0] = peripheral,
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+ .args[1] = phno,
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+ .args[2] = dma,
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+ .args[3] = seg_cnt,
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+ .owner = ARM_SMCCC_OWNER_SIP,
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+ };
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+ struct qcom_scm_res res;
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+ int ret;
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+
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+ ret = qcom_scm_call(__scm->dev, &desc, &res);
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+
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+ return ret ? : res.result[0];
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+}
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+EXPORT_SYMBOL(qcom_scm_pas_load_seg);
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+
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int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val)
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{
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struct qcom_scm_desc desc = {
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diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
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index 343ba3a470b5..eb5268308f2b 100644
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--- a/drivers/firmware/qcom_scm.h
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+++ b/drivers/firmware/qcom_scm.h
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@@ -86,6 +86,9 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
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#define QCOM_SCM_PIL_PAS_SHUTDOWN 0x06
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#define QCOM_SCM_PIL_PAS_IS_SUPPORTED 0x07
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#define QCOM_SCM_PIL_PAS_MSS_RESET 0x0a
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+#define QCOM_SCM_PIL_PAS_POWER_UP 0x17
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+#define QCOM_SCM_PIL_PAS_POWER_DOWN 0x18
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+#define QCOM_SCM_PIL_PAS_LOAD_SEG 0x19
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#define QCOM_SCM_SVC_IO 0x05
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#define QCOM_SCM_IO_READ 0x01
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diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
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index 081dfc69eb8b..503a05f5e629 100644
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--- a/include/linux/qcom_scm.h
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+++ b/include/linux/qcom_scm.h
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@@ -49,6 +49,9 @@ extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
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extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
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extern int qcom_scm_pas_shutdown(u32 peripheral);
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extern bool qcom_scm_pas_supported(u32 peripheral);
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+extern int qcom_scm_pas_power_up(u32 peripheral);
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+extern int qcom_scm_pas_power_down(u32 peripheral);
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+extern int qcom_scm_pas_load_seg(u32 peripheral, int phno, dma_addr_t dma, int seg_cnt);
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extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
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extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
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--
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2.25.1
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