mirror of
https://github.com/Telecominfraproject/wlan-ap.git
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qca-wifi-7: Add Zyxel NWA210BE model
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
This commit is contained in:
Jimmy Cheng
YenLin Pan
parent
f6dbae7866
commit
c9b4c7e250
2
.github/workflows/build-dev.yml
vendored
2
.github/workflows/build-dev.yml
vendored
@ -21,7 +21,7 @@ jobs:
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strategy:
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fail-fast: false
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matrix:
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target: [ 'cig_wf189h', 'cig_wf189w', 'cig_wf660a', 'cig_wf672', 'cig_wf186h', 'cig_wf186w', 'cig_wf188n', 'cig_wf189', 'cig_wf196', 'cig_wf196', 'cybertan_eww631-a1', 'cybertan_eww631-b1', 'sonicfi_rap630w-312g', 'sonicfi_rap63xc-211g', 'sonicfi_rap630c-311g', 'sonicfi_rap630w-311g', 'sonicfi_rap630w-211g', 'sonicfi_rap650c', 'sonicfi_rap7110c-341x', 'sonicfi_rap750e-h', 'sonicfi_rap750e-s', 'sonicfi_rap750w-311a', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'edgecore_eap105', 'edgecore_eap111', 'edgecore_eap112', 'edgecore_oap101', 'edgecore_oap101-6e', 'edgecore_oap101e', 'edgecore_oap101e-6e', 'edgecore_oap103', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4x_3', 'hfcl_ion4xi_w', 'hfcl_ion4x_w', 'indio_um-305ax', 'senao_iap4300m', 'senao_iap2300m', 'senao_jeap6500', 'udaya_a6-id2', 'udaya_a6-od2', 'yuncore_ax820', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655', 'emplus_wap588m', 'zyxel_nwa130be', 'sercomm_ap72tip-v4' ]
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target: [ 'cig_wf189h', 'cig_wf189w', 'cig_wf660a', 'cig_wf672', 'cig_wf186h', 'cig_wf186w', 'cig_wf188n', 'cig_wf189', 'cig_wf196', 'cig_wf196', 'cybertan_eww631-a1', 'cybertan_eww631-b1', 'sonicfi_rap630w-312g', 'sonicfi_rap63xc-211g', 'sonicfi_rap630c-311g', 'sonicfi_rap630w-311g', 'sonicfi_rap630w-211g', 'sonicfi_rap650c', 'sonicfi_rap7110c-341x', 'sonicfi_rap750e-h', 'sonicfi_rap750e-s', 'sonicfi_rap750w-311a', 'edgecore_eap101', 'edgecore_eap102', 'edgecore_eap104', 'edgecore_eap105', 'edgecore_eap111', 'edgecore_eap112', 'edgecore_oap101', 'edgecore_oap101-6e', 'edgecore_oap101e', 'edgecore_oap101e-6e', 'edgecore_oap103', 'hfcl_ion4xe', 'hfcl_ion4xi', 'hfcl_ion4x', 'hfcl_ion4x_2', 'hfcl_ion4x_3', 'hfcl_ion4xi_w', 'hfcl_ion4x_w', 'indio_um-305ax', 'senao_iap4300m', 'senao_iap2300m', 'senao_jeap6500', 'udaya_a6-id2', 'udaya_a6-od2', 'yuncore_ax820', 'yuncore_ax840', 'yuncore_fap640', 'yuncore_fap650', 'yuncore_fap655', 'emplus_wap588m', 'zyxel_nwa130be', 'zyxel_nwa210be', 'sercomm_ap72tip-v4' ]
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steps:
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- uses: actions/checkout@v3
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@ -98,6 +98,11 @@ $(call Package/ath12k-wifi-default)
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TITLE:=board-2.bin for NWA50BE
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endef
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define Package/ath12k-wifi-zyxel-nwa210be
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$(call Package/ath12k-wifi-default)
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TITLE:=board-2.bin for NWA210BE
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endef
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define Package/ath12k-wifi-cig-wf672
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$(call Package/ath12k-wifi-default)
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TITLE:=board-2.bin for WF672
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@ -204,6 +209,13 @@ define Package/ath12k-wifi-zyxel-nwa50be/install
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$(INSTALL_DATA) ./ipq5332_qcn6432.regdb $(1)/lib/firmware/ath12k/QCN6432/hw1.0/regdb.bin
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endef
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define Package/ath12k-wifi-zyxel-nwa210be/install
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$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
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$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
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$(INSTALL_DATA) ./board-2.bin.nwa210be.QCN92XX $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/board-2.bin
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$(INSTALL_DATA) ./board-2.bin.nwa210be.IPQ5332 $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/board-2.bin
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endef
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define Package/ath12k-wifi-cig-wf672/install
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$(INSTALL_DIR) $(1)/lib/firmware/ath12k/QCN92XX/hw1.0/
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$(INSTALL_DIR) $(1)/lib/firmware/ath12k/IPQ5332/hw1.0/
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@ -224,4 +236,5 @@ $(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip))
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$(eval $(call BuildPackage,ath12k-wifi-sercomm-ap72tip-v4))
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$(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa130be))
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$(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa50be))
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$(eval $(call BuildPackage,ath12k-wifi-zyxel-nwa210be))
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$(eval $(call BuildPackage,ath12k-wifi-cig-wf672))
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20
feeds/qca-wifi-7/ath12k-wifi/board-2-nwa210be-IPQ5332.json
Normal file
20
feeds/qca-wifi-7/ath12k-wifi/board-2-nwa210be-IPQ5332.json
Normal file
@ -0,0 +1,20 @@
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[
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{
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"board": [
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{
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"names": [
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"bus=ahb,qmi-chip-id=0,qmi-board-id=18"
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],
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"data": "nwa210be-IPQ5332.bin"
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}
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],
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"regdb": [
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{
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"names": [
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"bus=ahb,qmi-chip-id=0,qmi-board-id=18"
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],
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"data": "ipq5332.regdb"
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}
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]
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}
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]
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20
feeds/qca-wifi-7/ath12k-wifi/board-2-nwa210be-QCN92XX.json
Normal file
20
feeds/qca-wifi-7/ath12k-wifi/board-2-nwa210be-QCN92XX.json
Normal file
@ -0,0 +1,20 @@
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[
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{
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"board": [
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{
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"names": [
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"bus=pci,qmi-chip-id=0,qmi-board-id=12"
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],
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"data": "nwa210be-QCN92XX.bin"
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}
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],
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"regdb": [
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{
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"names": [
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"bus=pci,qmi-chip-id=0,qmi-board-id=12"
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],
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"data": "qcn92xx.regdb"
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}
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]
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}
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]
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BIN
feeds/qca-wifi-7/ath12k-wifi/board-2.bin.nwa210be.IPQ5332
Normal file
BIN
feeds/qca-wifi-7/ath12k-wifi/board-2.bin.nwa210be.IPQ5332
Normal file
Binary file not shown.
BIN
feeds/qca-wifi-7/ath12k-wifi/board-2.bin.nwa210be.QCN92XX
Normal file
BIN
feeds/qca-wifi-7/ath12k-wifi/board-2.bin.nwa210be.QCN92XX
Normal file
Binary file not shown.
@ -21,3 +21,6 @@ $encoder -c board-2-nwa130be-QCN92XX.json -o board-2.bin.nwa130be.QCN92XX
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$encoder -c board-2-nwa50be-IPQ5332.json -o board-2.bin.nwa50be.IPQ5332
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$encoder -c board-2-nwa50be-QCN6432.json -o board-2.bin.nwa50be.QCN6432
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$encoder -c board-2-nwa210be-IPQ5332.json -o board-2.bin.nwa210be.IPQ5332
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$encoder -c board-2-nwa210be-QCN92XX.json -o board-2.bin.nwa210be.QCN92XX
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BIN
feeds/qca-wifi-7/ath12k-wifi/nwa210be-IPQ5332.bin
Executable file
BIN
feeds/qca-wifi-7/ath12k-wifi/nwa210be-IPQ5332.bin
Executable file
Binary file not shown.
BIN
feeds/qca-wifi-7/ath12k-wifi/nwa210be-QCN92XX.bin
Executable file
BIN
feeds/qca-wifi-7/ath12k-wifi/nwa210be-QCN92XX.bin
Executable file
Binary file not shown.
@ -41,7 +41,8 @@ ipq53xx_setup_interfaces()
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emplus,wap7635|\
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sercomm,ap72tip-v4)
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ucidef_set_interface_wan "eth0"
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;;
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;;
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zyxel,nwa210be|\
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zyxel,nwa130be)
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ucidef_set_interfaces_lan_wan "eth1" "eth0"
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;;
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@ -131,6 +132,18 @@ qcom_setup_macs()
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ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
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ucidef_set_wireless_macaddr_base 6g $(macaddr_add "$wan_mac" 4)
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;;
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zyxel,nwa210be)
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wan_mac=$(cat /proc/cmdline)
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wan_mac="${wan_mac##*hwaddr=}"
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wan_mac="${wan_mac%% *}"
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wan_mac="$(echo ${wan_mac} | sed 's/\(..\)/\1:/g;s/:$//')"
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lan_mac=$(macaddr_add "$wan_mac" 1)
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ucidef_set_network_device_mac eth0 $wan_mac
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ucidef_set_network_device_mac eth1 $lan_mac
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ucidef_set_label_macaddr $wan_mac
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ucidef_set_wireless_macaddr_base 2g $(macaddr_add "$wan_mac" 2)
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ucidef_set_wireless_macaddr_base 5g $(macaddr_add "$wan_mac" 3)
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;;
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zyxel,nwa50be)
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wan_mac=$(cat /proc/cmdline)
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wan_mac="${wan_mac##*hwaddr=}"
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@ -68,6 +68,7 @@ ath12k/IPQ5332/hw1.0/caldata.bin)
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sercomm,ap72tip-v4|\
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sercomm,ap72tip|\
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zyxel,nwa130be|\
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zyxel,nwa210be|\
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zyxel,nwa50be)
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caldata_extract "0:ART" 0x1000 0x20000
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;;
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@ -91,6 +92,7 @@ ath12k/QCN92XX/hw1.0/cal-pci-0001:01:00.0.bin)
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emplus,wap7635|\
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sercomm,ap72tip-v4|\
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sercomm,ap72tip|\
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zyxel,nwa210be|\
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zyxel,nwa130be)
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caldata_extract "0:ART" 0x58800 0x2d000
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;;
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@ -175,6 +175,7 @@ platform_do_upgrade() {
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nand_upgrade_tar "$1"
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;;
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zyxel,nwa130be|\
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zyxel,nwa210be|\
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zyxel,nwa50be)
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nand_upgrade_tar "$1"
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;;
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655
feeds/qca-wifi-7/ipq53xx/dts/ipq5332-zyxel-nwa210be.dts
Executable file
655
feeds/qca-wifi-7/ipq53xx/dts/ipq5332-zyxel-nwa210be.dts
Executable file
@ -0,0 +1,655 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* IPQ5332 RDP468 board device tree source
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*
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* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "ipq5332.dtsi"
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#include "ipq5332-default-memory.dtsi"
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/ {
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model = "Zyxel NWA210BE";
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compatible = "zyxel,nwa210be", "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332-rdp468", "qcom,ipq5332";
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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ramoops@49c00000 {
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compatible = "ramoops";
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no-map;
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reg = <0x0 0x49c00000 0x0 0x100000>;
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record-size = <0x20000>;
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console-size = <0x20000>;
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pmsg-size = <0x20000>;
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};
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};
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aliases {
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serial0 = &blsp1_uart0;
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serial1 = &blsp1_uart1;
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ethernet0 = "/soc/dp1";
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ethernet1 = "/soc/dp2";
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};
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chosen {
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stdout-path = "serial0";
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};
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soc@0 {
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mdio:mdio@90000 {
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pinctrl-0 = <&mdio1_pins &mdio0_pins>;
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pinctrl-names = "default";
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/*gpio51 for manhattan reset*/
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phy-reset-gpio = <&tlmm 51 GPIO_ACTIVE_LOW>;
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phyaddr_fixup = <0xC90F018>;
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uniphyaddr_fixup = <0xC90F014>;
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mdio_clk_fixup; /* MDIO clock sequence fix up flag */
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <1>;
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fixup;
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};
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phy1: ethernet-phy@1 {
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reg = <2>;
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fixup;
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};
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phy2: ethernet-phy@2 {
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reg = <3>;
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fixup;
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};
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phy3: ethernet-phy@3 {
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reg = <4>;
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fixup;
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};
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switch0@10 {
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compatible = "qca,qca8386";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "cpu";
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ethernet = <&gmac2>;
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dsa-tag-protocol = "qca_4b";
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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phy-handle = <&phy0>;
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phy-mode = "usxgmii";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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phy-handle = <&phy1>;
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phy-mode = "usxgmii";
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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phy-handle = <&phy2>;
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phy-mode = "usxgmii";
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};
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};
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};
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};
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ess-instance {
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num_devices = <0x2>;
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ess-switch@3a000000 {
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switch_cpu_bmp = <0x1>; /* cpu port bitmap */
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switch_lan_bmp = <0x2>; /* lan port bitmap */
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switch_wan_bmp = <0x4>; /* wan port bitmap */
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switch_mac_mode = <0xc>; /* mac mode for uniphy instance0*/
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switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/
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switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
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qcom,port_phyinfo {
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port@0 {
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port_id = <1>;
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forced-speed = <2500>;
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forced-duplex = <1>;
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};
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port@1 {
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port_id = <2>;
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phy_address = <4>;
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};
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};
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led_source@5 {
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source = <5>;
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mode = "normal";
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speed = "all";
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blink_en = "enable";
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active = "high";
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};
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qcom,port_ledinfo {
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port@1 {
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port = <2>;
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led_source@0 {
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source = <0>;
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mode = "normal";
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speed = "2500M";
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active = "high";
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blink_en = "enable";
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};
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led_source@1 {
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source = <1>;
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mode = "normal";
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speed = "10M", "100M","1000M";
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active = "high";
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blink_en = "enable";
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};
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};
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};
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};
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ess-switch1@1 {
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compatible = "qcom,ess-switch-qca8386";
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device_id = <1>;
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switch_access_mode = "mdio";
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mdio-bus = <&mdio>;
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switch_mac_mode = <0xc>; /* mac mode for uniphy instance0 */
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switch_mac_mode1 = <0xff>; /* mac mode1 for uniphy instance1 */
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switch_cpu_bmp = <0x1>; /* cpu port bitmap */
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switch_lan_bmp = <0xe>; /* lan port bitmap */
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switch_wan_bmp = <0x0>; /* wan port bitmap */
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link-polling-required = <0>;
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fdb_sync = "interrupt";
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link-intr-gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>;
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qcom,port_phyinfo {
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port@0 {
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port_id = <0>;
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forced-speed = <2500>;
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forced-duplex = <1>;
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};
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port@1 {
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port_id = <1>;
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phy_address = <1>;
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};
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port@2 {
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port_id = <2>;
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phy_address = <2>;
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};
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port@3 {
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port_id = <3>;
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phy_address = <3>;
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};
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};
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qcom,port_ledinfo {
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port@3 {
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port = <3>;
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led_source@0 {
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source = <0>;
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mode = "normal";
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speed = "2500M";
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active = "high";
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blink_en = "enable";
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};
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led_source@1 {
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source = <1>;
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mode = "normal";
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speed = "10M", "100M","1000M";
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active = "high";
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blink_en = "enable";
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||||
};
|
||||
};
|
||||
};
|
||||
|
||||
led_source@2 {
|
||||
source = <2>;
|
||||
mode = "normal";
|
||||
speed = "all";
|
||||
blink_en = "enable";
|
||||
active = "high";
|
||||
};
|
||||
led_source@5 {
|
||||
source = <5>;
|
||||
mode = "normal";
|
||||
speed = "all";
|
||||
blink_en = "enable";
|
||||
active = "high";
|
||||
};
|
||||
led_source@8 {
|
||||
source = <8>;
|
||||
mode = "normal";
|
||||
speed = "all";
|
||||
blink_en = "enable";
|
||||
active = "high";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dp1 {
|
||||
device_type = "network";
|
||||
compatible = "qcom,nss-dp";
|
||||
qcom,id = <2>;
|
||||
reg = <0x3a504000 0x4000>;
|
||||
qcom,mactype = <1>;
|
||||
local-mac-address = [000000000000];
|
||||
mdio-bus = <&mdio>;
|
||||
qcom,phy-mdio-addr = <4>;
|
||||
qcom,link-poll = <1>;
|
||||
phy-mode = "sgmii";
|
||||
};
|
||||
|
||||
gmac2:dp2 {
|
||||
device_type = "network";
|
||||
compatible = "qcom,nss-dp";
|
||||
qcom,id = <1>;
|
||||
reg = <0x3a500000 0x4000>;
|
||||
qcom,mactype = <1>;
|
||||
local-mac-address = [000000000000];
|
||||
phy-mode = "sgmii";
|
||||
qcom,mht-dev = <1>;
|
||||
qcom,is_switch_connected = <1>;
|
||||
qcom,ppe-offload-disabled = <1>;
|
||||
};
|
||||
|
||||
/* EDMA host driver configuration for the board */
|
||||
edma@3ab00000 {
|
||||
qcom,txdesc-ring-start = <4>; /* Tx desc ring start ID */
|
||||
qcom,txdesc-rings = <12>; /* Total number of Tx desc rings to be provisioned */
|
||||
qcom,mht-txdesc-rings = <8>; /* Extra Tx desc rings to be provisioned for MHT SW ports */
|
||||
qcom,txcmpl-ring-start = <4>; /* Tx complete ring start ID */
|
||||
qcom,txcmpl-rings = <12>; /* Total number of Tx complete rings to be provisioned */
|
||||
qcom,mht-txcmpl-rings = <8>; /* Extra Tx complete rings to be provisioned for mht sw ports. */
|
||||
qcom,rxfill-ring-start = <4>; /* Rx fill ring start ID */
|
||||
qcom,rxfill-rings = <4>; /* Total number of Rx fill rings to be provisioned */
|
||||
qcom,rxdesc-ring-start = <12>; /* Rx desc ring start ID */
|
||||
qcom,rxdesc-rings = <4>; /* Total number of Rx desc rings to be provisioned */
|
||||
qcom,rx-page-mode = <0>; /* Rx fill ring page mode */
|
||||
qcom,tx-map-priority-level = <1>; /* Tx priority level per port */
|
||||
qcom,rx-map-priority-level = <1>; /* Rx priority level per core */
|
||||
qcom,ppeds-num = <2>; /* Number of PPEDS nodes */
|
||||
/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
|
||||
qcom,ppeds-map = <1 1 1 1 32 8>, /* PPEDS Node#0 ring and queue map */
|
||||
<2 2 2 2 40 8>; /* PPEDS Node#1 ring and queue map */
|
||||
qcom,txdesc-map = <8 9 10 11>, /* Port0 per-core Tx ring map */
|
||||
<12 13 14 15>, /* MHT-Port1 per-core Tx ring map */
|
||||
<4 5 6 7>, /* MHT-Port2 per-core Tx ring map/packets from vp*/
|
||||
<16 17 18 19>, /* MHT-Port3 per-core Tx ring map */
|
||||
<20 21 22 23>; /* MHT-Port4 per-core Tx ring map */
|
||||
qcom,txdesc-fc-grp-map = <1 2 3 4 5>; /* Per GMAC flow control group map */
|
||||
qcom,rxfill-map = <4 5 6 7>; /* Per-core Rx fill ring map */
|
||||
qcom,rxdesc-map = <12 13 14 15>; /* Per-core Rx desc ring map */
|
||||
qcom,rx-queue-start = <0>; /* Rx queue start */
|
||||
qcom,rx-ring-queue-map = <0 8 16 24>, /* Priority 0 queues per-core Rx ring map */
|
||||
<1 9 17 25>, /* Priority 1 queues per-core Rx ring map */
|
||||
<2 10 18 26>, /* Priority 2 queues per-core Rx ring map */
|
||||
<3 11 19 27>, /* Priority 3 queues per-core Rx ring map */
|
||||
<4 12 20 28>, /* Priority 4 queues per-core Rx ring map */
|
||||
<5 13 21 29>, /* Priority 5 queues per-core Rx ring map */
|
||||
<6 14 22 30>, /* Priority 6 queues per-core Rx ring map */
|
||||
<7 15 23 31>; /* Priority 7 queues per-core Rx ring map */
|
||||
interrupts = <0 163 4>, /* Tx complete ring id #4 IRQ info */
|
||||
<0 164 4>, /* Tx complete ring id #5 IRQ info */
|
||||
<0 165 4>, /* Tx complete ring id #6 IRQ info */
|
||||
<0 166 4>, /* Tx complete ring id #7 IRQ info */
|
||||
<0 167 4>, /* Tx complete ring id #8 IRQ info */
|
||||
<0 168 4>, /* Tx complete ring id #9 IRQ info */
|
||||
<0 169 4>, /* Tx complete ring id #10 IRQ info */
|
||||
<0 170 4>, /* Tx complete ring id #11 IRQ info */
|
||||
<0 171 4>, /* Tx complete ring id #12 IRQ info */
|
||||
<0 172 4>, /* Tx complete ring id #13 IRQ info */
|
||||
<0 173 4>, /* Tx complete ring id #14 IRQ info */
|
||||
<0 174 4>, /* Tx complete ring id #15 IRQ info */
|
||||
<0 139 4>, /* Rx desc ring id #12 IRQ info */
|
||||
<0 140 4>, /* Rx desc ring id #13 IRQ info */
|
||||
<0 141 4>, /* Rx desc ring id #14 IRQ info */
|
||||
<0 142 4>, /* Rx desc ring id #15 IRQ info */
|
||||
<0 191 4>, /* Misc error IRQ info */
|
||||
<0 160 4>, /* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
|
||||
<0 128 4>, /* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
|
||||
<0 152 4>, /* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
|
||||
<0 161 4>, /* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
|
||||
<0 129 4>, /* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
|
||||
<0 153 4>, /* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
|
||||
<0 175 4>, /* MHT port Tx complete ring id #16 IRQ info */
|
||||
<0 176 4>, /* MHT port Tx complete ring id #17 IRQ info */
|
||||
<0 177 4>, /* MHT port Tx complete ring id #18 IRQ info */
|
||||
<0 178 4>, /* MHT port Tx complete ring id #19 IRQ info */
|
||||
<0 179 4>, /* MHT port Tx complete ring id #20 IRQ info */
|
||||
<0 180 4>, /* MHT port Tx complete ring id #21 IRQ info */
|
||||
<0 181 4>, /* MHT port Tx complete ring id #22 IRQ info */
|
||||
<0 182 4>; /* MHT port Tx complete ring id #23 IRQ info */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-0 = <&led_pins>;
|
||||
pinctrl-names = "default";
|
||||
led_blue{
|
||||
label = "led_blue";
|
||||
gpio = <&tlmm 22 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "led_blue";
|
||||
default-state = "off";
|
||||
};
|
||||
led_green {
|
||||
label = "led_green";
|
||||
gpio = <&tlmm 45 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "led_green";
|
||||
default-state = "on";
|
||||
};
|
||||
led_white {
|
||||
label = "led_white";
|
||||
gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "led_white";
|
||||
default-state = "off";
|
||||
};
|
||||
led_red {
|
||||
label = "led_red";
|
||||
gpio = <&tlmm 44 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "led_red";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-0 = <&button_pins>;
|
||||
pinctrl-names = "default";
|
||||
button@1 {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
|
||||
linux,input-type = <1>;
|
||||
debounce-interval = <60>;
|
||||
};
|
||||
};
|
||||
|
||||
wsi: wsi {
|
||||
id = <0>;
|
||||
num_chip = <2>;
|
||||
status = "okay";
|
||||
chip_info = <0 1 1>,
|
||||
<1 1 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&wifi0 {
|
||||
led-gpio = <&tlmm 36 GPIO_ACTIVE_HIGH>;
|
||||
qcom,rproc = <&q6_wcss_pd1>;
|
||||
qcom,rproc_rpd = <&q6v5_wcss>;
|
||||
qcom,multipd_arch;
|
||||
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
|
||||
memory-region = <&q6_region>;
|
||||
qcom,wsi = <&wsi>;
|
||||
qcom,wsi_index = <0>;
|
||||
qcom,board_id = <0x12>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qcn9224_pcie1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&blsp1_uart0 {
|
||||
pinctrl-0 = <&serial_0_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&blsp1_uart1 {
|
||||
pinctrl-0 = <&serial_1_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&blsp1_spi0 {
|
||||
pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "n25q128a11", "micron,n25q128a11", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
spi-max-frequency = <50000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdhc {
|
||||
bus-width = <4>;
|
||||
max-frequency = <192000000>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
non-removable;
|
||||
pinctrl-0 = <&sdc_default_state>;
|
||||
pinctrl-names = "default";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sleep_clk {
|
||||
clock-frequency = <32000>;
|
||||
};
|
||||
|
||||
&xo {
|
||||
clock-frequency = <24000000>;
|
||||
};
|
||||
|
||||
&qpic_bam {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&qpic_nand {
|
||||
pinctrl-0 = <&qspi_default_state>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
nandcs@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
nand-ecc-strength = <8>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-bus-width = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie1_phy_x2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie1 {
|
||||
pinctrl-0 = <&pcie1_default_state>;
|
||||
pinctrl-names = "default";
|
||||
perst-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
pcie1_rp {
|
||||
reg = <0 0 0 0 0>;
|
||||
|
||||
qcom,mhi@1 {
|
||||
reg = <0 0 0 0 0>;
|
||||
boot-args = <0x2 0x4 0x34 0x3 0x0 0x0 /* MX Rail, GPIO52, Drive strength 0x3 */
|
||||
0x4 0x4 0x18 0x3 0x0 0x0 /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
|
||||
0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
|
||||
memory-region = <&qcn9224_pcie1>;
|
||||
qcom,wsi = <&wsi>;
|
||||
qcom,wsi_index = <1>;
|
||||
qcom,board_id = <0x000c>;
|
||||
qcom,wide_band = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* PINCTRL */
|
||||
|
||||
&tlmm {
|
||||
|
||||
led_pins: led_pins {
|
||||
fem_en {
|
||||
pins = "gpio31";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
output-high; //Enable Wi-Fi FEM
|
||||
};
|
||||
|
||||
led_blue {
|
||||
pins = "gpio22";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
|
||||
led_green {
|
||||
pins = "gpio45";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
|
||||
led_white {
|
||||
pins = "gpio43";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
|
||||
led_red {
|
||||
pins = "gpio44";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
sdc_default_state: sdc-default-state {
|
||||
clk-pins {
|
||||
pins = "gpio13";
|
||||
function = "sdc_clk";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
cmd-pins {
|
||||
pins = "gpio12";
|
||||
function = "sdc_cmd";
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
data-pins {
|
||||
pins = "gpio8", "gpio9", "gpio10", "gpio11";
|
||||
function = "sdc_data";
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
|
||||
spi_0_data_clk_pins: spi-0-data-clk-state {
|
||||
pins = "gpio14", "gpio15", "gpio16";
|
||||
function = "blsp0_spi";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
};
|
||||
|
||||
spi_0_cs_pins: spi-0-cs-state {
|
||||
pins = "gpio17";
|
||||
function = "blsp0_spi";
|
||||
drive-strength = <2>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
qspi_default_state: qspi-default-state {
|
||||
qspi_clock {
|
||||
pins = "gpio13";
|
||||
function = "qspi_clk";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
|
||||
qspi_cs {
|
||||
pins = "gpio12";
|
||||
function = "qspi_cs";
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
qspi_data {
|
||||
pins = "gpio8", "gpio9", "gpio10", "gpio11";
|
||||
function = "qspi_data";
|
||||
drive-strength = <8>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
serial_1_pins: serial1-pinmux {
|
||||
pins = "gpio33", "gpio34", "gpio35", "gpio36";
|
||||
function = "blsp1_uart2";
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
button_pins: button-state {
|
||||
pins = "gpio30";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
pwm_pins: pwm-state {
|
||||
pins = "gpio46";
|
||||
function = "pwm0";
|
||||
drive-strength = <8>;
|
||||
};
|
||||
|
||||
pcie1_default_state: pcie1-default-state {
|
||||
pins = "gpio47";
|
||||
function = "gpio";
|
||||
drive-strength = <8>;
|
||||
bias-pull-up;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
&license_manager {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
qcom,multiplexed-phy;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm {
|
||||
pinctrl-0 = <&pwm_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hs_m31phy_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssuniphy_0 {
|
||||
status = "okay";
|
||||
};
|
||||
@ -178,6 +178,21 @@ define Device/zyxel_nwa50be
|
||||
endef
|
||||
TARGET_DEVICES += zyxel_nwa50be
|
||||
|
||||
define Device/zyxel_nwa210be
|
||||
DEVICE_TITLE := Zyxel NWA210BE
|
||||
DEVICE_DTS := ipq5332-zyxel-nwa210be
|
||||
DEVICE_DTS_DIR := ../dts
|
||||
DEVICE_DTS_CONFIG := config@mi01.6
|
||||
IMAGES := sysupgrade.tar nand-factory.bin nand-factory.ubi
|
||||
BLOCKSIZE := 128k
|
||||
PAGESIZE := 2048
|
||||
IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata
|
||||
IMAGE/nand-factory.bin := append-ubi | qsdk-ipq-factory-nand
|
||||
IMAGE/nand-factory.ubi := append-ubi
|
||||
DEVICE_PACKAGES := ath12k-wifi-zyxel-nwa210be ath12k-firmware-qcn92xx ath12k-firmware-ipq5332
|
||||
endef
|
||||
TARGET_DEVICES += zyxel_nwa210be
|
||||
|
||||
define Device/cig_wf672
|
||||
DEVICE_TITLE := CIG WF672
|
||||
DEVICE_DTS := ipq5332-cig-wf672
|
||||
|
||||
@ -0,0 +1,72 @@
|
||||
From 5f22b2d262ba44ecd0b05b32c6eee6161460718f Mon Sep 17 00:00:00 2001
|
||||
From: YenLin Pan <yenlin.pan@zyxel.com.tw>
|
||||
Date: Tue, 15 Jul 2025 16:18:48 +0800
|
||||
Subject: [PATCH] thermal: thermal setting
|
||||
|
||||
lv0 -100 -hi0 105 -off0 0
|
||||
lv1 95 -hi1 110 -off1 75
|
||||
lv2 100 -hi2 115 -off2 99
|
||||
lv3 105 -hi3 120 -off3 100
|
||||
|
||||
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
|
||||
---
|
||||
drivers/net/wireless/ath/ath12k/thermal.h | 30 +++++++++++------------
|
||||
1 file changed, 15 insertions(+), 15 deletions(-)
|
||||
|
||||
diff --git a/drivers/net/wireless/ath/ath12k/thermal.h b/drivers/net/wireless/ath/ath12k/thermal.h
|
||||
index 5c91906..2334901 100644
|
||||
--- a/drivers/net/wireless/ath/ath12k/thermal.h
|
||||
+++ b/drivers/net/wireless/ath/ath12k/thermal.h
|
||||
@@ -13,34 +13,34 @@
|
||||
|
||||
/* Below temperatures are in celsius */
|
||||
#define ATH12K_THERMAL_LVL0_TEMP_LOW_MARK -100
|
||||
-#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 100
|
||||
+#define ATH12K_THERMAL_LVL0_TEMP_HIGH_MARK 105
|
||||
#define ATH12K_THERMAL_LVL1_TEMP_LOW_MARK 95
|
||||
-#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 105
|
||||
+#define ATH12K_THERMAL_LVL1_TEMP_HIGH_MARK 110
|
||||
#define ATH12K_THERMAL_LVL2_TEMP_LOW_MARK 100
|
||||
-#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 110
|
||||
+#define ATH12K_THERMAL_LVL2_TEMP_HIGH_MARK 115
|
||||
#define ATH12K_THERMAL_LVL3_TEMP_LOW_MARK 105
|
||||
#define ATH12K_THERMAL_LVL3_TEMP_HIGH_MARK 120
|
||||
|
||||
#define ATH12K_THERMAL_LVL0_V2_TEMP_LOW_MARK -100
|
||||
-#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 95
|
||||
-#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 90
|
||||
-#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 100
|
||||
-#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 95
|
||||
-#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 105
|
||||
-#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 100
|
||||
-#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 110
|
||||
+#define ATH12K_THERMAL_LVL0_V2_TEMP_HIGH_MARK 105
|
||||
+#define ATH12K_THERMAL_LVL1_V2_TEMP_LOW_MARK 95
|
||||
+#define ATH12K_THERMAL_LVL1_V2_TEMP_HIGH_MARK 110
|
||||
+#define ATH12K_THERMAL_LVL2_V2_TEMP_LOW_MARK 100
|
||||
+#define ATH12K_THERMAL_LVL2_V2_TEMP_HIGH_MARK 115
|
||||
+#define ATH12K_THERMAL_LVL3_V2_TEMP_LOW_MARK 105
|
||||
+#define ATH12K_THERMAL_LVL3_V2_TEMP_HIGH_MARK 120
|
||||
#define ATH12K_THERMAL_LVL4_V2_TEMP_LOW_MARK 105
|
||||
#define ATH12K_THERMAL_LVL4_V2_TEMP_HIGH_MARK 120
|
||||
|
||||
#define ATH12K_THERMAL_LVL0_DUTY_CYCLE 0
|
||||
-#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 50
|
||||
-#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 90
|
||||
+#define ATH12K_THERMAL_LVL1_DUTY_CYCLE 75
|
||||
+#define ATH12K_THERMAL_LVL2_DUTY_CYCLE 99
|
||||
#define ATH12K_THERMAL_LVL3_DUTY_CYCLE 100
|
||||
|
||||
#define ATH12K_THERMAL_LVL0_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
|
||||
-#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL0_DUTY_CYCLE
|
||||
-#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
|
||||
-#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
|
||||
+#define ATH12K_THERMAL_LVL1_V2_DUTY_CYCLE ATH12K_THERMAL_LVL1_DUTY_CYCLE
|
||||
+#define ATH12K_THERMAL_LVL2_V2_DUTY_CYCLE ATH12K_THERMAL_LVL2_DUTY_CYCLE
|
||||
+#define ATH12K_THERMAL_LVL3_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
|
||||
#define ATH12K_THERMAL_LVL4_V2_DUTY_CYCLE ATH12K_THERMAL_LVL3_DUTY_CYCLE
|
||||
|
||||
#define THERMAL_CONFIG_POUT0 0
|
||||
--
|
||||
2.34.1
|
||||
|
||||
317
feeds/qca-wifi-7/qca-ssdk-qca/files-zyxel_nwa210be/qca-ssdk
Executable file
317
feeds/qca-wifi-7/qca-ssdk-qca/files-zyxel_nwa210be/qca-ssdk
Executable file
@ -0,0 +1,317 @@
|
||||
#!/bin/sh /etc/rc.common
|
||||
# Copyright (c) 2018, 2021, The Linux Foundation. All rights reserved.
|
||||
# Copyright (c) 2022-2024, Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
#
|
||||
# Permission to use, copy, modify, and/or distribute this software for any
|
||||
# purpose with or without fee is hereby granted, provided that the above
|
||||
# copyright notice and this permission notice appear in all copies.
|
||||
#
|
||||
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
#
|
||||
|
||||
START=16
|
||||
|
||||
#!/bin/sh
|
||||
ruletype="ip4 ip6"
|
||||
side="wan lan"
|
||||
qwan="1 3 2 0 5 7 6 4"
|
||||
qlan="0 1 2 3 4 5 6 7"
|
||||
|
||||
function create_war_acl_rules(){
|
||||
for lw in $side
|
||||
do
|
||||
#echo $lw
|
||||
if [ "$lw" == "wan" ];then
|
||||
listid=254
|
||||
queue=$qwan
|
||||
portmap=0x20
|
||||
else
|
||||
listid=255
|
||||
queue=$qlan
|
||||
portmap=0x1e
|
||||
fi
|
||||
#echo $queue
|
||||
#echo "creating list $listid"
|
||||
ssdk_sh acl list create $listid 255
|
||||
ruleid=0
|
||||
for rt in $ruletype
|
||||
do
|
||||
for qid in $queue
|
||||
do
|
||||
cmd="ssdk_sh acl rule add $listid $ruleid 1 n 0 0"
|
||||
#echo $cmd
|
||||
if [ "$rt" == "ip4" ];then
|
||||
cmd="$cmd ip4 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
|
||||
#echo $cmd
|
||||
else
|
||||
cmd="$cmd ip6 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
|
||||
#echo $cmd
|
||||
fi
|
||||
if [ $ruleid -le 3 ];then
|
||||
#non-zero dscp
|
||||
cmd="$cmd y 0x0 0xff"
|
||||
elif [ $ruleid -le 7 ];then
|
||||
#zero dscp
|
||||
cmd="$cmd n"
|
||||
elif [ $ruleid -le 11 ];then
|
||||
#non-zero dscp
|
||||
cmd="$cmd y 0x0 0xff"
|
||||
else
|
||||
#zero dscp
|
||||
cmd="$cmd n"
|
||||
fi
|
||||
p=$((ruleid/2))
|
||||
cmd="$cmd y mask $((ruleid%2)) 0x1 y mask $((p%2)) 0x1 n n n n n n n n n n n n n n n y n n n n n n n y $qid n n 0 0 n n n n n n n n n n n n n n n n n n n n 0"
|
||||
#echo $cmd
|
||||
$cmd
|
||||
ruleid=`expr $ruleid + 1`
|
||||
done
|
||||
done
|
||||
ssdk_sh acl list bind $listid 0 1 $portmap
|
||||
done
|
||||
}
|
||||
|
||||
function create_war_cosmap(){
|
||||
ssdk_sh cosmap pri2q set 0 0
|
||||
ssdk_sh cosmap pri2q set 1 0
|
||||
ssdk_sh cosmap pri2q set 2 0
|
||||
ssdk_sh cosmap pri2q set 3 0
|
||||
ssdk_sh cosmap pri2q set 4 1
|
||||
ssdk_sh cosmap pri2q set 5 1
|
||||
ssdk_sh cosmap pri2q set 6 1
|
||||
ssdk_sh cosmap pri2q set 7 1
|
||||
ssdk_sh cosmap pri2ehq set 0 0
|
||||
ssdk_sh cosmap pri2ehq set 1 0
|
||||
ssdk_sh cosmap pri2ehq set 2 0
|
||||
ssdk_sh cosmap pri2ehq set 3 0
|
||||
ssdk_sh cosmap pri2ehq set 4 1
|
||||
ssdk_sh cosmap pri2ehq set 5 1
|
||||
ssdk_sh cosmap pri2ehq set 6 1
|
||||
ssdk_sh cosmap pri2ehq set 7 1
|
||||
}
|
||||
|
||||
function create_acl_byp_egstp_rules(){
|
||||
chip_ver=$1
|
||||
cmd="ssdk_sh servcode config set 1 n 0 0xfffefc7f 0xffbdff 0 0 0 0 0 0"
|
||||
if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
|
||||
cmd="$cmd 0"
|
||||
fi
|
||||
#echo $cmd
|
||||
$cmd
|
||||
|
||||
ssdk_sh acl list create 56 48
|
||||
#action bypass eg stp check
|
||||
action="y n n n n n n n n n n 0 0 n n n n n n n n n n n n n y n n n n n n n n n n n n y n n n n n n n n n n n n n n n n n n"
|
||||
if [ "$chip_ver" == "0x2000" ]; then
|
||||
action="$action n n 0"
|
||||
elif [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
|
||||
action="$action n n n 0"
|
||||
else
|
||||
action="$action 0"
|
||||
fi
|
||||
|
||||
for ruleid in $( seq 0 2 )
|
||||
do
|
||||
if [ "$ruleid" == "0" ];then
|
||||
cmd="ssdk_sh acl rule add 56 0 1 n 0 0 mac n n n n n y 01-80-c2-00-00-00 ff-ff-ff-ff-ff-ff n n n n n n n n n n n n n n n n n n n n n n n"
|
||||
elif [ "$ruleid" == "1" ];then
|
||||
cmd="ssdk_sh acl rule add 56 1 1 n 0 0 mac n n n n n n n yes 0x8809 0xffff n n n n n n n n n n n n n n n n n n n n n"
|
||||
else
|
||||
cmd="ssdk_sh acl rule add 56 2 1 n 0 0 mac n n n n n n n yes 0x888e 0xffff n n n n n n n n n n n n n n n n n n n n n"
|
||||
fi
|
||||
if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
|
||||
cmd="$cmd n $action"
|
||||
else
|
||||
cmd="$cmd $action"
|
||||
fi
|
||||
#echo $cmd
|
||||
$cmd
|
||||
done
|
||||
ssdk_sh acl list bind 56 0 2 1
|
||||
}
|
||||
|
||||
function delete_war_acl_rules(){
|
||||
for lw in $side
|
||||
do
|
||||
#echo $lw
|
||||
if [ "$lw" == "wan" ];then
|
||||
listid=254
|
||||
queue=$qwan
|
||||
portmap=0x20
|
||||
else
|
||||
listid=255
|
||||
queue=$qlan
|
||||
portmap=0x1e
|
||||
fi
|
||||
ssdk_sh acl list unbind $listid 0 1 $portmap
|
||||
for rt in $ruletype
|
||||
do
|
||||
for qid in $queue
|
||||
do
|
||||
cmd="ssdk_sh acl rule del $listid 0 1"
|
||||
echo $cmd
|
||||
$cmd
|
||||
done
|
||||
done
|
||||
#echo "deleting list $listid"
|
||||
ssdk_sh acl list destroy $listid
|
||||
done
|
||||
}
|
||||
|
||||
function delete_war_cosmap(){
|
||||
ssdk_sh cosmap pri2q set 0 0
|
||||
ssdk_sh cosmap pri2q set 1 0
|
||||
ssdk_sh cosmap pri2q set 2 1
|
||||
ssdk_sh cosmap pri2q set 3 1
|
||||
ssdk_sh cosmap pri2q set 4 2
|
||||
ssdk_sh cosmap pri2q set 5 2
|
||||
ssdk_sh cosmap pri2q set 6 3
|
||||
ssdk_sh cosmap pri2q set 7 3
|
||||
ssdk_sh cosmap pri2ehq set 0 1
|
||||
ssdk_sh cosmap pri2ehq set 1 0
|
||||
ssdk_sh cosmap pri2ehq set 2 2
|
||||
ssdk_sh cosmap pri2ehq set 3 2
|
||||
ssdk_sh cosmap pri2ehq set 4 3
|
||||
ssdk_sh cosmap pri2ehq set 5 3
|
||||
ssdk_sh cosmap pri2ehq set 6 4
|
||||
ssdk_sh cosmap pri2ehq set 7 5
|
||||
}
|
||||
|
||||
function delete_acl_byp_egstp_rules(){
|
||||
chip_ver=$1
|
||||
cmd="ssdk_sh servcode config set 1 n 0 0xfffefcff 0xffbfff 0 0 0 0 0 0"
|
||||
if [ "$chip_ver" == "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
|
||||
cmd="$cmd 0"
|
||||
fi
|
||||
#echo $cmd
|
||||
$cmd
|
||||
ssdk_sh acl list unbind 56 0 2 1
|
||||
ssdk_sh acl rule del 56 0 1
|
||||
ssdk_sh acl rule del 56 1 1
|
||||
ssdk_sh acl rule del 56 2 1
|
||||
ssdk_sh acl list destroy 56
|
||||
}
|
||||
|
||||
function edma_war_config_add(){
|
||||
create_war_cosmap
|
||||
ssdk_sh acl status set enable
|
||||
create_war_acl_rules
|
||||
}
|
||||
|
||||
function edma_war_config_del(){
|
||||
delete_war_acl_rules
|
||||
delete_war_cosmap
|
||||
}
|
||||
|
||||
function ipq50xx_serdes_monitor () {
|
||||
#if qca808x phy exist, need to monitor the serdes to avoid the effect for WIFI
|
||||
port_id=2
|
||||
old_linkstatus="DISABLE"
|
||||
phy_id_info=`ssdk_sh port phyid get $port_id | grep Org | awk -F '!' '{print $2}'`
|
||||
if [ "$phy_id_info" = "[Org ID]:0x004d[Rev ID]:0xd101" ]; then
|
||||
ssdk_sh debug phy set 29 0xb 0x300d
|
||||
ssdk_sh debug uniphy set 0 0x7ac 0x300d 4
|
||||
|
||||
while true
|
||||
do
|
||||
cur_linkstatus=`ssdk_sh port linkstatus get $port_id | grep Status | awk -F ':' '{print $2}'`
|
||||
#when qca808x phy link status is from down to up, serdes tx would be enabled
|
||||
if [ "$cur_linkstatus" = "ENABLE" ] && [ "$old_linkstatus" = "DISABLE" ]; then
|
||||
ssdk_sh debug phy set 29 0xb 0xb00d
|
||||
ssdk_sh debug uniphy set 0 0x7ac 0xb00d 4
|
||||
fi
|
||||
#when qca808x phy link status is from up to down, serdes tx would be disabled
|
||||
if [ "$cur_linkstatus" = "DISABLE" ] && [ "$old_linkstatus" = "ENABLE" ]; then
|
||||
ssdk_sh debug phy set 29 0xb 0x300d
|
||||
ssdk_sh debug uniphy set 0 0x7ac 0x300d 4
|
||||
fi
|
||||
old_linkstatus=$cur_linkstatus
|
||||
done
|
||||
fi
|
||||
}
|
||||
|
||||
function ipq53xx_phy_amplitude_set () {
|
||||
#for qca808x phy sgmii, set half amplitude with src_half_swing register
|
||||
port_id=2
|
||||
phy_id_info=`ssdk_sh port phyid get $port_id | grep Org | awk -F '!' '{print $2}'`
|
||||
if [ "$phy_id_info" = "[Org ID]:0x004d[Rev ID]:0xd180" ]; then
|
||||
ssdk_sh debug phy set 5 0x40010087 0x208a
|
||||
ssdk_sh debug phy set 6 0x40010087 0x208a
|
||||
#Set the Reg0x67 bits[7:5]=3’b000 and bit4=1’b1
|
||||
ampl_val=$(eval "ssdk_sh debug phy get 5 0x40010067 | grep SSDK | grep -oE '0x[0-9a-fA-F]+' | sed 's/\(0x..\)./\11/'")
|
||||
ssdk_sh debug phy set 5 0x40010067 $ampl_val
|
||||
ampl_val=$(eval "ssdk_sh debug phy get 6 0x40010067 | grep SSDK | grep -oE '0x[0-9a-fA-F]+' | sed 's/\(0x..\)./\11/'")
|
||||
ssdk_sh debug phy set 6 0x40010067 $ampl_val
|
||||
fi
|
||||
}
|
||||
|
||||
function ipq53xx_uniphy_amplitude_set () {
|
||||
#for ipq50xx sgmii, set half amplitude with tx_emp_lvl/margin_index and tx_margin
|
||||
ssdk_sh debug uniphy set 0 0x7ac 0xb10d 4
|
||||
ssdk_sh debug uniphy set 0 0x24 0 4
|
||||
ssdk_sh debug uniphy set 1 0x7ac 0xb10d 4
|
||||
ssdk_sh debug uniphy set 1 0x24 0 4
|
||||
}
|
||||
|
||||
ssdk_dependency() {
|
||||
counter=0
|
||||
[ -e /lib/modules/$(uname -r)/qca-ssdk.ko ] && [ ! -d /sys/module/qca_ssdk ] && {
|
||||
insmod qca-ssdk.ko
|
||||
}
|
||||
while [ ! -d /sys/ssdk ] && [ "$counter" -le 5 ]
|
||||
do
|
||||
sleep 1
|
||||
counter=$((counter+1))
|
||||
done
|
||||
}
|
||||
|
||||
start() {
|
||||
ssdk_dependency
|
||||
chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
|
||||
#The following commands should be uncommented to enable EDMA WAR
|
||||
if [ "$chip_ver" = "0x1401" ]; then
|
||||
#edma_war_config_add
|
||||
echo ''
|
||||
fi
|
||||
#The following commands should be uncommented to add acl egress stp bypass rules
|
||||
if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ] || [ "$chip_ver" = "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
|
||||
#create_acl_byp_egstp_rules $chip_ver
|
||||
echo ''
|
||||
fi
|
||||
#The following commands should be uncommented to enable WAR for ipq50xx
|
||||
chip_type_info=`cat tmp/sysinfo/model`
|
||||
result=$(echo $chip_type_info | grep "IPQ5018")
|
||||
if [ "$result" != "" ]; then
|
||||
#ipq50xx_serdes_monitor &
|
||||
#ipq50xx_uniphy_amplitude_set
|
||||
#ipq50xx_phy_amplitude_set
|
||||
echo ''
|
||||
fi
|
||||
if [ "$chip_ver" = "0x2001" ]; then
|
||||
ipq53xx_uniphy_amplitude_set
|
||||
ipq53xx_phy_amplitude_set
|
||||
echo ''
|
||||
fi
|
||||
echo starting
|
||||
}
|
||||
|
||||
stop() {
|
||||
chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
|
||||
#The following commands should be uncommented to disable EDMA WAR
|
||||
if [ "$chip_ver" = "0x1401" ]; then
|
||||
#edma_war_config_del
|
||||
echo ''
|
||||
fi
|
||||
#The following commands should be uncommented to delete acl egress stp bypass rules
|
||||
if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ] || [ "$chip_ver" = "0x2000" ] || [ "$chip_ver" = "0x2001" ] || [ "$chip_ver" = "0x2100" ]; then
|
||||
#delete_acl_byp_egstp_rules $chip_ver
|
||||
echo ''
|
||||
fi
|
||||
echo stoping
|
||||
}
|
||||
@ -0,0 +1,47 @@
|
||||
From 7fa9e9b683f1c573c58a14755347988919bc7d06 Mon Sep 17 00:00:00 2001
|
||||
From: YenLin Pan <yenlin.pan@zyxel.com.tw>
|
||||
Date: Wed, 14 May 2025 13:47:06 +0800
|
||||
Subject: [PATCH] pinctrl: make the switch LED works
|
||||
|
||||
Enable switch LED pin definition for LED0/LED1/LED2 control
|
||||
|
||||
Signed-off-by: YenLin Pan <YenLin.Pan@zyxel.com.tw>
|
||||
---
|
||||
src/init/ssdk_mht_pinctrl.c | 10 ++++++++--
|
||||
1 file changed, 8 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/src/init/ssdk_mht_pinctrl.c b/src/init/ssdk_mht_pinctrl.c
|
||||
index 2debe59..1ae0002 100755
|
||||
--- a/src/init/ssdk_mht_pinctrl.c
|
||||
+++ b/src/init/ssdk_mht_pinctrl.c
|
||||
@@ -33,11 +33,17 @@ static struct mht_pinctrl_setting mht_pin_settings[] = {
|
||||
/*PINs default MUX Setting*/
|
||||
MHT_PIN_SETTING_MUX(0, MHT_PIN_FUNC_INTN_WOL),
|
||||
MHT_PIN_SETTING_MUX(1, MHT_PIN_FUNC_INTN),
|
||||
-#if 0
|
||||
+#if 1
|
||||
MHT_PIN_SETTING_MUX(2, MHT_PIN_FUNC_P0_LED_0),
|
||||
MHT_PIN_SETTING_MUX(3, MHT_PIN_FUNC_P1_LED_0),
|
||||
MHT_PIN_SETTING_MUX(4, MHT_PIN_FUNC_P2_LED_0),
|
||||
MHT_PIN_SETTING_MUX(5, MHT_PIN_FUNC_P3_LED_0),
|
||||
+ MHT_PIN_SETTING_MUX(6, MHT_PIN_FUNC_P0_LED_2),
|
||||
+ MHT_PIN_SETTING_MUX(7, MHT_PIN_FUNC_P1_LED_2),
|
||||
+ MHT_PIN_SETTING_MUX(8, MHT_PIN_FUNC_P2_LED_2),
|
||||
+ MHT_PIN_SETTING_MUX(9, MHT_PIN_FUNC_P3_LED_2),
|
||||
+#endif
|
||||
+#if 0
|
||||
MHT_PIN_SETTING_MUX(6, MHT_PIN_FUNC_PPS_IN),
|
||||
MHT_PIN_SETTING_MUX(7, MHT_PIN_FUNC_TOD_IN),
|
||||
MHT_PIN_SETTING_MUX(8, MHT_PIN_FUNC_RTC_REFCLK_IN),
|
||||
@@ -49,7 +55,7 @@ static struct mht_pinctrl_setting mht_pin_settings[] = {
|
||||
MHT_PIN_SETTING_MUX(13, MHT_PIN_FUNC_P0_TOD_OUT),
|
||||
MHT_PIN_SETTING_MUX(14, MHT_PIN_FUNC_P0_CLK125_TDI),
|
||||
MHT_PIN_SETTING_MUX(15, MHT_PIN_FUNC_P0_SYNC_CLKO_PTP),
|
||||
-#if 0
|
||||
+#if 1
|
||||
MHT_PIN_SETTING_MUX(16, MHT_PIN_FUNC_P0_LED_1),
|
||||
MHT_PIN_SETTING_MUX(17, MHT_PIN_FUNC_P1_LED_1),
|
||||
MHT_PIN_SETTING_MUX(18, MHT_PIN_FUNC_P2_LED_1),
|
||||
--
|
||||
2.34.1
|
||||
|
||||
16
profiles/zyxel_nwa210be.yml
Normal file
16
profiles/zyxel_nwa210be.yml
Normal file
@ -0,0 +1,16 @@
|
||||
---
|
||||
profile: zyxel_nwa210be
|
||||
target: ipq53xx
|
||||
subtarget: generic
|
||||
description: Build image for the zyxel nwa210be
|
||||
image: bin/targets/ipq53xx/generic/openwrt-ipq53xx-zyxel_nwa210be-squashfs-sysupgrade.tar
|
||||
feeds:
|
||||
- name: qca
|
||||
path: ../../feeds/qca-wifi-7
|
||||
packages:
|
||||
- ipq53xx
|
||||
- qca-ssdk-shell
|
||||
include:
|
||||
- ucentral-ap
|
||||
diffconfig: |
|
||||
CONFIG_KERNEL_IPQ_MEM_PROFILE=0
|
||||
Loading…
Reference in New Issue
Block a user