// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * IPQ5332 AP-MI01.6 board device tree source
 *
 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "ipq5332.dtsi"
#include "ipq5332-default-memory.dtsi"

/ {
	model = "SONICFI RAP7110C-341X";
	compatible = "sonicfi,rap7110c-341x","qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";

	aliases {
		serial0 = &blsp1_uart0;
		ethernet0 = "/soc/dp1";
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
	};

	chosen {
		stdout-path = "serial0";
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		ramoops@49c00000 {
			compatible = "ramoops";
			reg = <0x0 0x49c00000 0x0 0x100000>;
			record-size = <0x20000>;
			console-size = <0x20000>;
			pmsg-size = <0x20000>;
		};
	};

	soc@0 {
		mdio:mdio@90000 {
			pinctrl-0 = <&mdio1_pins>;
			pinctrl-names = "default";
			phy-reset-gpio = <&tlmm 49 GPIO_ACTIVE_LOW>;
			phyaddr_fixup = <0xC90F018>;
			uniphyaddr_fixup = <0xC90F014>;
			mdio_clk_fixup; /* MDIO clock sequence fix up flag */
			status = "okay";

			phy0: ethernet-phy@0 {
				compatible ="ethernet-phy-ieee802.3-c45";
				reg = <8>;
				realtek,clkout-disable;
				realtek,aldps-enable;
			};
		};

		ess-instance {
			num_devices = <0x1>;
			ess-switch@3a000000 {
				switch_cpu_bmp = <0x1>;  /* cpu port bitmap */
				switch_lan_bmp = <0x2>; /* lan port bitmap */
				switch_wan_bmp = <0x0>; /* wan port bitmap */
				switch_mac_mode = <0xd>; /* mac mode for uniphy instance0*/
				switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
				switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
				qcom,port_phyinfo {
					port@0 {
						port_id = <1>;
						phy_address = <8>;
						mdiobus = <&mdio>;
						ethernet-phy-ieee802.3-c45;
					};
					port@1 {
						port_id = <2>;
						forced-speed = <2500>;
						forced-duplex = <1>;
					};
				};
			};
		};

		dp1 {
			device_type = "network";
			compatible = "qcom,nss-dp";
			qcom,id = <1>;
			reg = <0x3a500000 0x4000>;
			qcom,mactype = <1>;
			local-mac-address = [000000000000];
			qcom,phy-mdio-addr = <8>;
			qcom,link-poll = <1>;
			phy-mode = "usxgmii";
		};

		/* EDMA host driver configuration for the board */
		edma@3ab00000 {
			qcom,txdesc-ring-start = <4>;		/* Tx desc ring start ID */
			qcom,txdesc-rings = <12>;			/* Total number of Tx desc rings to be provisioned */
			qcom,mht-txdesc-rings = <8>;		/* Extra Tx desc rings to be provisioned for MHT SW ports. */
			qcom,txcmpl-ring-start = <4>;		/* Tx complete ring start ID */
			qcom,txcmpl-rings = <12>;			/* Total number of Tx complete rings to be provisioned */
			qcom,mht-txcmpl-rings = <8>;		/* Extra Tx complete rings to be provisioned for mht sw ports. */
			qcom,rxfill-ring-start = <4>;		/* Rx fill ring start ID */
			qcom,rxfill-rings = <4>;			/* Total number of Rx fill rings to be provisioned */
			qcom,rxdesc-ring-start = <12>;		/* Rx desc ring start ID */
			qcom,rxdesc-rings = <4>;			/* Total number of Rx desc rings to be provisioned */
			qcom,rx-page-mode = <0>;			/* Rx fill ring page mode */
			qcom,tx-map-priority-level = <1>;	/* Tx priority level per port */
			qcom,rx-map-priority-level = <1>;	/* Rx priority level per core */
			qcom,ppeds-num = <2>;				/* Number of PPEDS nodes */
			/* PPE-DS node format: <Rx-fill Tx-cmpl Rx Tx Queue-base Queue-count> */
			qcom,ppeds-map = <1 1 1 1 32 8>,	/* PPEDS Node#0 ring and queue map */
					<2 2 2 2 40 8>;				/* PPEDS Node#1 ring and queue map */
			qcom,txdesc-map = <8 9 10 11>,		/* Port0 per-core Tx ring map */
					<12 13 14 15>,				/* MHT-Port1 per-core Tx ring map */
					<4 5 6 7>,					/* MHT-Port2 per-core Tx ring map/packets from  vp*/
					<16 17 18 19>,				/* MHT-Port3 per-core Tx ring map */
					<20 21 22 23>;				/* MHT-Port4 per-core Tx ring map */
			qcom,txdesc-fc-grp-map = <1 2 3 4 5>;	/* Per GMAC flow control group map */
			qcom,rxfill-map = <4 5 6 7>;		/* Per-core Rx fill ring map */
			qcom,rxdesc-map = <12 13 14 15>;	/* Per-core Rx desc ring map */
			qcom,rx-queue-start = <0>;		/* Rx queue start */
			qcom,rx-ring-queue-map = <0 8 16 24>,	/* Priority 0 queues per-core Rx ring map */
						<1 9 17 25>,	/* Priority 1 queues per-core Rx ring map */
						<2 10 18 26>,	/* Priority 2 queues per-core Rx ring map */
						<3 11 19 27>,	/* Priority 3 queues per-core Rx ring map */
						<4 12 20 28>,	/* Priority 4 queues per-core Rx ring map */
						<5 13 21 29>,	/* Priority 5 queues per-core Rx ring map */
						<6 14 22 30>,	/* Priority 6 queues per-core Rx ring map */
						<7 15 23 31>;	/* Priority 7 queues per-core Rx ring map */
			interrupts = <0 163 4>,		/* Tx complete ring id #4 IRQ info */
				<0 164 4>,			/* Tx complete ring id #5 IRQ info */
				<0 165 4>,			/* Tx complete ring id #6 IRQ info */
				<0 166 4>,			/* Tx complete ring id #7 IRQ info */
				<0 167 4>,			/* Tx complete ring id #8 IRQ info */
				<0 168 4>,			/* Tx complete ring id #9 IRQ info */
				<0 169 4>,			/* Tx complete ring id #10 IRQ info */
				<0 170 4>,			/* Tx complete ring id #11 IRQ info */
				<0 171 4>,			/* Tx complete ring id #12 IRQ info */
				<0 172 4>,			/* Tx complete ring id #13 IRQ info */
				<0 173 4>,			/* Tx complete ring id #14 IRQ info */
				<0 174 4>,			/* Tx complete ring id #15 IRQ info */
				<0 139 4>,			/* Rx desc ring id #12 IRQ info */
				<0 140 4>,			/* Rx desc ring id #13 IRQ info */
				<0 141 4>,			/* Rx desc ring id #14 IRQ info */
				<0 142 4>,			/* Rx desc ring id #15 IRQ info */
				<0 191 4>,			/* Misc error IRQ info */
				<0 160 4>,			/* PPEDS Node #1(TxComp ring id #1) TxComplete IRQ info */
				<0 128 4>,			/* PPEDS Node #1(Rx Desc ring id #1) Rx Desc IRQ info */
				<0 152 4>,			/* PPEDS Node #1(RxFill Desc ring id #1) Rx Fill IRQ info */
				<0 161 4>,			/* PPEDS Node #2(TxComp ring id #2) TxComplete IRQ info */
				<0 129 4>,			/* PPEDS Node #2(Rx Desc ring id #2) Rx Desc IRQ info */
				<0 153 4>,			/* PPEDS Node #2(RxFill Desc ring id #2) Rx Fill IRQ info */
				<0 175 4>,			/* MHT port Tx complete ring id #16 IRQ info */
				<0 176 4>,			/* MHT port Tx complete ring id #17 IRQ info */
				<0 177 4>,			/* MHT port Tx complete ring id #18 IRQ info */
				<0 178 4>,			/* MHT port Tx complete ring id #19 IRQ info */
				<0 179 4>,			/* MHT port Tx complete ring id #20 IRQ info */
				<0 180 4>,			/* MHT port Tx complete ring id #21 IRQ info */
				<0 181 4>,			/* MHT port Tx complete ring id #22 IRQ info */
				<0 182 4>;			/* MHT port Tx complete ring id #23 IRQ info */
		};

		gpio_keys {
			compatible = "gpio-keys";
			pinctrl-0 = <&button_pins>;
			pinctrl-names = "default";
			button@1 {
				label = "reset";
				linux,code = <KEY_RESTART>;
				gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
				linux,input-type = <1>;
				debounce-interval = <60>;
			};
		};

		pwmleds {
			compatible = "pwm-leds";

			red {
				label = "pwm:red";
				pwms = <&pwm 0 1250000>;
				max-brightness = <160>;
				linux,default-trigger = "none";
			};

			green {
				label = "pwm:green";
				pwms = <&pwm 2 1250000>;
				max-brightness = <160>;
				linux,default-trigger = "none";
			};

			led_power: blue {
				label = "pwm:blue";
				pwms = <&pwm 1 1250000>;
				max-brightness = <160>;
				linux,default-trigger = "none";
			};
		};

		wsi: wsi {
			id = <0>;
			num_chip = <2>;
			chip_info = <0 1 1>,
				    <1 1 0>;
		};
	};
};

&tlmm {
	button_pins: button-state {
		pins = "gpio24";
		function = "gpio";
		drive-strength = <8>;
		bias-pull-up;
	};

	sdc_default_state: sdc-default-state {
		clk-pins {
			pins = "gpio13";
			function = "sdc_clk";
			drive-strength = <8>;
			bias-disable;
		};

		cmd-pins {
			pins = "gpio12";
			function = "sdc_cmd";
			drive-strength = <8>;
			bias-pull-up;
		};

		data-pins {
			pins = "gpio8", "gpio9", "gpio10", "gpio11";
			function = "sdc_data";
			drive-strength = <8>;
			bias-pull-up;
		};
	};

	pwm_pins: pwm_pinmux {
			/* PWM LED GREEN */
			mux_1 {
				pins = "gpio30";
				function = "pwm1";
				drive-strength = <8>;
			};
			/* PWM LED BLUE */
			mux_2 {
				pins = "gpio31";
				function = "pwm1";
				drive-strength = <8>;
			};
			/* PWM LED RED */
			mux_3 {
				pins = "gpio32";
				function = "pwm1";
				drive-strength = <8>;
			};
	};

	pcie1_default_state: pcie1-default-state {
		pins = "gpio47";
		function = "gpio";
		drive-strength = <8>;
		bias-pull-up;
		output-low;
	};
};

&wifi0 {
	qcom,rproc = <&q6_wcss_pd1>;
	qcom,rproc_rpd = <&q6v5_wcss>;
	qcom,multipd_arch;
	qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
#if defined(__CNSS2__)
	mem-region = <&q6_region>;
#else
	memory-region = <&q6_region>;
	qcom,wsi = <&wsi>;
	qcom,wsi_index = <0>;
#endif
	qcom,board_id = <0x12>;
	status = "okay";
};

/* QCN9224 5G+6G */
/*
&wifi2 {
	hremote_node = <&qcn9224_pcie1>;
	board_id = <0x1015>;
	status = "okay";
}; */

&qcn9224_pcie1 {
	status = "okay";
};

&blsp1_uart0 {
	pinctrl-0 = <&serial_0_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&sdhc {
	bus-width = <4>;
	max-frequency = <192000000>;
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;
	non-removable;
	pinctrl-0 = <&sdc_default_state>;
	pinctrl-names = "default";
	status = "okay";
};

&sleep_clk {
	clock-frequency = <32000>;
};

&xo {
	clock-frequency = <24000000>;
};

&qpic_bam {
	status = "okay";
};

&pcie1_phy_x2 {
	status = "okay";
};

&pcie1 {
	pinctrl-0 = <&pcie1_default_state>;
	pinctrl-names = "default";
	perst-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
	status = "okay";

	pcie1_rp {
		reg = <0 0 0 0 0>;

		qcom,mhi@1 {
			reg = <0 0 0 0 0>;
			boot-args = <0x2 0x4 0x34 0x3 0x0 0x0     /* MX Rail, GPIO52, Drive strength 0x3 */
					0x4 0x4 0x18 0x3 0x0 0x0  /* RFA1p2 Rail, GPIO24, Drive strength 0x3 */
					0x0 0x4 0x0 0x0 0x0 0x0>; /* End of arguments */
			memory-region = <&qcn9224_pcie1>;
			qcom,wsi = <&wsi>;
			qcom,wsi_index = <1>;
			qcom,board_id = <0x1015>;
		};
	};
};

&license_manager {
	status = "okay";
};

&usb3 {
	qcom,multiplexed-phy;
	status = "disabled";
};

&pwm {
	pinctrl-0 = <&pwm_pins>;
	used-pwm-indices = <1>, <1>, <1>, <0>;
	pinctrl-names = "default";
	status = "okay";
};

&hs_m31phy_0 {
	status = "okay";
};

&ssuniphy_0 {
	status = "okay";
};