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wlan-ap-Telecominfraproject/feeds/ipq95xx/mac80211/patches/qca/211-ath11k-use-reserved-memory-from-bootargs.patch
John Crispin 144c5d00f4 ipq95xx/mac80211: update to ATH12.3-CS 
Signed-off-by: John Crispin <john@phrozen.org>
2024-02-28 18:56:21 +01:00

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From b1b771b665e2eba1369c3f7896b7236e8c03886d Mon Sep 17 00:00:00 2001
From: Anilkumar Kolli <akolli@codeaurora.org>
Date: Wed, 23 Sep 2020 22:20:58 +0530
Subject: [PATCH] ath11k: use reserved memory from bootargs
QCN9000 FW uses HOST DDR memory.
For x86 reserve memory using memmap=60M$0x70000000
Identify the 60MB continuous memory with in 32bit address space
and reserve through kernel cmd line parameters.
when the FW request for the DDR HOST memory, send the reserved
address space offset and size in QMI.
Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org>
---
drivers/net/wireless/ath/ath11k/core.c | 5 +++++
drivers/net/wireless/ath/ath11k/qmi.c | 29 +++++++++++++++++++++++++----
drivers/net/wireless/ath/ath11k/qmi.h | 1 +
3 files changed, 31 insertions(+), 4 deletions(-)
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -48,6 +48,11 @@ bool ath11k_collect_dump = false;
EXPORT_SYMBOL(ath11k_collect_dump);
#endif
+unsigned int ath11k_host_ddr_addr;
+EXPORT_SYMBOL(ath11k_host_ddr_addr);
+module_param_named(host_ddr_addr, ath11k_host_ddr_addr, uint, 0644);
+MODULE_PARM_DESC(host_ddr_addr, "host ddr addr for FW");
+
struct ath11k_base *ath11k_soc[MAX_SOCS];
static const struct ath11k_hw_params ath11k_hw_params[] = {
--- a/drivers/net/wireless/ath/ath11k/qmi.c
+++ b/drivers/net/wireless/ath/ath11k/qmi.c
@@ -2655,7 +2655,7 @@ static int ath11k_qmi_assign_target_mem_
struct device *dev = ab->dev;
struct device_node *hremote_node = NULL;
struct resource res;
- u32 host_ddr_sz;
+ u32 host_ddr_sz, addr;
int i, idx, ret;
for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) {
@@ -2682,7 +2682,17 @@ static int ath11k_qmi_assign_target_mem_
return -EINVAL;
}
- ab->qmi.target_mem[idx].paddr = res.start;
+ /* This is HACK
+ * QCN9074 Firmware needs contiguous 60MB HOST DDR memory
+ * use reserve memory from bootargs x86
+ * HACK reserve memory using memmap=60M$0x70000000
+ */
+
+ if (ath11k_host_ddr_addr)
+ ab->qmi.target_mem[idx].paddr = ath11k_host_ddr_addr;
+ else
+ ab->qmi.target_mem[idx].paddr = res.start;
+
ab->qmi.target_mem[idx].iaddr =
ioremap(ab->qmi.target_mem[idx].paddr,
ab->qmi.target_mem[i].size);
@@ -2708,13 +2718,17 @@ static int ath11k_qmi_assign_target_mem_
if (hremote_node) {
ab->qmi.target_mem[idx].paddr =
res.start + host_ddr_sz;
- ab->qmi.target_mem[idx].iaddr =
- ioremap(ab->qmi.target_mem[idx].paddr,
- ab->qmi.target_mem[i].size);
+ } else if (ath11k_host_ddr_addr) {
+ ab->qmi.target_mem[idx].paddr = ath11k_host_ddr_addr +
+ ATH11K_HOST_DDR_CALDB_OFFSET;
} else {
ab->qmi.target_mem[idx].paddr =
ATH11K_QMI_CALDB_ADDRESS;
}
+
+ ab->qmi.target_mem[idx].iaddr =
+ ioremap(ab->qmi.target_mem[idx].paddr,
+ ab->qmi.target_mem[i].size);
} else {
ab->qmi.target_mem[idx].paddr = 0;
ab->qmi.target_mem[idx].vaddr = NULL;
@@ -3720,7 +3734,9 @@ int ath11k_qmi_pci_alloc_qdss_mem(struct
{
struct ath11k_base *ab = qmi->ab;
struct device *dev = ab->dev;
- int i;
+ struct device_node *hremote_node = NULL;
+ struct resource res;
+ int i, ret;
u32 addr = 0;
if (ab->qmi.qdss_mem_seg_len > 1) {
@@ -3738,11 +3754,33 @@ int ath11k_qmi_pci_alloc_qdss_mem(struct
return -ENOMEM;
}
- if (of_property_read_u32(dev->of_node,
- "etr-addr", &addr)) {
- ath11k_warn(ab, "qmi fail to get etr-addr in dt\n");
- return -ENOMEM;
+ hremote_node = of_parse_phandle(dev->of_node, "memory-region", 0);
+ if (!hremote_node) {
+ ath11k_dbg(ab, ATH11K_DBG_QMI,
+ "qmi fail to get hremote_node\n");
+ return -ENODEV;
+ }
+
+ ret = of_address_to_resource(hremote_node, 0, &res);
+ of_node_put(hremote_node);
+ if (ret) {
+ ath11k_dbg(ab, ATH11K_DBG_QMI,
+ "qmi fail to get reg from hremote\n");
+ return ret;
}
+
+ if (res.end - res.start + 1 < ab->qmi.target_mem[i].size) {
+ ath11k_dbg(ab, ATH11K_DBG_QMI,
+ "qmi fail to assign memory of sz\n");
+ return -EINVAL;
+ }
+
+ if (ath11k_host_ddr_addr)
+ addr = ath11k_host_ddr_addr +
+ ATH11K_HOST_DDR_QDSS_OFFSET;
+ else
+ addr = res.start + ATH11K_HOST_DDR_QDSS_OFFSET;
+
ab->qmi.qdss_mem[i].paddr = (phys_addr_t)addr;
ab->qmi.qdss_mem[i].vaddr =
ioremap(ab->qmi.qdss_mem[i].paddr,
--- a/drivers/net/wireless/ath/ath11k/qmi.h
+++ b/drivers/net/wireless/ath/ath11k/qmi.h
@@ -34,9 +34,17 @@
#define ATH11K_QMI_DEFAULT_QDSS_CONFIG_FILE_NAME "qdss_trace_config.bin"
#ifdef CPTCFG_ATH11K_MEM_PROFILE_512M
+#define ATH11K_HOST_DDR_M3_OFFSET 0xC00000
+#define ATH11K_HOST_DDR_QDSS_OFFSET 0xD00000
+#define ATH11K_HOST_DDR_CALDB_OFFSET 0xE00000
+#define ATH11K_HOST_DDR_PAGEABLE_OFFSET 0x1600000
#define ATH11K_QMI_IPQ8074_M3_DUMP_ADDRESS 0x4E800000
#define ATH11K_QMI_IPQ6018_M3_DUMP_ADDRESS 0x4E300000
#else
+#define ATH11K_HOST_DDR_M3_OFFSET 0x2300000
+#define ATH11K_HOST_DDR_QDSS_OFFSET 0x2400000
+#define ATH11K_HOST_DDR_CALDB_OFFSET 0x2500000
+#define ATH11K_HOST_DDR_PAGEABLE_OFFSET 0x2D00000
#define ATH11K_QMI_IPQ8074_M3_DUMP_ADDRESS 0x51000000
#define ATH11K_QMI_IPQ6018_M3_DUMP_ADDRESS 0x50100000
#endif
@@ -60,9 +68,8 @@
#define ATH11K_QMI_DEVICE_BAR_SIZE 0x200000
-#define ATH11K_HOST_DDR_M3_OFFSET 0x2300000
-
struct ath11k_base;
+extern unsigned int ath11k_host_ddr_addr;
enum ath11k_qmi_file_type {
ATH11K_QMI_FILE_TYPE_BDF_GOLDEN,
--- a/drivers/net/wireless/ath/ath11k/pci.c
+++ b/drivers/net/wireless/ath/ath11k/pci.c
@@ -784,8 +784,7 @@ static int ath11k_pci_probe(struct pci_d
* allocate memory for FW in DDR, set fixed_mem_region to true for
* these pltforms supports reserved memory.
*/
- ret = of_property_read_u32(ab->dev->of_node, "base-addr", &addr);
- if (ret == 0)
+ if (ath11k_host_ddr_addr || !ret)
ab->hw_params.fixed_mem_region = true;
ret = ath11k_pci_claim(ab_pci, pdev);
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