mirror of
https://github.com/Telecominfraproject/wlan-ap.git
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42 lines
1.3 KiB
Diff
42 lines
1.3 KiB
Diff
From cd94cf4a05f3775a845bc3c57f8c529f65bdc745 Mon Sep 17 00:00:00 2001
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From: Nick Hainke <vincent@systemli.org>
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Date: Thu, 16 Mar 2023 17:03:14 +0530
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Subject: [PATCH 055/281] OpenWrt:
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499-mtd-spi-nor-disable-16-bit-sr-for-macronix.patch
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mtd: spi-nor: disable 16-bit-sr for macronix
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Macronix flash chips seem to consist of only one status register.
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These chips will not work with the "16-bit Write Status (01h) Command".
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Disable SNOR_F_HAS_16BIT_SR for all Macronix chips.
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Tested with MX25L6405D.
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Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on
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lock()/unlock()")
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Signed-off-by: David Bauer <mail@david-bauer.net>
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Signed-off-by: Nick Hainke <vincent@systemli.org>
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Change-Id: I88566e467fe12852b84a731a6b325005d48e0825
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Signed-off-by: Ram Chandra Jangir <quic_rjangir@quicinc.com>
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---
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drivers/mtd/spi-nor/macronix.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
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index 903001d4e849..9cf2b090a644 100644
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--- a/drivers/mtd/spi-nor/macronix.c
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+++ b/drivers/mtd/spi-nor/macronix.c
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@@ -107,6 +107,7 @@ static void macronix_nor_default_init(struct spi_nor *nor)
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{
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nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
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nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode;
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+ nor->flags &= ~SNOR_F_HAS_16BIT_SR;
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nor->flags |= SNOR_F_HAS_LOCK;
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}
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--
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2.17.1
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