wlan-ap-Telecominfraproject/feeds/qca-wifi-7/ipq53xx/patches-6.1/0055-OpenWrt-499-mtd-spi-nor-disable-16-bit-sr-for-macron.patch
John Crispin 68cf54d9f7 qca-wifi-7: update to ath12.5.5
Signed-off-by: John Crispin <john@phrozen.org>
2025-02-27 12:45:52 +01:00

42 lines
1.3 KiB
Diff

From cd94cf4a05f3775a845bc3c57f8c529f65bdc745 Mon Sep 17 00:00:00 2001
From: Nick Hainke <vincent@systemli.org>
Date: Thu, 16 Mar 2023 17:03:14 +0530
Subject: [PATCH 055/281] OpenWrt:
499-mtd-spi-nor-disable-16-bit-sr-for-macronix.patch
mtd: spi-nor: disable 16-bit-sr for macronix
Macronix flash chips seem to consist of only one status register.
These chips will not work with the "16-bit Write Status (01h) Command".
Disable SNOR_F_HAS_16BIT_SR for all Macronix chips.
Tested with MX25L6405D.
Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on
lock()/unlock()")
Signed-off-by: David Bauer <mail@david-bauer.net>
Signed-off-by: Nick Hainke <vincent@systemli.org>
Change-Id: I88566e467fe12852b84a731a6b325005d48e0825
Signed-off-by: Ram Chandra Jangir <quic_rjangir@quicinc.com>
---
drivers/mtd/spi-nor/macronix.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 903001d4e849..9cf2b090a644 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -107,6 +107,7 @@ static void macronix_nor_default_init(struct spi_nor *nor)
{
nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode;
+ nor->flags &= ~SNOR_F_HAS_16BIT_SR;
nor->flags |= SNOR_F_HAS_LOCK;
}
--
2.17.1