gl-infra-builder-FUjr/patches-19.x/0012-ramips-fix-reset-for-mt7530.patch
Jianhui Zhao 3c428c0b3c patches-19.x: fix mt7530 reset
Signed-off-by: Jianhui Zhao <jianhui.zhao@gl-inet.com>
2021-08-27 19:05:01 +08:00

53 lines
1.4 KiB
Diff

From 9cb68bb784cc66bfc5371400e1c325eb2a8e7270 Mon Sep 17 00:00:00 2001
From: Jianhui Zhao <jianhui.zhao@gl-inet.com>
Date: Mon, 26 Apr 2021 15:50:36 +0800
Subject: [PATCH 11/26] ramips: fix reset for mt7530
Signed-off-by: Jianhui Zhao <jianhui.zhao@gl-inet.com>
---
.../drivers/net/ethernet/mediatek/mt7530.c | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/mt7530.c b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/mt7530.c
index 5216cb5c66..61dfa98e85 100644
--- a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/mt7530.c
+++ b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/mt7530.c
@@ -197,6 +197,7 @@ struct mt7530_priv {
struct switch_dev swdev;
bool global_vlan_enable;
+ bool reset;
struct mt7530_vlan_entry vlan_entries[MT7530_NUM_VLANS];
struct mt7530_port_entry port_entries[MT7530_NUM_PORTS];
};
@@ -276,6 +277,8 @@ mt7530_reset_switch(struct switch_dev *dev)
priv->vlan_entries[i].vid = i;
}
+ priv->reset = 1;
+
return 0;
}
@@ -637,6 +640,17 @@ mt7530_apply_config(struct switch_dev *dev)
mt7530_w32(priv, REG_ESW_PORT_PPBV1(i), val);
}
+ if (priv->reset) {
+ priv->reset = 0;
+
+ /* reset all PHYs */
+ for (i = 0; i <= 4; i++) {
+ u32 val = mdiobus_read(priv->bus, i, MII_BMCR);
+ val |= BMCR_RESET;
+ mdiobus_write(priv->bus, i, MII_BMCR, val);
+ }
+ }
+
return 0;
}
--
2.17.1