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nss-dp: edma-v1: add support for threaded napi
Add support for threaded napi. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
parent
75129b9dbc
commit
92aa9ba865
@ -0,0 +1,267 @@
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From 21ffe52de4834569486619b93a059a7a92000827 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Fri, 24 Jun 2022 18:07:32 +0200
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Subject: [PATCH 18/21] edma_v1: move rx napi to per ring implementation
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Move rx napi to per ring implementation.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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hal/dp_ops/edma_dp/edma_v1/edma_cfg.c | 1 +
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hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 25 +++++--
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hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 4 +-
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hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 76 +++++++-------------
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4 files changed, 47 insertions(+), 59 deletions(-)
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diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
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index 2e98aaf..20d055e 100644
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--- a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
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+++ b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
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@@ -410,6 +410,7 @@ static int edma_setup_ring_resources(struct edma_hw *ehw)
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*/
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for (i = 0; i < ehw->rxdesc_rings; i++) {
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rxdesc_ring = &ehw->rxdesc_ring[i];
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+ rxdesc_ring->ehw = ehw;
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rxdesc_ring->count = EDMA_RING_SIZE;
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rxdesc_ring->id = ehw->rxdesc_ring_start + i;
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diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
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index 8932f40..565564a 100644
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--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
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+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
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@@ -407,7 +407,9 @@ void edma_cleanup(bool is_dp_override)
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synchronize_irq(edma_hw.misc_intr);
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free_irq(edma_hw.misc_intr, (void *)(edma_hw.pdev));
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- netif_napi_del(&edma_hw.rx_napi);
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+ for (i = 0; i < edma_hw.rxdesc_rings; i++)
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+ netif_napi_del(&edma_hw.rxdesc_ring[i].napi);
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+
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netif_napi_del(&edma_hw.tx_napi);
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edma_hw.napi_added = 0;
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}
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@@ -443,6 +445,8 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
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uint32_t tx_desc_ring, uint32_t rx_desc_ring,
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uint32_t mode)
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{
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+ int i;
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+
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if (!dpc->dev)
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return NSS_DP_FAILURE;
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@@ -452,7 +456,9 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
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if (edma_hw.active++ != 0)
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return NSS_DP_SUCCESS;
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- napi_enable(&edma_hw.rx_napi);
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+ for (i = 0; i < edma_hw.rxdesc_rings; i++)
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+ napi_enable(&edma_hw.rxdesc_ring[i].napi);
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+
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napi_enable(&edma_hw.tx_napi);
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/*
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@@ -469,6 +475,8 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
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*/
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static int edma_if_close(struct nss_dp_data_plane_ctx *dpc)
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{
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+ int i;
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+
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if (--edma_hw.active != 0)
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return NSS_DP_SUCCESS;
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@@ -480,7 +488,9 @@ static int edma_if_close(struct nss_dp_data_plane_ctx *dpc)
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/*
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* Disable NAPI
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*/
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- napi_disable(&edma_hw.rx_napi);
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+ for (i = 0; i < edma_hw.rxdesc_rings; i++)
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+ napi_disable(&edma_hw.rxdesc_ring[i].napi);
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+
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napi_disable(&edma_hw.tx_napi);
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return NSS_DP_SUCCESS;
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}
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@@ -749,7 +759,7 @@ static int edma_irq_init(void)
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for (i = 0; i < edma_hw.rxdesc_rings; i++) {
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err = request_irq(edma_hw.rxdesc_intr[i],
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edma_rx_handle_irq, IRQF_SHARED,
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- "edma_rxdesc", (void *)edma_hw.pdev);
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+ "edma_rxdesc", (void *)&edma_hw.rxdesc_ring[i]);
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if (err) {
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pr_debug("RXDESC ring IRQ:%d request failed\n",
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edma_hw.rxdesc_intr[i]);
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@@ -814,6 +824,8 @@ rx_fill_ring_intr_req_fail:
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*/
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static int edma_register_netdevice(struct net_device *netdev, uint32_t macid)
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{
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+ int i;
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+
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if (!netdev) {
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pr_info("nss_dp_edma: Invalid netdev pointer %px\n", netdev);
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return -EINVAL;
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@@ -839,8 +851,9 @@ static int edma_register_netdevice(struct net_device *netdev, uint32_t macid)
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* NAPI add
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*/
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if (!edma_hw.napi_added) {
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- netif_napi_add(netdev, &edma_hw.rx_napi, edma_rx_napi,
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- NAPI_POLL_WEIGHT);
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+ for (i = 0; i < edma_hw.rxdesc_rings; i++)
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+ netif_napi_add(netdev, &edma_hw.rxdesc_ring[i].napi, edma_rx_napi,
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+ NAPI_POLL_WEIGHT);
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netif_tx_napi_add(netdev, &edma_hw.tx_napi, edma_tx_napi,
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NAPI_POLL_WEIGHT);
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diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
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index a45fb99..01a6453 100644
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--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
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+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
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@@ -116,6 +116,8 @@ struct edma_rxfill_ring {
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* RxDesc ring
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*/
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struct edma_rxdesc_ring {
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+ struct napi_struct napi; /* napi structure */
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+ struct edma_hw *ehw;
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uint32_t id; /* RXDESC ring number */
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struct edma_rxfill_ring *rxfill; /* RXFILL ring used */
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void *desc; /* descriptor ring virtual address */
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@@ -172,8 +174,6 @@ enum edma_tx {
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* EDMA private data structure
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*/
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struct edma_hw {
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- struct napi_struct rx_napi;
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- /* napi structure */
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struct napi_struct tx_napi;
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/* napi structure */
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struct net_device *netdev_arr[EDMA_MAX_GMACS];
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diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
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index 1fb8cbf..1d2fa8a 100644
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--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
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+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
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@@ -427,7 +427,7 @@ static uint32_t edma_clean_rx(struct edma_hw *ehw,
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nss_phy_tstamp_rx_buf(ndev, skb);
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else
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#if defined(NSS_DP_ENABLE_NAPI_GRO)
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- napi_gro_receive(&ehw->napi, skb);
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+ napi_gro_receive(&rxdesc_ring->napi, skb);
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#else
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netif_receive_skb(skb);
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#endif
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@@ -462,17 +462,13 @@ next_rx_desc:
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*/
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int edma_rx_napi(struct napi_struct *napi, int budget)
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{
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- struct edma_hw *ehw = container_of(napi, struct edma_hw, rx_napi);
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- struct edma_rxdesc_ring *rxdesc_ring = NULL;
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- struct edma_rxfill_ring *rxfill_ring = NULL;
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+ struct edma_rxdesc_ring *rxdesc_ring = container_of(napi, struct edma_rxdesc_ring, napi);
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+ struct edma_rxfill_ring *rxfill_ring = rxdesc_ring->rxfill;
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+ struct edma_hw *ehw = rxdesc_ring->ehw;
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int work_done = 0;
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- int i;
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- for (i = 0; i < ehw->rxdesc_rings; i++) {
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- rxdesc_ring = &ehw->rxdesc_ring[i];
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- work_done += edma_clean_rx(ehw, budget, rxdesc_ring);
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- }
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+ work_done += edma_clean_rx(ehw, budget, rxdesc_ring);
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/*
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* TODO - rework and fix the budget control
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@@ -486,22 +482,15 @@ int edma_rx_napi(struct napi_struct *napi, int budget)
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/*
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* Set RXDESC ring interrupt mask
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*/
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- for (i = 0; i < ehw->rxdesc_rings; i++) {
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- rxdesc_ring = &ehw->rxdesc_ring[i];
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- edma_reg_write(
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- EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
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- ehw->rxdesc_intr_mask);
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- }
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+ edma_reg_write(
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+ EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
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+ ehw->rxdesc_intr_mask);
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/*
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* Set RXFILL ring interrupt mask
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*/
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- for (i = 0; i < ehw->rxfill_rings; i++) {
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- rxfill_ring = &ehw->rxfill_ring[i];
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- edma_reg_write(EDMA_REG_RXFILL_INT_MASK(
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- rxfill_ring->id),
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- edma_hw.rxfill_intr_mask);
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- }
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+ edma_reg_write(EDMA_REG_RXFILL_INT_MASK(rxfill_ring->id),
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+ edma_hw.rxfill_intr_mask);
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}
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return work_done;
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}
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@@ -761,51 +750,36 @@ irqreturn_t edma_handle_misc_irq(int irq, void *ctx)
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*/
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irqreturn_t edma_rx_handle_irq(int irq, void *ctx)
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{
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- uint32_t reg_data = 0;
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+ struct edma_rxdesc_ring *rxdesc_ring = (struct edma_rxdesc_ring *)ctx;
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uint32_t rxdesc_intr_status = 0;
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- int i;
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- struct edma_rxdesc_ring *rxdesc_ring = NULL;
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- struct edma_hw *ehw = NULL;
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- struct platform_device *pdev = (struct platform_device *)ctx;
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-
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- ehw = platform_get_drvdata(pdev);
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- if (!ehw) {
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- pr_info("Unable to retrieve platrofm data");
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- return IRQ_HANDLED;
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- }
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+ uint32_t reg_data = 0;
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/*
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* Read RxDesc intr status
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*/
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- for (i = 0; i < ehw->rxdesc_rings; i++) {
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- rxdesc_ring = &ehw->rxdesc_ring[i];
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- reg_data = edma_reg_read(
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- EDMA_REG_RXDESC_INT_STAT(rxdesc_ring->id));
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- rxdesc_intr_status |= reg_data &
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- EDMA_RXDESC_RING_INT_STATUS_MASK;
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+ reg_data = edma_reg_read(
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+ EDMA_REG_RXDESC_INT_STAT(rxdesc_ring->id));
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+ rxdesc_intr_status |= reg_data &
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+ EDMA_RXDESC_RING_INT_STATUS_MASK;
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- /*
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- * Disable RxDesc intr
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- */
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- edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
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- EDMA_MASK_INT_DISABLE);
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- }
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+ /*
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+ * Disable RxDesc intr
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+ */
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+ edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
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+ EDMA_MASK_INT_DISABLE);
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if (rxdesc_intr_status == 0)
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return IRQ_NONE;
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- for (i = 0; i < ehw->rxdesc_rings; i++) {
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- rxdesc_ring = &ehw->rxdesc_ring[i];
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- edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
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- EDMA_MASK_INT_DISABLE);
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- }
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+ edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
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+ EDMA_MASK_INT_DISABLE);
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/*
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*TODO - per core NAPI
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*/
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if (rxdesc_intr_status)
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- if (likely(napi_schedule_prep(&ehw->rx_napi)))
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- __napi_schedule(&ehw->rx_napi);
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+ if (likely(napi_schedule_prep(&rxdesc_ring->napi)))
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+ __napi_schedule(&rxdesc_ring->napi);
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return IRQ_HANDLED;
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}
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--
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2.36.1
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@ -0,0 +1,206 @@
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From de169603dcfa7a33026587c4cef9938cc6c28b1e Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Fri, 24 Jun 2022 18:25:16 +0200
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Subject: [PATCH 19/21] edma_v1: move tx napi to per ring implementation
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Move tx napi to per ring implementation.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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hal/dp_ops/edma_dp/edma_v1/edma_cfg.c | 1 +
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hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 17 +++---
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hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 4 +-
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hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 55 +++++++-------------
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4 files changed, 32 insertions(+), 45 deletions(-)
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diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
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index 20d055e..6f2c082 100644
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--- a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
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+++ b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
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@@ -373,6 +373,7 @@ static int edma_setup_ring_resources(struct edma_hw *ehw)
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*/
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for (i = 0; i < ehw->txcmpl_rings; i++) {
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txcmpl_ring = &ehw->txcmpl_ring[i];
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+ txcmpl_ring->ehw = ehw;
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txcmpl_ring->count = EDMA_RING_SIZE;
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txcmpl_ring->id = ehw->txcmpl_ring_start + i;
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diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
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index 565564a..49c7f8c 100644
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--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
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+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
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@@ -410,7 +410,8 @@ void edma_cleanup(bool is_dp_override)
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for (i = 0; i < edma_hw.rxdesc_rings; i++)
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netif_napi_del(&edma_hw.rxdesc_ring[i].napi);
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- netif_napi_del(&edma_hw.tx_napi);
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+ for (i = 0; i < edma_hw.txcmpl_rings; i++)
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+ netif_napi_del(&edma_hw.txcmpl_ring[i].napi);
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edma_hw.napi_added = 0;
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}
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@@ -459,7 +460,8 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
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for (i = 0; i < edma_hw.rxdesc_rings; i++)
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napi_enable(&edma_hw.rxdesc_ring[i].napi);
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- napi_enable(&edma_hw.tx_napi);
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+ for (i = 0; i < edma_hw.txcmpl_rings; i++)
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+ napi_enable(&edma_hw.txcmpl_ring[i].napi);
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/*
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* Enable the interrupt masks.
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@@ -491,7 +493,9 @@ static int edma_if_close(struct nss_dp_data_plane_ctx *dpc)
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for (i = 0; i < edma_hw.rxdesc_rings; i++)
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napi_disable(&edma_hw.rxdesc_ring[i].napi);
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- napi_disable(&edma_hw.tx_napi);
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+ for (i = 0; i < edma_hw.txcmpl_rings; i++)
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+ napi_disable(&edma_hw.txcmpl_ring[i].napi);
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+
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return NSS_DP_SUCCESS;
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}
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@@ -730,7 +734,7 @@ static int edma_irq_init(void)
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for (i = 0; i < edma_hw.txcmpl_rings; i++) {
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err = request_irq(edma_hw.txcmpl_intr[i],
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edma_tx_handle_irq, IRQF_SHARED,
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- "edma_txcmpl", (void *)edma_hw.pdev);
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+ "edma_txcmpl", (void *)&edma_hw.txcmpl_ring[i]);
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if (err) {
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pr_debug("TXCMPL ring IRQ:%d request failed\n",
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edma_hw.txcmpl_intr[i]);
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@@ -855,8 +859,9 @@ static int edma_register_netdevice(struct net_device *netdev, uint32_t macid)
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netif_napi_add(netdev, &edma_hw.rxdesc_ring[i].napi, edma_rx_napi,
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NAPI_POLL_WEIGHT);
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- netif_tx_napi_add(netdev, &edma_hw.tx_napi, edma_tx_napi,
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- NAPI_POLL_WEIGHT);
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+ for (i = 0; i < edma_hw.txcmpl_rings; i++)
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+ netif_tx_napi_add(netdev, &edma_hw.txcmpl_ring[i].napi, edma_tx_napi,
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+ NAPI_POLL_WEIGHT);
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/*
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* Register the interrupt handlers and enable interrupts
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*/
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diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||
index 01a6453..8ec7e35 100644
|
||||
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||
@@ -95,6 +95,8 @@ struct edma_txdesc_ring {
|
||||
* TxCmpl ring
|
||||
*/
|
||||
struct edma_txcmpl_ring {
|
||||
+ struct napi_struct napi; /* napi structure */
|
||||
+ struct edma_hw *ehw;
|
||||
uint32_t id; /* TXCMPL ring number */
|
||||
void *desc; /* descriptor ring virtual address */
|
||||
dma_addr_t dma; /* descriptor ring physical address */
|
||||
@@ -174,8 +176,6 @@ enum edma_tx {
|
||||
* EDMA private data structure
|
||||
*/
|
||||
struct edma_hw {
|
||||
- struct napi_struct tx_napi;
|
||||
- /* napi structure */
|
||||
struct net_device *netdev_arr[EDMA_MAX_GMACS];
|
||||
/* netdev for each gmac port */
|
||||
struct device_node *device_node;
|
||||
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||
index 1d2fa8a..8221a9c 100644
|
||||
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||
@@ -501,17 +501,14 @@ int edma_rx_napi(struct napi_struct *napi, int budget)
|
||||
*/
|
||||
int edma_tx_napi(struct napi_struct *napi, int budget)
|
||||
{
|
||||
- struct edma_hw *ehw = container_of(napi, struct edma_hw, tx_napi);
|
||||
- struct edma_txcmpl_ring *txcmpl_ring = NULL;
|
||||
+ struct edma_txcmpl_ring *txcmpl_ring = container_of(napi, struct edma_txcmpl_ring, napi);
|
||||
+ struct edma_hw *ehw = txcmpl_ring->ehw;
|
||||
|
||||
struct net_device *ndev;
|
||||
int work_done = 0;
|
||||
int i;
|
||||
|
||||
- for (i = 0; i < ehw->txcmpl_rings; i++) {
|
||||
- txcmpl_ring = &ehw->txcmpl_ring[i];
|
||||
- edma_clean_tx(ehw, txcmpl_ring);
|
||||
- }
|
||||
+ edma_clean_tx(ehw, txcmpl_ring);
|
||||
|
||||
/*
|
||||
* Resume netdev Tx queue
|
||||
@@ -542,12 +539,8 @@ int edma_tx_napi(struct napi_struct *napi, int budget)
|
||||
/*
|
||||
* Set TXCMPL ring interrupt mask
|
||||
*/
|
||||
- for (i = 0; i < ehw->txcmpl_rings; i++) {
|
||||
- txcmpl_ring = &ehw->txcmpl_ring[i];
|
||||
- edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||
- ehw->txcmpl_intr_mask);
|
||||
- }
|
||||
-
|
||||
+ edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||
+ ehw->txcmpl_intr_mask);
|
||||
}
|
||||
return work_done;
|
||||
}
|
||||
@@ -790,35 +783,23 @@ irqreturn_t edma_rx_handle_irq(int irq, void *ctx)
|
||||
*/
|
||||
irqreturn_t edma_tx_handle_irq(int irq, void *ctx)
|
||||
{
|
||||
- uint32_t reg_data = 0;
|
||||
+ struct edma_txcmpl_ring *txcmpl_ring = (struct edma_txcmpl_ring *)ctx;
|
||||
uint32_t txcmpl_intr_status = 0;
|
||||
- int i;
|
||||
- struct edma_txcmpl_ring *txcmpl_ring = NULL;
|
||||
- struct edma_hw *ehw = NULL;
|
||||
- struct platform_device *pdev = (struct platform_device *)ctx;
|
||||
-
|
||||
- ehw = platform_get_drvdata(pdev);
|
||||
- if (!ehw) {
|
||||
- pr_info("Unable to retrieve platrofm data");
|
||||
- return IRQ_HANDLED;
|
||||
- }
|
||||
+ uint32_t reg_data = 0;
|
||||
|
||||
/*
|
||||
* Read TxCmpl intr status
|
||||
*/
|
||||
- for (i = 0; i < ehw->txcmpl_rings; i++) {
|
||||
- txcmpl_ring = &ehw->txcmpl_ring[i];
|
||||
- reg_data = edma_reg_read(
|
||||
- EDMA_REG_TX_INT_STAT(txcmpl_ring->id));
|
||||
- txcmpl_intr_status |= reg_data &
|
||||
- EDMA_TXCMPL_RING_INT_STATUS_MASK;
|
||||
+ reg_data = edma_reg_read(
|
||||
+ EDMA_REG_TX_INT_STAT(txcmpl_ring->id));
|
||||
+ txcmpl_intr_status |= reg_data &
|
||||
+ EDMA_TXCMPL_RING_INT_STATUS_MASK;
|
||||
|
||||
- /*
|
||||
- * Disable TxCmpl intr
|
||||
- */
|
||||
- edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||
- EDMA_MASK_INT_DISABLE);
|
||||
- }
|
||||
+ /*
|
||||
+ * Disable TxCmpl intr
|
||||
+ */
|
||||
+ edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||
+ EDMA_MASK_INT_DISABLE);
|
||||
|
||||
if (txcmpl_intr_status == 0)
|
||||
return IRQ_NONE;
|
||||
@@ -827,8 +808,8 @@ irqreturn_t edma_tx_handle_irq(int irq, void *ctx)
|
||||
*TODO - per core NAPI
|
||||
*/
|
||||
if (txcmpl_intr_status)
|
||||
- if (likely(napi_schedule_prep(&ehw->tx_napi)))
|
||||
- __napi_schedule(&ehw->tx_napi);
|
||||
+ if (likely(napi_schedule_prep(&txcmpl_ring->napi)))
|
||||
+ __napi_schedule(&txcmpl_ring->napi);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
--
|
||||
2.36.1
|
||||
|
||||
@ -0,0 +1,112 @@
|
||||
From 0f7bf6cf6fd536cd5965d596067e469e84559761 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||
Date: Fri, 24 Jun 2022 20:04:17 +0200
|
||||
Subject: [PATCH 20/21] edma_v1: add support for threaded napi
|
||||
|
||||
Add required changed to enable threaded napi. Also change rxfill to use
|
||||
napi_alloc_skb.
|
||||
|
||||
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||
---
|
||||
hal/dp_ops/edma_dp/edma_v1/edma_cfg.c | 5 -----
|
||||
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 12 ++++++++++--
|
||||
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 4 ++--
|
||||
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 7 ++++---
|
||||
4 files changed, 16 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||
index 6f2c082..33f4297 100644
|
||||
--- a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||
@@ -670,11 +670,6 @@ static void edma_configure_rxfill_ring(struct edma_hw *ehw,
|
||||
|
||||
data = rxfill_ring->count & EDMA_RXFILL_RING_SIZE_MASK;
|
||||
edma_reg_write(EDMA_REG_RXFILL_RING_SIZE(rxfill_ring->id), data);
|
||||
-
|
||||
- /*
|
||||
- * Alloc Rx buffers
|
||||
- */
|
||||
- edma_alloc_rx_buffer(ehw, rxfill_ring);
|
||||
}
|
||||
|
||||
/*
|
||||
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||
index 49c7f8c..3736254 100644
|
||||
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||
@@ -457,8 +457,15 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
|
||||
if (edma_hw.active++ != 0)
|
||||
return NSS_DP_SUCCESS;
|
||||
|
||||
- for (i = 0; i < edma_hw.rxdesc_rings; i++)
|
||||
- napi_enable(&edma_hw.rxdesc_ring[i].napi);
|
||||
+ for (i = 0; i < edma_hw.rxdesc_rings; i++) {
|
||||
+ struct edma_rxdesc_ring *rxdesc_ring = &edma_hw.rxdesc_ring[i];
|
||||
+ /*
|
||||
+ * Alloc Rx buffers
|
||||
+ */
|
||||
+ edma_alloc_rx_buffer(&edma_hw, &rxdesc_ring->napi, rxdesc_ring->rxfill);
|
||||
+
|
||||
+ napi_enable(&rxdesc_ring->napi);
|
||||
+ }
|
||||
|
||||
for (i = 0; i < edma_hw.txcmpl_rings; i++)
|
||||
napi_enable(&edma_hw.txcmpl_ring[i].napi);
|
||||
@@ -899,6 +906,7 @@ static int edma_if_init(struct nss_dp_data_plane_ctx *dpc)
|
||||
* Headroom needed for Tx preheader
|
||||
*/
|
||||
netdev->needed_headroom += EDMA_TX_PREHDR_SIZE;
|
||||
+ dev_set_threaded(netdev, true);
|
||||
|
||||
return NSS_DP_SUCCESS;
|
||||
}
|
||||
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||
index 8ec7e35..7f8a8d4 100644
|
||||
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||
@@ -276,8 +276,8 @@ extern struct edma_hw edma_hw;
|
||||
uint32_t edma_reg_read(uint32_t reg_off);
|
||||
void edma_reg_write(uint32_t reg_off, uint32_t val);
|
||||
|
||||
-int edma_alloc_rx_buffer(struct edma_hw *ehw,
|
||||
- struct edma_rxfill_ring *rxfill_ring);
|
||||
+int edma_alloc_rx_buffer(struct edma_hw *ehw, struct napi_struct *napi,
|
||||
+ struct edma_rxfill_ring *rxfill_ring);
|
||||
enum edma_tx edma_ring_xmit(struct edma_hw *ehw,
|
||||
struct net_device *netdev,
|
||||
struct sk_buff *skb,
|
||||
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||
index 8221a9c..001f883 100644
|
||||
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||
@@ -29,7 +29,8 @@
|
||||
* Alloc Rx buffers for one RxFill ring
|
||||
*/
|
||||
int edma_alloc_rx_buffer(struct edma_hw *ehw,
|
||||
- struct edma_rxfill_ring *rxfill_ring)
|
||||
+ struct napi_struct *napi,
|
||||
+ struct edma_rxfill_ring *rxfill_ring)
|
||||
{
|
||||
struct platform_device *pdev = ehw->pdev;
|
||||
struct sk_buff *skb;
|
||||
@@ -64,7 +65,7 @@ int edma_alloc_rx_buffer(struct edma_hw *ehw,
|
||||
/*
|
||||
* Allocate buffer
|
||||
*/
|
||||
- skb = dev_alloc_skb(alloc_size);
|
||||
+ skb = napi_alloc_skb(napi, alloc_size);
|
||||
if (unlikely(!skb))
|
||||
break;
|
||||
|
||||
@@ -445,7 +446,7 @@ next_rx_desc:
|
||||
work_done++;
|
||||
}
|
||||
|
||||
- edma_alloc_rx_buffer(ehw, rxdesc_ring->rxfill);
|
||||
+ edma_alloc_rx_buffer(ehw, &rxdesc_ring->napi, rxdesc_ring->rxfill);
|
||||
|
||||
/*
|
||||
* make sure the consumer index is updated
|
||||
--
|
||||
2.36.1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user