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https://github.com/hzyitc/openwrt-redmi-ax3000.git
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173 lines
5.4 KiB
Diff
173 lines
5.4 KiB
Diff
From f73d46914ae5bd46f7fcbec12a680dbb62c383d6 Mon Sep 17 00:00:00 2001
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From: Varadarajan Narayanan <varada@codeaurora.org>
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Date: Mon, 28 Sep 2020 10:45:37 +0530
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Subject: [PATCH 4/7] dt-bindings: pinctrl: qcom: Add ipq5018 pinctrl bindings
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Add device tree binding Documentation details for ipq5018
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pinctrl driver.
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Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
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Pick from <1601270140-4306-5-git-send-email-varada@codeaurora.org>
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Fix gpio-ranges
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Signed-off-by: hzy <hzyitc@outlook.com>
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---
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.../pinctrl/qcom,ipq5018-pinctrl.yaml | 143 ++++++++++++++++++
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1 file changed, 143 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-pinctrl.yaml
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diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-pinctrl.yaml
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new file mode 100644
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index 000000000000..237ef50a9562
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-pinctrl.yaml
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@@ -0,0 +1,143 @@
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5018-pinctrl.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: Qualcomm Technologies, Inc. IPQ5018 TLMM block
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+
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+maintainers:
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+ - Nitheesh Sekar <nsekar@codeaurora.org>
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+
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+description: |
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+ This binding describes the Top Level Mode Multiplexer block found in the
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+ IPQ5018 platform.
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+
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+properties:
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+ compatible:
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+ const: qcom,ipq5018-pinctrl
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+
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+ reg:
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+ maxItems: 1
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+
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+ interrupts:
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+ description: Specifies the TLMM summary IRQ
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+ maxItems: 1
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+
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+ interrupt-controller: true
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+
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+ '#interrupt-cells':
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+ description:
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+ Specifies the PIN numbers and Flags, as defined in defined in
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+ include/dt-bindings/interrupt-controller/irq.h
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+ const: 2
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+
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+ gpio-controller: true
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+
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+ '#gpio-cells':
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+ description: Specifying the pin number and flags, as defined in
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+ include/dt-bindings/gpio/gpio.h
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+ const: 2
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+
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+ gpio-ranges:
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+ maxItems: 1
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+
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+#PIN CONFIGURATION NODES
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+patternProperties:
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+ '-pinmux$':
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+ type: object
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+ description:
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+ Pinctrl node's client devices use subnodes for desired pin configuration.
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+ Client device subnodes use below standard properties.
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+ $ref: "/schemas/pinctrl/pincfg-node.yaml"
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+
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+ properties:
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+ pins:
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+ description:
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+ List of gpio pins affected by the properties specified in this
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+ subnode.
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+ items:
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+ oneOf:
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+ - pattern: "^gpio([1-9]|[1-7][0-9]|80)$"
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+ minItems: 1
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+ maxItems: 4
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+
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+ function:
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+ description:
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+ Specify the alternative function to be configured for the specified
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+ pins.
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+ enum: [ atest_char, atest_char0, atest_char1, atest_char2, atest_char3,
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+ audio_pdm0, audio_pdm1, audio_rxbclk, audio_rxd, audio_rxfsync,
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+ audio_rxmclk, audio_txbclk, audio_txd, audio_txfsync, audio_txmclk,
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+ blsp0_i2c, blsp0_spi, blsp0_uart0, blsp0_uart1, blsp1_i2c0,
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+ blsp1_i2c1, blsp1_spi0, blsp1_spi1, blsp1_uart0, blsp1_uart1,
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+ blsp1_uart2, blsp2_i2c0, blsp2_i2c1, blsp2_spi, blsp2_spi0,
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+ blsp2_spi1, btss0, btss1, btss10, btss11, btss12, btss13, btss2,
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+ btss3, btss4, btss5, btss6, btss7, btss8, btss9, burn0, burn1,
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+ cri_trng, cri_trng0, cri_trng1, cxc_clk, cxc_data, dbg_out, eud_gpio,
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+ gcc_plltest, gcc_tlmm, gpio, mac0, mac1, mdc, mdio, pcie0_clk,
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+ pcie0_wake, pcie1_clk, pcie1_wake, pll_test, prng_rosc, pwm0, pwm1,
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+ pwm2, pwm3, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,
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+ qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_a0,
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+ qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, qdss_cti_trig_out_b1,
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+ qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,
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+ qdss_tracedata_a, qdss_tracedata_b, qspi_clk, qspi_cs, qspi0, qspi1,
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+ qspi2, qspi3, reset_out, sdc1_clk, sdc1_cmd, sdc10, sdc11, sdc12,
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+ sdc13, wci0, wci1, wci2, wci3, wci4, wci5, wci6, wci7, wsa_swrm,
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+ wsi_clk3, wsi_data3, wsis_reset, xfem0, xfem1, xfem2, xfem3, xfem4,
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+ xfem5, xfem6, xfem7 ]
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+
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+ drive-strength:
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+ enum: [2, 4, 6, 8, 10, 12, 14, 16]
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+ default: 2
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+ description:
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+ Selects the drive strength for the specified pins, in mA.
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+
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+ bias-pull-down: true
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+
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+ bias-pull-up: true
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+
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+ bias-disable: true
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+
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+ output-high: true
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+
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+ output-low: true
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+
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+ required:
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+ - pins
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+ - function
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+
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+ additionalProperties: false
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+
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+required:
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+ - compatible
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+ - reg
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+ - interrupts
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+ - interrupt-controller
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+ - '#interrupt-cells'
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+ - gpio-controller
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+ - '#gpio-cells'
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+ - gpio-ranges
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+
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+additionalProperties: false
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+
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+examples:
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+ - |
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+ #include <dt-bindings/interrupt-controller/arm-gic.h>
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+ tlmm: pinctrl@1000000 {
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+ compatible = "qcom,ipq5018-pinctrl";
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+ reg = <0x01000000 0x300000>;
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+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ gpio-ranges = <&tlmm 0 0 80>;
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+
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+ serial3-pinmux {
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+ pins = "gpio44", "gpio45";
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+ function = "blsp2_uart";
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+ drive-strength = <8>;
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+ bias-pull-down;
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+ };
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+ };
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--
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2.25.1
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