mirror of
https://github.com/hzyitc/openwrt-redmi-ax3000.git
synced 2025-12-16 16:31:57 +00:00
52 lines
1.9 KiB
Diff
52 lines
1.9 KiB
Diff
From 8f98c5c71e78abddd533d5e65a9bbb20365b30e7 Mon Sep 17 00:00:00 2001
|
||
From: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
|
||
Date: Thu, 12 Mar 2020 14:19:16 +0530
|
||
Subject: [PATCH 1/7] mtd: nand: qcom: use the ecc strength from device
|
||
parameter
|
||
MIME-Version: 1.0
|
||
Content-Type: text/plain; charset=UTF-8
|
||
Content-Transfer-Encoding: 8bit
|
||
|
||
Currently the driver uses the ECC strength specified in
|
||
device tree. The ONFI or JEDEC device parameter page
|
||
contains the ‘ECC correctability’ field which indicates the
|
||
number of bits that the host should be able to correct per
|
||
512 bytes of data. The NAND base layer reads this parameter
|
||
during device scan time. Since QPIC NAND controller supports
|
||
8 bit ECC and same board can have different ECC strength
|
||
devices, so device ECC strength can be used.
|
||
|
||
Change-Id: I4924ed4a3a0db56a217aabd0b7e7699078b4e7d5
|
||
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
|
||
(cherry picked from commit f9b2c1442788f6cb9652c79557c9795faefe3513)
|
||
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
|
||
|
||
Pick from https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/43a13a5bf504b9d09ac703d67c1b85934ef758e1
|
||
|
||
Signed-off-by: hzy <hzyitc@outlook.com>
|
||
---
|
||
drivers/mtd/nand/raw/qcom_nandc.c | 7 +++++++
|
||
1 file changed, 7 insertions(+)
|
||
|
||
diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
|
||
index 5af3bef6c230..673468d35d28 100644
|
||
--- a/drivers/mtd/nand/raw/qcom_nandc.c
|
||
+++ b/drivers/mtd/nand/raw/qcom_nandc.c
|
||
@@ -2477,6 +2477,13 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
|
||
wide_bus = chip->options & NAND_BUSWIDTH_16 ? true : false;
|
||
cwperpage = mtd->writesize / NANDC_STEP_SIZE;
|
||
|
||
+ /*
|
||
+ * Read the required ecc strength from NAND device and overwrite the
|
||
+ * device tree ecc strength
|
||
+ */
|
||
+ if (chip->base.ecc.requirements.strength >= 8)
|
||
+ ecc->strength = 8;
|
||
+
|
||
/*
|
||
* Each CW has 4 available OOB bytes which will be protected with ECC
|
||
* so remaining bytes can be used for ECC.
|
||
--
|
||
2.25.1
|
||
|