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https://github.com/hzyitc/openwrt-redmi-ax3000.git
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61 lines
2.1 KiB
Diff
61 lines
2.1 KiB
Diff
From 13bae86b4d3ed01f885e111eda4224a2985ed9a4 Mon Sep 17 00:00:00 2001
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From: Md Sadre Alam <mdalam@codeaurora.org>
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Date: Tue, 21 Jul 2020 21:19:58 +0530
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Subject: [PATCH 4/7] mtd: rawnand: qcom: Read QPIC version
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This change will add support to read QPIC version.
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QPIC version V2.0 onwards some new register introduced
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in QPIC. So based on hw_version we will update those
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register.
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Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org>
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Change-Id: Iadc95a12145e03b8edf0deb6537b819ad4baec22
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Pick from https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/bfd90c9e9e90c0fa9150d25d2b2e6d4d321610f0
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Signed-off-by: hzy <hzyitc@outlook.com>
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---
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drivers/mtd/nand/raw/qcom_nandc.c | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
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index 361ee116422f..e19074062348 100644
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--- a/drivers/mtd/nand/raw/qcom_nandc.c
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+++ b/drivers/mtd/nand/raw/qcom_nandc.c
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@@ -442,6 +442,7 @@ struct qcom_nand_controller {
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u32 cmd1, vld;
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const struct qcom_nandc_props *props;
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+ u32 hw_version;
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};
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/*
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@@ -2539,6 +2540,7 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
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int ecc_mode = 1;
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int num_addr_cycle = 5, dsbl_sts_aftr_write = 0;
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int wr_rd_bsy_gap = 2, recovery_cycle = 7;
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+ u32 version_reg;
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/* controller only supports 512 bytes data steps */
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ecc->size = NANDC_STEP_SIZE;
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@@ -2552,6 +2554,16 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
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if (chip->base.eccreq.strength >= 8)
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ecc->strength = 8;
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+ /* Read QPIC version register */
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+ version_reg = (NAND_VERSION + 0x4000);
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+ nandc->hw_version = nandc_read(nandc, version_reg);
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+ pr_info("QPIC controller hw version Major:%d, Minor:%d\n",
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+ ((nandc->hw_version & NAND_VERSION_MAJOR_MASK)
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+ >> NAND_VERSION_MAJOR_SHIFT),
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+ ((nandc->hw_version & NAND_VERSION_MINOR_MASK)
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+ >> NAND_VERSION_MINOR_SHIFT));
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+ nandc->hw_version = ((nandc->hw_version & NAND_VERSION_MAJOR_MASK)
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+ >> NAND_VERSION_MAJOR_SHIFT);
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/*
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* Each CW has 4 available OOB bytes which will be protected with ECC
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* so remaining bytes can be used for ECC.
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--
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2.25.1
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